From: Maxime Ripard <maxime@cerno.tech>
To: qianfanguijin@163.com
Cc: linux-sunxi@lists.linux.dev, Rob Herring <robh+dt@kernel.org>,
Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Viresh Kumar <viresh.kumar@linaro.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org
Subject: Re: [PATCH v1] drivers: cpufreq: sun8i-r40: Add cpufreq support
Date: Mon, 9 May 2022 11:27:40 +0200 [thread overview]
Message-ID: <20220509092740.qmpizwxappy77ggc@houat> (raw)
In-Reply-To: <20220509084853.17068-1-qianfanguijin@163.com>
On Mon, May 09, 2022 at 04:48:53PM +0800, qianfanguijin@163.com wrote:
> From: qianfan Zhao <qianfanguijin@163.com>
>
> OPP table value is get from allwinner lichee 3.10 kernel.
>
> Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
> ---
> arch/arm/boot/dts/sun8i-r40.dtsi | 47 ++++++++++++++++++++++++++++
> drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
> 2 files changed, 48 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
> index 291f4784e86c..90de119095fa 100644
> --- a/arch/arm/boot/dts/sun8i-r40.dtsi
> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
> @@ -54,6 +54,41 @@ / {
> #size-cells = <1>;
> interrupt-parent = <&gic>;
>
> + cpu0_opp_table: opp_table0 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp-720000000 {
> + opp-hz = /bits/ 64 <720000000>;
> + opp-microvolt = <1000000 1000000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + opp-912000000 {
> + opp-hz = /bits/ 64 <912000000>;
> + opp-microvolt = <1100000 1100000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + opp-1008000000 {
> + opp-hz = /bits/ 64 <1008000000>;
> + opp-microvolt = <1160000 1160000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + opp-1104000000 {
> + opp-hz = /bits/ 64 <1104000000>;
> + opp-microvolt = <1240000 1240000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + opp-1200000000 {
> + opp-hz = /bits/ 64 <1200000000>;
> + opp-microvolt = <1300000 1300000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> + };
> +
How were these OPPs tested? If you didn't, please test with
https://github.com/ssvb/cpuburn-arm/blob/master/cpufreq-ljt-stress-test
And report the results
Also, U-Boot sets the 1008MHz OPP by default, and the voltage to match.
How is this going to play out on device tree where the CPU regulators
aren't set?
Maxime
next prev parent reply other threads:[~2022-05-09 9:44 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-09 8:48 [PATCH v1] drivers: cpufreq: sun8i-r40: Add cpufreq support qianfanguijin
2022-05-09 9:11 ` Viresh Kumar
2022-05-09 9:23 ` Maxime Ripard
2022-05-09 9:31 ` Viresh Kumar
2022-05-09 9:27 ` Maxime Ripard [this message]
2022-05-09 10:20 ` qianfan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220509092740.qmpizwxappy77ggc@houat \
--to=maxime@cerno.tech \
--cc=devicetree@vger.kernel.org \
--cc=jernej.skrabec@gmail.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=linux-sunxi@lists.linux.dev \
--cc=qianfanguijin@163.com \
--cc=rafael@kernel.org \
--cc=robh+dt@kernel.org \
--cc=viresh.kumar@linaro.org \
--cc=wens@csie.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox