* [PATCH v1] drivers: cpufreq: sun8i-r40: Add cpufreq support
@ 2022-05-09 8:48 qianfanguijin
2022-05-09 9:11 ` Viresh Kumar
2022-05-09 9:27 ` Maxime Ripard
0 siblings, 2 replies; 6+ messages in thread
From: qianfanguijin @ 2022-05-09 8:48 UTC (permalink / raw)
To: linux-sunxi
Cc: Rob Herring, Maxime Ripard, Chen-Yu Tsai, Jernej Skrabec,
Rafael J . Wysocki, Viresh Kumar, devicetree, linux-arm-kernel,
linux-kernel, linux-pm, qianfan Zhao
From: qianfan Zhao <qianfanguijin@163.com>
OPP table value is get from allwinner lichee 3.10 kernel.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
---
arch/arm/boot/dts/sun8i-r40.dtsi | 47 ++++++++++++++++++++++++++++
drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
2 files changed, 48 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 291f4784e86c..90de119095fa 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -54,6 +54,41 @@ / {
#size-cells = <1>;
interrupt-parent = <&gic>;
+ cpu0_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-720000000 {
+ opp-hz = /bits/ 64 <720000000>;
+ opp-microvolt = <1000000 1000000 1300000>;
+ clock-latency-ns = <2000000>;
+ };
+
+ opp-912000000 {
+ opp-hz = /bits/ 64 <912000000>;
+ opp-microvolt = <1100000 1100000 1300000>;
+ clock-latency-ns = <2000000>;
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1160000 1160000 1300000>;
+ clock-latency-ns = <2000000>;
+ };
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1240000 1240000 1300000>;
+ clock-latency-ns = <2000000>;
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <2000000>;
+ };
+ };
+
clocks {
#address-cells = <1>;
#size-cells = <1>;
@@ -84,24 +119,36 @@ cpu0: cpu@0 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0>;
+ clocks = <&ccu CLK_CPU>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu1: cpu@1 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <1>;
+ clocks = <&ccu CLK_CPU>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu2: cpu@2 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <2>;
+ clocks = <&ccu CLK_CPU>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu3: cpu@3 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <3>;
+ clocks = <&ccu CLK_CPU>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
};
};
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
index ca1d103ec449..971a99219d4d 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -26,6 +26,7 @@ static const struct of_device_id allowlist[] __initconst = {
{ .compatible = "allwinner,sun8i-a23", },
{ .compatible = "allwinner,sun8i-a83t", },
{ .compatible = "allwinner,sun8i-h3", },
+ { .compatible = "allwinner,sun8i-r40", },
{ .compatible = "apm,xgene-shadowcat", },
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH v1] drivers: cpufreq: sun8i-r40: Add cpufreq support
2022-05-09 8:48 [PATCH v1] drivers: cpufreq: sun8i-r40: Add cpufreq support qianfanguijin
@ 2022-05-09 9:11 ` Viresh Kumar
2022-05-09 9:23 ` Maxime Ripard
2022-05-09 9:27 ` Maxime Ripard
1 sibling, 1 reply; 6+ messages in thread
From: Viresh Kumar @ 2022-05-09 9:11 UTC (permalink / raw)
To: qianfanguijin
Cc: linux-sunxi, Rob Herring, Maxime Ripard, Chen-Yu Tsai,
Jernej Skrabec, Rafael J . Wysocki, devicetree, linux-arm-kernel,
linux-kernel, linux-pm
On 09-05-22, 16:48, qianfanguijin@163.com wrote:
> From: qianfan Zhao <qianfanguijin@163.com>
>
> OPP table value is get from allwinner lichee 3.10 kernel.
>
> Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
> ---
> arch/arm/boot/dts/sun8i-r40.dtsi | 47 ++++++++++++++++++++++++++++
> drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
> 2 files changed, 48 insertions(+)
Applied. Thanks.
--
viresh
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1] drivers: cpufreq: sun8i-r40: Add cpufreq support
2022-05-09 9:11 ` Viresh Kumar
@ 2022-05-09 9:23 ` Maxime Ripard
2022-05-09 9:31 ` Viresh Kumar
0 siblings, 1 reply; 6+ messages in thread
From: Maxime Ripard @ 2022-05-09 9:23 UTC (permalink / raw)
To: Viresh Kumar
Cc: qianfanguijin, linux-sunxi, Rob Herring, Chen-Yu Tsai,
Jernej Skrabec, Rafael J . Wysocki, devicetree, linux-arm-kernel,
linux-kernel, linux-pm
Hi,
On Mon, May 09, 2022 at 02:41:25PM +0530, Viresh Kumar wrote:
> On 09-05-22, 16:48, qianfanguijin@163.com wrote:
> > From: qianfan Zhao <qianfanguijin@163.com>
> >
> > OPP table value is get from allwinner lichee 3.10 kernel.
> >
> > Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
> > ---
> > arch/arm/boot/dts/sun8i-r40.dtsi | 47 ++++++++++++++++++++++++++++
> > drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
> > 2 files changed, 48 insertions(+)
>
> Applied. Thanks.
Shouldn't you wait for the maintainers feedback for the DT bits at least?
Maxime
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1] drivers: cpufreq: sun8i-r40: Add cpufreq support
2022-05-09 9:23 ` Maxime Ripard
@ 2022-05-09 9:31 ` Viresh Kumar
0 siblings, 0 replies; 6+ messages in thread
From: Viresh Kumar @ 2022-05-09 9:31 UTC (permalink / raw)
To: Maxime Ripard
Cc: qianfanguijin, linux-sunxi, Rob Herring, Chen-Yu Tsai,
Jernej Skrabec, Rafael J . Wysocki, devicetree, linux-arm-kernel,
linux-kernel, linux-pm
On 09-05-22, 11:23, Maxime Ripard wrote:
> Hi,
>
> On Mon, May 09, 2022 at 02:41:25PM +0530, Viresh Kumar wrote:
> > On 09-05-22, 16:48, qianfanguijin@163.com wrote:
> > > From: qianfan Zhao <qianfanguijin@163.com>
> > >
> > > OPP table value is get from allwinner lichee 3.10 kernel.
> > >
> > > Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
> > > ---
> > > arch/arm/boot/dts/sun8i-r40.dtsi | 47 ++++++++++++++++++++++++++++
> > > drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
> > > 2 files changed, 48 insertions(+)
> >
> > Applied. Thanks.
>
> Shouldn't you wait for the maintainers feedback for the DT bits at least?
I should have, will drop it.
--
viresh
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1] drivers: cpufreq: sun8i-r40: Add cpufreq support
2022-05-09 8:48 [PATCH v1] drivers: cpufreq: sun8i-r40: Add cpufreq support qianfanguijin
2022-05-09 9:11 ` Viresh Kumar
@ 2022-05-09 9:27 ` Maxime Ripard
2022-05-09 10:20 ` qianfan
1 sibling, 1 reply; 6+ messages in thread
From: Maxime Ripard @ 2022-05-09 9:27 UTC (permalink / raw)
To: qianfanguijin
Cc: linux-sunxi, Rob Herring, Chen-Yu Tsai, Jernej Skrabec,
Rafael J . Wysocki, Viresh Kumar, devicetree, linux-arm-kernel,
linux-kernel, linux-pm
On Mon, May 09, 2022 at 04:48:53PM +0800, qianfanguijin@163.com wrote:
> From: qianfan Zhao <qianfanguijin@163.com>
>
> OPP table value is get from allwinner lichee 3.10 kernel.
>
> Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
> ---
> arch/arm/boot/dts/sun8i-r40.dtsi | 47 ++++++++++++++++++++++++++++
> drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
> 2 files changed, 48 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
> index 291f4784e86c..90de119095fa 100644
> --- a/arch/arm/boot/dts/sun8i-r40.dtsi
> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
> @@ -54,6 +54,41 @@ / {
> #size-cells = <1>;
> interrupt-parent = <&gic>;
>
> + cpu0_opp_table: opp_table0 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp-720000000 {
> + opp-hz = /bits/ 64 <720000000>;
> + opp-microvolt = <1000000 1000000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + opp-912000000 {
> + opp-hz = /bits/ 64 <912000000>;
> + opp-microvolt = <1100000 1100000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + opp-1008000000 {
> + opp-hz = /bits/ 64 <1008000000>;
> + opp-microvolt = <1160000 1160000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + opp-1104000000 {
> + opp-hz = /bits/ 64 <1104000000>;
> + opp-microvolt = <1240000 1240000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + opp-1200000000 {
> + opp-hz = /bits/ 64 <1200000000>;
> + opp-microvolt = <1300000 1300000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> + };
> +
How were these OPPs tested? If you didn't, please test with
https://github.com/ssvb/cpuburn-arm/blob/master/cpufreq-ljt-stress-test
And report the results
Also, U-Boot sets the 1008MHz OPP by default, and the voltage to match.
How is this going to play out on device tree where the CPU regulators
aren't set?
Maxime
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH v1] drivers: cpufreq: sun8i-r40: Add cpufreq support
2022-05-09 9:27 ` Maxime Ripard
@ 2022-05-09 10:20 ` qianfan
0 siblings, 0 replies; 6+ messages in thread
From: qianfan @ 2022-05-09 10:20 UTC (permalink / raw)
To: Maxime Ripard
Cc: linux-sunxi, Rob Herring, Chen-Yu Tsai, Jernej Skrabec,
Rafael J . Wysocki, Viresh Kumar, devicetree, linux-arm-kernel,
linux-kernel, linux-pm
在 2022/5/9 17:27, Maxime Ripard 写道:
> On Mon, May 09, 2022 at 04:48:53PM +0800, qianfanguijin@163.com wrote:
>> From: qianfan Zhao <qianfanguijin@163.com>
>>
>> OPP table value is get from allwinner lichee 3.10 kernel.
>>
>> Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
>> ---
>> arch/arm/boot/dts/sun8i-r40.dtsi | 47 ++++++++++++++++++++++++++++
>> drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
>> 2 files changed, 48 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
>> index 291f4784e86c..90de119095fa 100644
>> --- a/arch/arm/boot/dts/sun8i-r40.dtsi
>> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
>> @@ -54,6 +54,41 @@ / {
>> #size-cells = <1>;
>> interrupt-parent = <&gic>;
>>
>> + cpu0_opp_table: opp_table0 {
>> + compatible = "operating-points-v2";
>> + opp-shared;
>> +
>> + opp-720000000 {
>> + opp-hz = /bits/ 64 <720000000>;
>> + opp-microvolt = <1000000 1000000 1300000>;
>> + clock-latency-ns = <2000000>;
>> + };
>> +
>> + opp-912000000 {
>> + opp-hz = /bits/ 64 <912000000>;
>> + opp-microvolt = <1100000 1100000 1300000>;
>> + clock-latency-ns = <2000000>;
>> + };
>> +
>> + opp-1008000000 {
>> + opp-hz = /bits/ 64 <1008000000>;
>> + opp-microvolt = <1160000 1160000 1300000>;
>> + clock-latency-ns = <2000000>;
>> + };
>> +
>> + opp-1104000000 {
>> + opp-hz = /bits/ 64 <1104000000>;
>> + opp-microvolt = <1240000 1240000 1300000>;
>> + clock-latency-ns = <2000000>;
>> + };
>> +
>> + opp-1200000000 {
>> + opp-hz = /bits/ 64 <1200000000>;
>> + opp-microvolt = <1300000 1300000 1300000>;
>> + clock-latency-ns = <2000000>;
>> + };
>> + };
>> +
> How were these OPPs tested? If you didn't, please test with
> https://github.com/ssvb/cpuburn-arm/blob/master/cpufreq-ljt-stress-test
Thanks for yours guide. Next it the log:
root@ubuntu:~/cpuburn-arm-master# ./cpufreq-ljt-stress-test
Creating './whitenoise-1920x1080.jpg' ... done
CPU stress test, which is doing JPEG decoding by libjpeg-turbo
at different cpufreq operating points.
Testing CPU 0
1200 MHz ............................................................ OK
1104 MHz ............................................................ OK
1008 MHz ............................................................ OK
912 MHz ............................................................ OK
720 MHz ............................................................ OK
Testing CPU 1
1200 MHz ............................................................ OK
1104 MHz ............................................................ OK
1008 MHz ............................................................ OK
912 MHz ............................................................ OK
720 MHz ............................................................ OK
Testing CPU 2
1200 MHz ............................................................ OK
1104 MHz ............................................................ OK
1008 MHz ............................................................ OK
912 MHz ............................................................ OK
720 MHz ............................................................ OK
Testing CPU 3
1200 MHz ............................................................ OK
1104 MHz ............................................................ OK
1008 MHz ............................................................ OK
912 MHz ............................................................ OK
720 MHz ............................................................ OK
Overall result : PASSED
>
> And report the results
>
> Also, U-Boot sets the 1008MHz OPP by default, and the voltage to match.
> How is this going to play out on device tree where the CPU regulators
> aren't set?
I tested this patch on my custom board now, and cpu is powered by dcdc2.
So I add cpu-supply in dts on my custom board:
&cpu0 {
cpu-supply = <®_dcdc2>;
};
I think I can add cpu-supply to the others.
>
> Maxime
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-05-09 10:23 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2022-05-09 8:48 [PATCH v1] drivers: cpufreq: sun8i-r40: Add cpufreq support qianfanguijin
2022-05-09 9:11 ` Viresh Kumar
2022-05-09 9:23 ` Maxime Ripard
2022-05-09 9:31 ` Viresh Kumar
2022-05-09 9:27 ` Maxime Ripard
2022-05-09 10:20 ` qianfan
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