[PATCH 0/2] Add support for cpufreq scaling on QCS8300

[PATCH 0/2] Add support for cpufreq scaling on QCS8300

[Imran Shaik]

Add cpufreq-hw node to support cpufreq scaling on QCS8300.

Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
---
Imran Shaik (2):
      dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCS8300 compatible
      arm64: dts: qcom: qcs8300: Add cpufreq scaling node

 .../bindings/cpufreq/cpufreq-qcom-hw.yaml          |  2 ++
 arch/arm64/boot/dts/qcom/qcs8300.dtsi              | 26 ++++++++++++++++++++++
 2 files changed, 28 insertions(+)
---
base-commit: 9fbcd7b32bf7c0a5bda0f22c25df29d00a872017
change-id: 20250313-qcs8300-cpufreq-scaling-e361aa2536a3

Best regards,
-- 
Imran Shaik <quic_imrashai@quicinc.com>

[PATCH 1/2] dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCS8300 compatible

[Imran Shaik]

Document compatible for cpufreq hardware on Qualcomm QCS8300 platform.

Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
---
 Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
index e937eb7355e7..90d9e7f43406 100644
--- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
@@ -34,6 +34,7 @@ properties:
       - description: v2 of CPUFREQ HW (EPSS)
         items:
           - enum:
+              - qcom,qcs8300-cpufreq-epss
               - qcom,qdu1000-cpufreq-epss
               - qcom,sa8255p-cpufreq-epss
               - qcom,sa8775p-cpufreq-epss
@@ -166,6 +167,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,qcs8300-cpufreq-epss
               - qcom,sc7280-cpufreq-epss
               - qcom,sm8250-cpufreq-epss
               - qcom,sm8350-cpufreq-epss

-- 
2.25.1

Re: [PATCH 1/2] dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCS8300 compatible

[Krzysztof Kozlowski]

On Thu, Mar 13, 2025 at 11:33:39AM +0530, Imran Shaik wrote:
> Document compatible for cpufreq hardware on Qualcomm QCS8300 platform.
> 
> Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
> ---
>  Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: [PATCH 1/2] dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCS8300 compatible

[Viresh Kumar]

On 13-03-25, 09:52, Krzysztof Kozlowski wrote:
> On Thu, Mar 13, 2025 at 11:33:39AM +0530, Imran Shaik wrote:
> > Document compatible for cpufreq hardware on Qualcomm QCS8300 platform.
> > 
> > Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
> > ---
> >  Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml | 2 ++
> >  1 file changed, 2 insertions(+)
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Applied [1/2]. Thanks.

-- 
viresh

Re: [PATCH 1/2] dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCS8300 compatible

[Krzysztof Kozlowski]

On Thu, Mar 13, 2025 at 11:33:39AM +0530, Imran Shaik wrote:
> Document compatible for cpufreq hardware on Qualcomm QCS8300 platform.
> 
> Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
> ---
>  Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

[PATCH 2/2] arm64: dts: qcom: qcs8300: Add cpufreq scaling node

[Imran Shaik]

Add cpufreq-hw node to support cpufreq scaling on QCS8300.

Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
---
 arch/arm64/boot/dts/qcom/qcs8300.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
index cdd412706b5b..eb6b01683d1d 100644
--- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
@@ -52,6 +52,7 @@ cpu0: cpu@0 {
 			power-domain-names = "psci";
 			capacity-dmips-mhz = <1946>;
 			dynamic-power-coefficient = <472>;
+			qcom,freq-domain = <&cpufreq_hw 0>;
 
 			l2_0: l2-cache {
 				compatible = "cache";
@@ -71,6 +72,7 @@ cpu1: cpu@100 {
 			power-domain-names = "psci";
 			capacity-dmips-mhz = <1946>;
 			dynamic-power-coefficient = <472>;
+			qcom,freq-domain = <&cpufreq_hw 0>;
 
 			l2_1: l2-cache {
 				compatible = "cache";
@@ -90,6 +92,7 @@ cpu2: cpu@200 {
 			power-domain-names = "psci";
 			capacity-dmips-mhz = <1946>;
 			dynamic-power-coefficient = <507>;
+			qcom,freq-domain = <&cpufreq_hw 1>;
 
 			l2_2: l2-cache {
 				compatible = "cache";
@@ -109,6 +112,7 @@ cpu3: cpu@300 {
 			power-domain-names = "psci";
 			capacity-dmips-mhz = <1946>;
 			dynamic-power-coefficient = <507>;
+			qcom,freq-domain = <&cpufreq_hw 1>;
 
 			l2_3: l2-cache {
 				compatible = "cache";
@@ -128,6 +132,7 @@ cpu4: cpu@10000 {
 			power-domain-names = "psci";
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <100>;
+			qcom,freq-domain = <&cpufreq_hw 2>;
 
 			l2_4: l2-cache {
 				compatible = "cache";
@@ -147,6 +152,7 @@ cpu5: cpu@10100 {
 			power-domain-names = "psci";
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <100>;
+			qcom,freq-domain = <&cpufreq_hw 2>;
 
 			l2_5: l2-cache {
 				compatible = "cache";
@@ -166,6 +172,7 @@ cpu6: cpu@10200 {
 			power-domain-names = "psci";
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <100>;
+			qcom,freq-domain = <&cpufreq_hw 2>;
 
 			l2_6: l2-cache {
 				compatible = "cache";
@@ -185,6 +192,7 @@ cpu7: cpu@10300 {
 			power-domain-names = "psci";
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <100>;
+			qcom,freq-domain = <&cpufreq_hw 2>;
 
 			l2_7: l2-cache {
 				compatible = "cache";
@@ -5235,6 +5243,24 @@ rpmhpd_opp_turbo_l1: opp-9 {
 			};
 		};
 
+		cpufreq_hw: cpufreq@18591000 {
+			compatible = "qcom,qcs8300-cpufreq-epss", "qcom,cpufreq-epss";
+			reg = <0x0 0x18591000 0x0 0x1000>,
+			      <0x0 0x18594000 0x0 0x1000>,
+			      <0x0 0x18593000 0x0 0x1000>;
+			reg-names = "freq-domain0", "freq-domain1", "freq-domain2";
+
+			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2";
+
+			clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
+			clock-names = "xo", "alternate";
+
+			#freq-domain-cells = <1>;
+		};
+
 		remoteproc_gpdsp: remoteproc@20c00000 {
 			compatible = "qcom,qcs8300-gpdsp-pas", "qcom,sa8775p-gpdsp0-pas";
 			reg = <0x0 0x20c00000 0x0 0x10000>;

-- 
2.25.1

Re: [PATCH 2/2] arm64: dts: qcom: qcs8300: Add cpufreq scaling node

[Konrad Dybcio]

On 3/13/25 7:03 AM, Imran Shaik wrote:
> Add cpufreq-hw node to support cpufreq scaling on QCS8300.
> 
> Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
> ---

[...]

> +		cpufreq_hw: cpufreq@18591000 {
> +			compatible = "qcom,qcs8300-cpufreq-epss", "qcom,cpufreq-epss";
> +			reg = <0x0 0x18591000 0x0 0x1000>,
> +			      <0x0 0x18594000 0x0 0x1000>,
> +			      <0x0 0x18593000 0x0 0x1000>;
> +			reg-names = "freq-domain0", "freq-domain1", "freq-domain2";

Please turn these into vertical lists> +
> +			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2";

Since these labels don't match the hardware anyway, please sort them by address

Konrad

> +
> +			clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
> +			clock-names = "xo", "alternate";
> +
> +			#freq-domain-cells = <1>;
> +		};
> +
>  		remoteproc_gpdsp: remoteproc@20c00000 {
>  			compatible = "qcom,qcs8300-gpdsp-pas", "qcom,sa8775p-gpdsp0-pas";
>  			reg = <0x0 0x20c00000 0x0 0x10000>;
> 

Re: [PATCH 2/2] arm64: dts: qcom: qcs8300: Add cpufreq scaling node

[Imran Shaik]

On 4/14/2025 4:36 PM, Konrad Dybcio wrote:
> On 3/13/25 7:03 AM, Imran Shaik wrote:
>> Add cpufreq-hw node to support cpufreq scaling on QCS8300.
>>
>> Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
>> ---
> 
> [...]
> 
>> +		cpufreq_hw: cpufreq@18591000 {
>> +			compatible = "qcom,qcs8300-cpufreq-epss", "qcom,cpufreq-epss";
>> +			reg = <0x0 0x18591000 0x0 0x1000>,
>> +			      <0x0 0x18594000 0x0 0x1000>,
>> +			      <0x0 0x18593000 0x0 0x1000>;
>> +			reg-names = "freq-domain0", "freq-domain1", "freq-domain2";
> 
> Please turn these into vertical lists> +
>> +			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
>> +			interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2";
> 
> Since these labels don't match the hardware anyway, please sort them by address
> 

Sure, I will take care of the above comments and post another series.

Thanks,
Imran
> Konrad
> 
>> +
>> +			clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
>> +			clock-names = "xo", "alternate";
>> +
>> +			#freq-domain-cells = <1>;
>> +		};
>> +
>>  		remoteproc_gpdsp: remoteproc@20c00000 {
>>  			compatible = "qcom,qcs8300-gpdsp-pas", "qcom,sa8775p-gpdsp0-pas";
>>  			reg = <0x0 0x20c00000 0x0 0x10000>;
>>