From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Akhil P Oommen <akhilpo@oss.qualcomm.com>,
Jens Glathe <jens.glathe@oldschoolsolutions.biz>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Rob Clark <robin.clark@oss.qualcomm.com>,
Sean Paul <sean@poorly.run>,
Konrad Dybcio <konradybcio@kernel.org>,
Dmitry Baryshkov <lumag@kernel.org>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Jessica Zhang <jessica.zhang@oss.qualcomm.com>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Bjorn Andersson <andersson@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Viresh Kumar <vireshk@kernel.org>, Nishanth Menon <nm@ti.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org,
devicetree@vger.kernel.org, linux-pm@vger.kernel.org,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Subject: Re: [PATCH v2 0/4] Support for Adreno X1-45 GPU
Date: Sat, 14 Jun 2025 20:42:52 +0200 [thread overview]
Message-ID: <29f1de05-0e55-42b2-9bf3-894bf4f07808@oss.qualcomm.com> (raw)
In-Reply-To: <036e739c-54e4-4252-b6f0-c8eed5557d15@oss.qualcomm.com>
On 6/12/25 11:19 PM, Akhil P Oommen wrote:
> On 6/12/2025 5:32 PM, Jens Glathe wrote:
>> On 6/11/25 13:15, Akhil P Oommen wrote:
>>
>>> Add support for X1-45 GPU found in X1P41200 chipset (8 cpu core
>>> version). X1-45 is a smaller version of X1-85 with lower core count and
>>> smaller memories. From UMD perspective, this is similar to "FD735"
>>> present in Mesa.
>>>
>> Hi Akhil,
>>
>> when loading the driver (still without firmware files) I'm getting a
>> speedbin warning:
>>
>> [ 3.318341] adreno 3d00000.gpu: [drm:a6xx_gpu_init [msm]] *ERROR*
>> missing support for speed-bin: 233. Some OPPs may not be supported by
>> hardware
>>
>> I've seen that there is a table for speed bins, this one is not there.
>> Tested on a Lenovo ThinkBook 16 G7 QOY.
>
> Hi Jens,
>
> Could you please try the below patch?
>
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
> b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
> index 2db748ce7df5..7748f92919b8 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
> @@ -1510,7 +1510,8 @@ static const struct adreno_info a7xx_gpus[] = {
> { 0, 0 },
> { 294, 1 },
> { 263, 2 },
> - { 141, 3 },
> + { 233, 3 },
> + { 141, 4 },
> ),
> }
> };
>
> With this, you should see 1107Mhz as the GPU Fmax.
I see your dt entry takes care of bins 0..=4.. this oversight worries
me a bit - are these values above (post change) all in sync with what
you entered into DT?
I'm not saying they necessarily aren't, but I want to avoid
inconsistencies
Konrad
next prev parent reply other threads:[~2025-06-14 18:42 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-11 11:15 [PATCH v2 0/4] Support for Adreno X1-45 GPU Akhil P Oommen
2025-06-11 11:15 ` [PATCH v2 1/4] dt-bindings: opp: adreno: Update regex of OPP entry Akhil P Oommen
2025-06-11 11:20 ` Krzysztof Kozlowski
2025-06-11 12:24 ` Akhil P Oommen
2025-06-12 11:29 ` Krzysztof Kozlowski
2025-06-16 16:48 ` Akhil P Oommen
2025-06-17 8:27 ` Krzysztof Kozlowski
2025-06-11 11:15 ` [PATCH v2 2/4] arm64: defconfig: Enable X1P42100_GPUCC driver Akhil P Oommen
2025-06-11 11:25 ` Krzysztof Kozlowski
2025-06-11 12:28 ` Akhil P Oommen
2025-06-11 11:15 ` [PATCH v2 3/4] drm/msm/adreno: Add Adreno X1-45 support Akhil P Oommen
2025-06-11 11:15 ` [PATCH v2 4/4] arm64: dts: qcom: Add GPU support to X1P42100 SoC Akhil P Oommen
2025-06-11 11:22 ` Krzysztof Kozlowski
2025-06-11 12:25 ` Akhil P Oommen
2025-06-12 12:02 ` [PATCH v2 0/4] Support for Adreno X1-45 GPU Jens Glathe
2025-06-12 21:19 ` Akhil P Oommen
2025-06-14 18:42 ` Konrad Dybcio [this message]
2025-06-16 12:58 ` Akhil P Oommen
2025-06-15 20:42 ` Jens Glathe
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