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From: Akhil P Oommen <quic_akhilpo@quicinc.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
	Akhil P Oommen <akhilpo@oss.qualcomm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	"Will Deacon" <will@kernel.org>,
	Rob Clark <robin.clark@oss.qualcomm.com>,
	Sean Paul <sean@poorly.run>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Dmitry Baryshkov <lumag@kernel.org>,
	Abhinav Kumar <abhinav.kumar@linux.dev>,
	Jessica Zhang <jessica.zhang@oss.qualcomm.com>,
	Marijn Suijten <marijn.suijten@somainline.org>,
	David Airlie <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	Bjorn Andersson <andersson@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Viresh Kumar <vireshk@kernel.org>, Nishanth Menon <nm@ti.com>,
	Stephen Boyd <sboyd@kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>,
	<dri-devel@lists.freedesktop.org>,
	<freedreno@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
	<linux-pm@vger.kernel.org>
Subject: Re: [PATCH v2 1/4] dt-bindings: opp: adreno: Update regex of OPP entry
Date: Wed, 11 Jun 2025 17:54:44 +0530	[thread overview]
Message-ID: <d482653e-5c0e-4b03-98d6-2c898b445917@quicinc.com> (raw)
In-Reply-To: <492417fe-c086-4980-b108-0487bad08155@kernel.org>

On 6/11/2025 4:50 PM, Krzysztof Kozlowski wrote:
> On 11/06/2025 13:15, Akhil P Oommen wrote:
>> Update regex to allow multi-worded OPP entry names.
> 
> Why would we want multi-worded? This needs to be explained here.

I took the new regex from "opp-v2-base.yaml" file, so I thought it was
obvious enough. The requirement is that sometimes Adreno GPU may require
variants of OPP entries with same frequency. As an example, we may want
to vote different peak bandwidths in different SKUs for the same GPU
frequency. So to denote this minor variation, we can add an integer
suffix to the OPP entry name separated by '-'. An example from another
patch in this series:

 opp-666000000-0 {
         opp-hz = /bits/ 64 <666000000>;
         opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
         opp-peak-kBps = <8171875>;
         qcom,opp-acd-level = <0xa82d5ffd>;
         opp-supported-hw = <0xf>;
 };

 /* Only applicable for SKUs which has 666Mhz as Fmax */
 opp-666000000-1 {
         opp-hz = /bits/ 64 <666000000>;
         opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
         opp-peak-kBps = <16500000>;
         qcom,opp-acd-level = <0xa82d5ffd>;
         opp-supported-hw = <0x10>;
 };

I will add this explanation in the commit text in the next revision.

> 
> 
>>
>> Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
>> ---
>>  Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml
>> index a27ba7b663d456f964628a91a661b51a684de1be..bba95799919eb52d12afa42354ed909d0ef3c627 100644
>> --- a/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml
>> +++ b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml
>> @@ -23,7 +23,7 @@ properties:
>>        const: operating-points-v2-adreno
>>  
>>  patternProperties:
>> -  '^opp-[0-9]+$':
>> +  '^opp(-?[0-9]+)*$':
> 
> Not correct regex. You allow "opp", "opp1" and all other unusual
> variants. Commit does not explain what problem you are solving, so I
> have no clue what you want here, but for sure opp1 is wrong.

Just to confirm, would this be fine for the requirement I mentioned above?

"'^opp(-[0-9]+)*$'"

-Akhil.

> 
> 
> Best regards,
> Krzysztof


  reply	other threads:[~2025-06-11 12:25 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-11 11:15 [PATCH v2 0/4] Support for Adreno X1-45 GPU Akhil P Oommen
2025-06-11 11:15 ` [PATCH v2 1/4] dt-bindings: opp: adreno: Update regex of OPP entry Akhil P Oommen
2025-06-11 11:20   ` Krzysztof Kozlowski
2025-06-11 12:24     ` Akhil P Oommen [this message]
2025-06-12 11:29       ` Krzysztof Kozlowski
2025-06-16 16:48         ` Akhil P Oommen
2025-06-17  8:27           ` Krzysztof Kozlowski
2025-06-11 11:15 ` [PATCH v2 2/4] arm64: defconfig: Enable X1P42100_GPUCC driver Akhil P Oommen
2025-06-11 11:25   ` Krzysztof Kozlowski
2025-06-11 12:28     ` Akhil P Oommen
2025-06-11 11:15 ` [PATCH v2 3/4] drm/msm/adreno: Add Adreno X1-45 support Akhil P Oommen
2025-06-11 11:15 ` [PATCH v2 4/4] arm64: dts: qcom: Add GPU support to X1P42100 SoC Akhil P Oommen
2025-06-11 11:22   ` Krzysztof Kozlowski
2025-06-11 12:25     ` Akhil P Oommen
2025-06-12 12:02 ` [PATCH v2 0/4] Support for Adreno X1-45 GPU Jens Glathe
2025-06-12 21:19   ` Akhil P Oommen
2025-06-14 18:42     ` Konrad Dybcio
2025-06-16 12:58       ` Akhil P Oommen
2025-06-15 20:42     ` Jens Glathe

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