[PATCH] intel_idle: Fix C6S and C10 latency values for Pantherlake

[PATCH] intel_idle: Fix C6S and C10 latency values for Pantherlake

[Kaushlendra Kumar]

Correct the values using BIOS ACPI _CST characterization data read from
a Pantherlake device via
/sys/devices/system/cpu/cpu0/cpuidle/stateN/{latency,residency}:

  C6S: exit_latency 300->127, target_residency 300->381
  C10: exit_latency 370->1048, target_residency 2500->3144

Signed-off-by: Kaushlendra Kumar <kaushlendra.kumar@intel.com>
---
 drivers/idle/intel_idle.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index 651408df9c24..0b5c94c7cd3a 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -1010,16 +1010,16 @@ static struct cpuidle_state ptl_cstates[] __initdata = {
 		.name = "C6S",
 		.desc = "MWAIT 0x21",
 		.flags = MWAIT2flg(0x21) | CPUIDLE_FLAG_TLB_FLUSHED,
-		.exit_latency = 300,
-		.target_residency = 300,
+		.exit_latency = 127,
+		.target_residency = 381,
 		.enter = &intel_idle,
 		.enter_s2idle = intel_idle_s2idle, },
 	{
 		.name = "C10",
 		.desc = "MWAIT 0x60",
 		.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
-		.exit_latency = 370,
-		.target_residency = 2500,
+		.exit_latency = 1048,
+		.target_residency = 3144,
 		.enter = &intel_idle,
 		.enter_s2idle = intel_idle_s2idle, },
 	{
-- 
2.34.1

Re: [PATCH] intel_idle: Fix C6S and C10 latency values for Pantherlake

[Artem Bityutskiy]

The current value are based on what I measured using wult/pbe tool.

I think it will be better to explain the problem and how this patch
fixes it, give some details about workload. And ideally, also provided
turbostat output when it runs in parallel with the workload before and
after this patch. Then we have can see CPU frequency and idle profile
of your workload with and without this patch.

Thanks!

On Tue, 2026-08-11 at 13:47 +0530, Kaushlendra Kumar wrote:
> Correct the values using BIOS ACPI _CST characterization data read from
> a Pantherlake device via
> /sys/devices/system/cpu/cpu0/cpuidle/stateN/{latency,residency}:
> 
>   C6S: exit_latency 300->127, target_residency 300->381
>   C10: exit_latency 370->1048, target_residency 2500->3144
> 
> Signed-off-by: Kaushlendra Kumar <kaushlendra.kumar@intel.com>
> ---
>  drivers/idle/intel_idle.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
> index 651408df9c24..0b5c94c7cd3a 100644
> --- a/drivers/idle/intel_idle.c
> +++ b/drivers/idle/intel_idle.c
> @@ -1010,16 +1010,16 @@ static struct cpuidle_state ptl_cstates[] __initdata = {
>  		.name = "C6S",
>  		.desc = "MWAIT 0x21",
>  		.flags = MWAIT2flg(0x21) | CPUIDLE_FLAG_TLB_FLUSHED,
> -		.exit_latency = 300,
> -		.target_residency = 300,
> +		.exit_latency = 127,
> +		.target_residency = 381,
>  		.enter = &intel_idle,
>  		.enter_s2idle = intel_idle_s2idle, },
>  	{
>  		.name = "C10",
>  		.desc = "MWAIT 0x60",
>  		.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
> -		.exit_latency = 370,
> -		.target_residency = 2500,
> +		.exit_latency = 1048,
> +		.target_residency = 3144,
>  		.enter = &intel_idle,
>  		.enter_s2idle = intel_idle_s2idle, },
>  	{

Re: [PATCH] intel_idle: Fix C6S and C10 latency values for Pantherlake

[Artem Bityutskiy]

Hi,

The current value are based on what I measured using wult/pbe tool.

I think it will be better to explain the problem and how this patch
fixes it, give some details about workload. And ideally, also provided
turbostat output when it runs in parallel with the workload before and
after this patch. Then we have can see CPU frequency and idle profile
of your workload with and without this patch.

Thanks!

On Tue, 2026-08-11 at 13:47 +0530, Kaushlendra Kumar wrote:
> Correct the values using BIOS ACPI _CST characterization data read from
> a Pantherlake device via
> /sys/devices/system/cpu/cpu0/cpuidle/stateN/{latency,residency}:
> 
>   C6S: exit_latency 300->127, target_residency 300->381
>   C10: exit_latency 370->1048, target_residency 2500->3144
> 
> Signed-off-by: Kaushlendra Kumar <kaushlendra.kumar@intel.com>
> ---
>  drivers/idle/intel_idle.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
> index 651408df9c24..0b5c94c7cd3a 100644
> --- a/drivers/idle/intel_idle.c
> +++ b/drivers/idle/intel_idle.c
> @@ -1010,16 +1010,16 @@ static struct cpuidle_state ptl_cstates[] __initdata = {
>  		.name = "C6S",
>  		.desc = "MWAIT 0x21",
>  		.flags = MWAIT2flg(0x21) | CPUIDLE_FLAG_TLB_FLUSHED,
> -		.exit_latency = 300,
> -		.target_residency = 300,
> +		.exit_latency = 127,
> +		.target_residency = 381,
>  		.enter = &intel_idle,
>  		.enter_s2idle = intel_idle_s2idle, },
>  	{
>  		.name = "C10",
>  		.desc = "MWAIT 0x60",
>  		.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
> -		.exit_latency = 370,
> -		.target_residency = 2500,
> +		.exit_latency = 1048,
> +		.target_residency = 3144,
>  		.enter = &intel_idle,
>  		.enter_s2idle = intel_idle_s2idle, },
>  	{

RE: [PATCH] intel_idle: Fix C6S and C10 latency values for Pantherlake

[Kumar, Kaushlendra]

On Tue, 2026-08-11 at 13:47 +0530, <reviewer> wrote:
> The current values are based on what I measured using wult/pbe tool.
>
> I think it will be better to explain the problem and how this patch
> fixes it, give some details about workload. And ideally, also provided
> turbostat output when it runs in parallel with the workload before and
> after this patch.

Thank you for the feedback.

Looking at other platforms in intel_idle, C-state latency values are
generally sourced from BIOS ACPI _CST characterization data. For
example, MTL-L C6 (exit_latency=140, target_residency=420) and ADL-L
C6 (exit_latency=170, target_residency=500) match their respective
ACPI _CST tables.

For PTL, I observed a discrepancy. The ACPI _CST on a Pantherlake-L
device  reports:

  C6S: latency=127us, residency=381us
  C10: latency=1048us, residency=3144us


Could you clarify which reference was used for other platforms — ACPI
_CST or wult — so we can apply a consistent methodology for PTL?

I will add the turbostat data and workload details as requested.

Thanks,
Kaushlendra

Re: [PATCH] intel_idle: Fix C6S and C10 latency values for Pantherlake

[Artem Bityutskiy]

On Tue, 2026-08-11 at 10:36 +0000, Kumar, Kaushlendra wrote:
> On Tue, 2026-08-11 at 13:47 +0530, <reviewer> wrote:
> > The current values are based on what I measured using wult/pbe tool.
> > 
> > I think it will be better to explain the problem and how this patch
> > fixes it, give some details about workload. And ideally, also provided
> > turbostat output when it runs in parallel with the workload before and
> > after this patch.
> 
> Thank you for the feedback.
> 
> Looking at other platforms in intel_idle, C-state latency values are
> generally sourced from BIOS ACPI _CST characterization data. For
> example, MTL-L C6 (exit_latency=140, target_residency=420) and ADL-L
> C6 (exit_latency=170, target_residency=500) match their respective
> ACPI _CST tables.

So there are platforms that have intel_idle table and that do not have
it.

> For PTL, I observed a discrepancy. The ACPI _CST on a Pantherlake-L
> device  reports:
> 
>   C6S: latency=127us, residency=381us
>   C10: latency=1048us, residency=3144us

Discrepancy -> difference.

> Could you clarify which reference was used for other platforms — ACPI
> _CST or wult — so we can apply a consistent methodology for PTL?

Platforms that do not have intel_idle custom table, use latency from
ACPI _CST table. It only provides latency. Target residency is
calculated as 3x latency.

I do not know about _CST numbers. I only know that in many cases they
are not what I can observe using wult tool.

Panther Lake is the only client platform that I measured with the tools
I developed, and submitted the numbers based on wult and pbe data that
I got.

Artem.