From: Luo Jie <quic_luoj@quicinc.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Cc: Bjorn Andersson <andersson@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
"Varadarajan Narayanan" <quic_varada@quicinc.com>,
Georgi Djakov <djakov@kernel.org>,
"Rob Herring" <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
Anusha Rao <quic_anusha@quicinc.com>,
"Manikanta Mylavarapu" <quic_mmanikan@quicinc.com>,
Devi Priya <quic_devipriy@quicinc.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
"Richard Cochran" <richardcochran@gmail.com>,
Konrad Dybcio <konradybcio@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, <linux-arm-msm@vger.kernel.org>,
<linux-clk@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<netdev@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>,
<quic_kkumarcs@quicinc.com>, <quic_linchen@quicinc.com>,
<quic_leiwei@quicinc.com>, <quic_pavir@quicinc.com>,
<quic_suruchia@quicinc.com>
Subject: Re: [PATCH v5 02/10] dt-bindings: clock: Add required "interconnect-cells" property
Date: Wed, 17 Sep 2025 23:47:13 +0800 [thread overview]
Message-ID: <d8da8454-d5ab-41e9-a34a-127366e83ae1@quicinc.com> (raw)
In-Reply-To: <e874339e-f802-4793-8c0f-db85575be8e5@linaro.org>
On 9/17/2025 8:35 AM, Krzysztof Kozlowski wrote:
> On 16/09/2025 16:03, Luo Jie wrote:
>>
>>
>> On 9/12/2025 5:16 PM, Krzysztof Kozlowski wrote:
>>> On 12/09/2025 11:13, Konrad Dybcio wrote:
>>>> On 9/12/25 9:04 AM, Krzysztof Kozlowski wrote:
>>>>> On Tue, Sep 09, 2025 at 09:39:11PM +0800, Luo Jie wrote:
>>>>>> The Networking Subsystem (NSS) clock controller acts as both a clock
>>>>>> provider and an interconnect provider. The #interconnect-cells property
>>>>>> is mandatory in the Device Tree Source (DTS) to ensure that client
>>>>>> drivers, such as the PPE driver, can correctly acquire ICC clocks from
>>>>>> the NSS ICC provider.
>>>>>>
>>>>>> Although this property is already present in the NSS CC node of the DTS
>>>>>> for CMN PLL for IPQ9574 SoC which is currently supported, it was previously
>>>>>> omitted from the list of required properties in the bindings documentation.
>>>>>> Adding this as a required property is not expected to break the ABI for
>>>>>> currently supported SoC.
>>>>>>
>>>>>> Marking #interconnect-cells as required to comply with Device Tree (DT)
>>>>>> binding requirements for interconnect providers.
>>>>>
>>>>> DT bindings do not require interconnect-cells, so that's not a correct
>>>>> reason. Drop them from required properties.
>>>>
>>>> "Mark #interconnect-cells as required to allow consuming the provided
>>>> interconnect endpoints"?
>>>
>>>
>>> The point is they do not have to be required.
>>
>> The reason for adding this property as required is to enforce
>> the DTS to define this important resource correctly. If this property
>> is missed from the DTS, the client driver such as PPE driver will not
>> be able to initialize correctly. This is necessary irrespective of
>> whether these clocks are enabled by bootloader or not. The IPQ9574 SoC
>> DTS defines this property even though the property was not marked as
>> mandatory in the bindings, and hence the PPE driver is working.
>>
>> By now marking it as required, we can enforce that DTS files going
>> forward for newer SoC (IPQ5424 and later) are properly defining this
>> resource. This prevents any DTS misconfiguration and improves bindings
>> validation as new SoCs are introduced.
>
> So you explain to the DT maintainer how the DT works. Well, thank you,
> everyday I can learn something.
>
> You wasted a lot of our (multiple maintainers) time in the past, so I
> will just NAK your patches instead of wasting time again.
>
> Best regards,
> Krzysztof
My sincere apologies for the misunderstanding and inconvenience my
previous response has caused. I can assure you that my intention
was never to describe the DT subsystem working, and am sorry that
it has come out as such.
I am committed to learning and continuously improving the quality
of my contributions, and co-operating with reviewers and maintainers
by following their feedback.
I will update the patch accordingly to remove this property marking
as required. Thank you very much for your support.
next prev parent reply other threads:[~2025-09-17 15:47 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-09 13:39 [PATCH v5 00/10] Add Network Subsystem (NSS) clock controller support for IPQ5424 SoC Luo Jie
2025-09-09 13:39 ` [PATCH v5 01/10] clk: qcom: gcc-ipq5424: Correct the icc_first_node_id Luo Jie
2025-09-09 13:39 ` [PATCH v5 02/10] dt-bindings: clock: Add required "interconnect-cells" property Luo Jie
2025-09-12 7:04 ` Krzysztof Kozlowski
2025-09-12 9:13 ` Konrad Dybcio
2025-09-12 9:13 ` Konrad Dybcio
2025-09-12 9:17 ` Krzysztof Kozlowski
2025-09-12 9:21 ` Konrad Dybcio
2025-09-12 9:27 ` Krzysztof Kozlowski
2025-09-12 9:41 ` Konrad Dybcio
2025-09-12 9:16 ` Krzysztof Kozlowski
2025-09-16 14:03 ` Luo Jie
2025-09-17 0:35 ` Krzysztof Kozlowski
2025-09-17 15:47 ` Luo Jie [this message]
2025-09-09 13:39 ` [PATCH v5 03/10] dt-bindings: interconnect: Add Qualcomm IPQ5424 NSSNOC IDs Luo Jie
2025-09-09 13:39 ` [PATCH v5 04/10] clk: qcom: gcc-ipq5424: Enable NSS NoC clocks to use icc-clk Luo Jie
2025-09-09 13:39 ` [PATCH v5 05/10] dt-bindings: clock: gcc-ipq5424: Add definition for GPLL0_OUT_AUX Luo Jie
2025-09-09 13:39 ` [PATCH v5 06/10] clk: qcom: gcc-ipq5424: Add gpll0_out_aux clock Luo Jie
2025-09-09 13:39 ` [PATCH v5 07/10] dt-bindings: clock: qcom: Add NSS clock controller for IPQ5424 SoC Luo Jie
2025-09-12 7:08 ` Krzysztof Kozlowski
2025-09-09 13:39 ` [PATCH v5 08/10] clk: qcom: Add NSS clock controller driver for IPQ5424 Luo Jie
2025-09-09 13:39 ` [PATCH v5 09/10] arm64: dts: qcom: ipq5424: Add NSS clock controller node Luo Jie
2025-09-09 13:39 ` [PATCH v5 10/10] arm64: defconfig: Build NSS clock controller driver for IPQ5424 Luo Jie
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