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From: liweihang <liweihang@huawei.com>
To: chenglang <chenglang@huawei.com>,
	"dledford@redhat.com" <dledford@redhat.com>,
	"jgg@nvidia.com" <jgg@nvidia.com>
Cc: "leon@kernel.org" <leon@kernel.org>,
	"linux-rdma@vger.kernel.org" <linux-rdma@vger.kernel.org>,
	"linuxarm@openeuler.org" <linuxarm@openeuler.org>
Subject: Re: [PATCH for-next 2/6] RDMA/hns: Remove unsupported CMDQ mode
Date: Sun, 7 Feb 2021 08:15:09 +0000	[thread overview]
Message-ID: <11e5e5424ad94e329c11e7a7a77f585e@huawei.com> (raw)
In-Reply-To: aabcf1a1-1cdf-5d05-cc11-daa36f9f10fa@huawei.com

On 2021/2/7 15:52, chenglang wrote:
> 
> On 2021/2/4 14:23, Weihang Li wrote:
>> From: Lang Cheng <chenglang@huawei.com>
>>
>> HIP08/09 only supports CMDQ in non-interrupt mode, and the firmware always
>> ignores the flag to indicate the mode. Therefore, remove the dead code.
>>
>> Fixes: a04ff739f2a9 ("RDMA/hns: Add command queue support for hip08 RoCE driver")
>> Signed-off-by: Lang Cheng <chenglang@huawei.com>
>> Signed-off-by: Weihang Li <liweihang@huawei.com>
>> ---
>>  drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 24 ++++++++----------------
>>  drivers/infiniband/hw/hns/hns_roce_hw_v2.h |  2 --
>>  2 files changed, 8 insertions(+), 18 deletions(-)
>>
>> diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
>> index 7a5a41d..260c17c 100644
>> --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
>> +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
>> @@ -1197,8 +1197,7 @@ static void hns_roce_cmq_setup_basic_desc(struct hns_roce_cmq_desc *desc,
>>  {
>>  	memset((void *)desc, 0, sizeof(struct hns_roce_cmq_desc));
>>  	desc->opcode = cpu_to_le16(opcode);
>> -	desc->flag =
>> -		cpu_to_le16(HNS_ROCE_CMD_FLAG_NO_INTR | HNS_ROCE_CMD_FLAG_IN);
>> +	desc->flag = cpu_to_le16(HNS_ROCE_CMD_FLAG_IN);
>>  	if (is_read)
>>  		desc->flag |= cpu_to_le16(HNS_ROCE_CMD_FLAG_WR);
>>  	else
>> @@ -1275,18 +1274,12 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
>>  	/* Write to hardware */
>>  	roce_write(hr_dev, ROCEE_TX_CMQ_TAIL_REG, csq->next_to_use);
>>  
>> -	/*
>> -	 * If the command is sync, wait for the firmware to write back,
>> -	 * if multi descriptors to be sent, use the first one to check
>> -	 */
>> -	if (le16_to_cpu(desc->flag) & HNS_ROCE_CMD_FLAG_NO_INTR) {
>> -		do {
>> -			if (hns_roce_cmq_csq_done(hr_dev))
>> -				break;
>> -			udelay(1);
>> -			timeout++;
>> -		} while (timeout < priv->cmq.tx_timeout);
>> -	}
>> +	do {
>> +		if (hns_roce_cmq_csq_done(hr_dev))
>> +			break;
>> +		udelay(1);
>> +		timeout++;
>> +	} while (timeout < priv->cmq.tx_timeout);
>>  
>>  	if (hns_roce_cmq_csq_done(hr_dev)) {
>>  		handle = 0;
>> @@ -1626,8 +1619,7 @@ static int hns_roce_set_vf_switch_param(struct hns_roce_dev *hr_dev, int vf_id)
>>  	if (ret)
>>  		return ret;
>>  
>> -	desc.flag =
>> -		cpu_to_le16(HNS_ROCE_CMD_FLAG_NO_INTR | HNS_ROCE_CMD_FLAG_IN);
> 
> The old firmware needs this redundant flag, it is best cleaned up after the
> firmware version is released.
> 
> Thanks.

Got it, I will drop this one from the series.

Thanks
Weihang

> 
>> +	desc.flag = cpu_to_le16(HNS_ROCE_CMD_FLAG_IN);
>>  	desc.flag &= cpu_to_le16(~HNS_ROCE_CMD_FLAG_WR);
>>  	roce_set_bit(swt->cfg, VF_SWITCH_DATA_CFG_ALW_LPBK_S, 1);
>>  	roce_set_bit(swt->cfg, VF_SWITCH_DATA_CFG_ALW_LCL_LPBK_S, 0);
>> diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
>> index 9f97e32..986a287 100644
>> --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
>> +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
>> @@ -128,14 +128,12 @@
>>  #define HNS_ROCE_CMD_FLAG_OUT_VALID_SHIFT	1
>>  #define HNS_ROCE_CMD_FLAG_NEXT_SHIFT		2
>>  #define HNS_ROCE_CMD_FLAG_WR_OR_RD_SHIFT	3
>> -#define HNS_ROCE_CMD_FLAG_NO_INTR_SHIFT		4
>>  #define HNS_ROCE_CMD_FLAG_ERR_INTR_SHIFT	5
>>  
>>  #define HNS_ROCE_CMD_FLAG_IN		BIT(HNS_ROCE_CMD_FLAG_IN_VALID_SHIFT)
>>  #define HNS_ROCE_CMD_FLAG_OUT		BIT(HNS_ROCE_CMD_FLAG_OUT_VALID_SHIFT)
>>  #define HNS_ROCE_CMD_FLAG_NEXT		BIT(HNS_ROCE_CMD_FLAG_NEXT_SHIFT)
>>  #define HNS_ROCE_CMD_FLAG_WR		BIT(HNS_ROCE_CMD_FLAG_WR_OR_RD_SHIFT)
>> -#define HNS_ROCE_CMD_FLAG_NO_INTR	BIT(HNS_ROCE_CMD_FLAG_NO_INTR_SHIFT)
>>  #define HNS_ROCE_CMD_FLAG_ERR_INTR	BIT(HNS_ROCE_CMD_FLAG_ERR_INTR_SHIFT)
>>  
>>  #define HNS_ROCE_CMQ_DESC_NUM_S		3


  parent reply	other threads:[~2021-02-07  8:16 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-04  6:23 [PATCH for-next 0/6] RDMA/hns: Fix and refactor CMDQ related code Weihang Li
2021-02-04  6:23 ` [PATCH for-next 1/6] RDMA/hns: Remove unused member and variable of CMDQ Weihang Li
2021-02-04  6:23 ` [PATCH for-next 2/6] RDMA/hns: Remove unsupported CMDQ mode Weihang Li
     [not found]   ` <aabcf1a1-1cdf-5d05-cc11-daa36f9f10fa@huawei.com>
2021-02-07  8:15     ` liweihang [this message]
2021-02-07  8:53       ` Leon Romanovsky
2021-02-04  6:23 ` [PATCH for-next 3/6] RDMA/hns: Fixes missing error code of CMDQ Weihang Li
2021-02-04  6:23 ` [PATCH for-next 4/6] RDMA/hns: Remove redundant operations on CMDQ Weihang Li
2021-02-04  6:23 ` [PATCH for-next 5/6] RDMA/hns: Adjust fields and variables about CMDQ tail/head Weihang Li
2021-02-04  6:23 ` [PATCH for-next 6/6] RDMA/hns: Refactor process of posting CMDQ Weihang Li

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