From: Weihang Li <liweihang@huawei.com>
To: <dledford@redhat.com>, <jgg@nvidia.com>
Cc: <leon@kernel.org>, <linux-rdma@vger.kernel.org>,
<linuxarm@openeuler.org>
Subject: [PATCH for-next 5/6] RDMA/hns: Adjust fields and variables about CMDQ tail/head
Date: Thu, 4 Feb 2021 14:23:05 +0800 [thread overview]
Message-ID: <1612419786-39173-6-git-send-email-liweihang@huawei.com> (raw)
In-Reply-To: <1612419786-39173-1-git-send-email-liweihang@huawei.com>
From: Lang Cheng <chenglang@huawei.com>
The register 0x07014 is actually the head pointer of CMDQ, and 0x07010
means tail pointer. Current definitions are confusing, so rename them and
related variables.
The next_to_use of structure hns_roce_v2_cmq_ring has the same semantics as
head, merge them into one member. The next_to_clean of structure
hns_roce_v2_cmq_ring has the same semantics as tail. After deleting
next_to_clean, tail should also be deleted.
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_common.h | 4 ++--
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 37 +++++++++++++++--------------
drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 3 ---
3 files changed, 21 insertions(+), 23 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_common.h b/drivers/infiniband/hw/hns/hns_roce_common.h
index 3ca6e88..23c438c 100644
--- a/drivers/infiniband/hw/hns/hns_roce_common.h
+++ b/drivers/infiniband/hw/hns/hns_roce_common.h
@@ -364,8 +364,8 @@
#define ROCEE_TX_CMQ_BASEADDR_L_REG 0x07000
#define ROCEE_TX_CMQ_BASEADDR_H_REG 0x07004
#define ROCEE_TX_CMQ_DEPTH_REG 0x07008
-#define ROCEE_TX_CMQ_TAIL_REG 0x07010
-#define ROCEE_TX_CMQ_HEAD_REG 0x07014
+#define ROCEE_TX_CMQ_HEAD_REG 0x07010
+#define ROCEE_TX_CMQ_TAIL_REG 0x07014
#define ROCEE_RX_CMQ_BASEADDR_L_REG 0x07018
#define ROCEE_RX_CMQ_BASEADDR_H_REG 0x0701c
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 04ff0ec..23a69cf 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -1098,7 +1098,7 @@ static int hns_roce_init_cmq_ring(struct hns_roce_dev *hr_dev, bool ring_type)
&priv->cmq.csq : &priv->cmq.crq;
ring->flag = ring_type;
- ring->next_to_use = 0;
+ ring->head = 0;
return hns_roce_alloc_cmq_desc(hr_dev, ring);
}
@@ -1196,10 +1196,10 @@ static void hns_roce_cmq_setup_basic_desc(struct hns_roce_cmq_desc *desc,
static int hns_roce_cmq_csq_done(struct hns_roce_dev *hr_dev)
{
- u32 head = roce_read(hr_dev, ROCEE_TX_CMQ_HEAD_REG);
+ u32 tail = roce_read(hr_dev, ROCEE_TX_CMQ_TAIL_REG);
struct hns_roce_v2_priv *priv = hr_dev->priv;
- return head == priv->cmq.csq.next_to_use;
+ return tail == priv->cmq.csq.head;
}
static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
@@ -1211,25 +1211,25 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
u32 timeout = 0;
int handle = 0;
u16 desc_ret;
+ u32 tail;
int ret;
- int ntc;
spin_lock_bh(&csq->lock);
- ntc = csq->next_to_use;
+ tail = csq->head;
while (handle < num) {
- desc_to_use = &csq->desc[csq->next_to_use];
+ desc_to_use = &csq->desc[csq->head];
*desc_to_use = desc[handle];
dev_dbg(hr_dev->dev, "set cmq desc:\n");
- csq->next_to_use++;
- if (csq->next_to_use == csq->desc_num)
- csq->next_to_use = 0;
+ csq->head++;
+ if (csq->head == csq->desc_num)
+ csq->head = 0;
handle++;
}
/* Write to hardware */
- roce_write(hr_dev, ROCEE_TX_CMQ_TAIL_REG, csq->next_to_use);
+ roce_write(hr_dev, ROCEE_TX_CMQ_HEAD_REG, csq->head);
do {
if (hns_roce_cmq_csq_done(hr_dev))
@@ -1243,24 +1243,25 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
ret = 0;
while (handle < num) {
/* get the result of hardware write back */
- desc_to_use = &csq->desc[ntc];
+ desc_to_use = &csq->desc[tail];
desc[handle] = *desc_to_use;
dev_dbg(hr_dev->dev, "Get cmq desc:\n");
desc_ret = le16_to_cpu(desc[handle].retval);
if (unlikely(desc_ret != CMD_EXEC_SUCCESS))
ret = -EIO;
- ntc++;
+ tail++;
handle++;
- if (ntc == csq->desc_num)
- ntc = 0;
+ if (tail == csq->desc_num)
+ tail = 0;
}
} else {
/* FW/HW reset or incorrect number of desc */
- ntc = roce_read(hr_dev, ROCEE_TX_CMQ_HEAD_REG);
- dev_warn(hr_dev->dev, "CMDQ move head from %d to %d\n",
- csq->next_to_use, ntc);
- csq->next_to_use = ntc;
+ tail = roce_read(hr_dev, ROCEE_TX_CMQ_TAIL_REG);
+ dev_warn(hr_dev->dev, "CMDQ move tail from %d to %d\n",
+ csq->head, tail);
+ csq->head = tail;
+
ret = -EAGAIN;
}
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index db77d2c..691b757 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -1823,11 +1823,8 @@ struct hns_roce_v2_cmq_ring {
dma_addr_t desc_dma_addr;
struct hns_roce_cmq_desc *desc;
u32 head;
- u32 tail;
-
u16 buf_size;
u16 desc_num;
- int next_to_use;
u8 flag;
spinlock_t lock; /* command queue lock */
};
--
2.8.1
next prev parent reply other threads:[~2021-02-04 6:26 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-04 6:23 [PATCH for-next 0/6] RDMA/hns: Fix and refactor CMDQ related code Weihang Li
2021-02-04 6:23 ` [PATCH for-next 1/6] RDMA/hns: Remove unused member and variable of CMDQ Weihang Li
2021-02-04 6:23 ` [PATCH for-next 2/6] RDMA/hns: Remove unsupported CMDQ mode Weihang Li
[not found] ` <aabcf1a1-1cdf-5d05-cc11-daa36f9f10fa@huawei.com>
2021-02-07 8:15 ` liweihang
2021-02-07 8:53 ` Leon Romanovsky
2021-02-04 6:23 ` [PATCH for-next 3/6] RDMA/hns: Fixes missing error code of CMDQ Weihang Li
2021-02-04 6:23 ` [PATCH for-next 4/6] RDMA/hns: Remove redundant operations on CMDQ Weihang Li
2021-02-04 6:23 ` Weihang Li [this message]
2021-02-04 6:23 ` [PATCH for-next 6/6] RDMA/hns: Refactor process of posting CMDQ Weihang Li
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