* [PATCH for-next 1/6] RDMA/hns: Remove unused member and variable of CMDQ
2021-02-04 6:23 [PATCH for-next 0/6] RDMA/hns: Fix and refactor CMDQ related code Weihang Li
@ 2021-02-04 6:23 ` Weihang Li
2021-02-04 6:23 ` [PATCH for-next 2/6] RDMA/hns: Remove unsupported CMDQ mode Weihang Li
` (4 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Weihang Li @ 2021-02-04 6:23 UTC (permalink / raw)
To: dledford, jgg; +Cc: leon, linux-rdma, linuxarm
From: Lang Cheng <chenglang@huawei.com>
last_status of structure hns_roce_v2_cmq has never been used, and the
variable named 'complete' in __hns_roce_cmq_send() is meaningless.
Fixes: a04ff739f2a9 ("RDMA/hns: Add command queue support for hip08 RoCE driver")
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 9 +++------
drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 1 -
2 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index a5bbfb1..7a5a41d 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -1243,7 +1243,6 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
struct hns_roce_v2_priv *priv = hr_dev->priv;
struct hns_roce_v2_cmq_ring *csq = &priv->cmq.csq;
struct hns_roce_cmq_desc *desc_to_use;
- bool complete = false;
u32 timeout = 0;
int handle = 0;
u16 desc_ret;
@@ -1290,7 +1289,6 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
}
if (hns_roce_cmq_csq_done(hr_dev)) {
- complete = true;
handle = 0;
while (handle < num) {
/* get the result of hardware write back */
@@ -1302,16 +1300,15 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
ret = 0;
else
ret = -EIO;
- priv->cmq.last_status = desc_ret;
+
ntc++;
handle++;
if (ntc == csq->desc_num)
ntc = 0;
}
- }
-
- if (!complete)
+ } else {
ret = -EAGAIN;
+ }
/* clean the command send queue */
handle = hns_roce_cmq_csq_clean(hr_dev);
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index 69bc072..9f97e32 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -1839,7 +1839,6 @@ struct hns_roce_v2_cmq {
struct hns_roce_v2_cmq_ring csq;
struct hns_roce_v2_cmq_ring crq;
u16 tx_timeout;
- u16 last_status;
};
enum hns_roce_link_table_type {
--
2.8.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH for-next 2/6] RDMA/hns: Remove unsupported CMDQ mode
2021-02-04 6:23 [PATCH for-next 0/6] RDMA/hns: Fix and refactor CMDQ related code Weihang Li
2021-02-04 6:23 ` [PATCH for-next 1/6] RDMA/hns: Remove unused member and variable of CMDQ Weihang Li
@ 2021-02-04 6:23 ` Weihang Li
[not found] ` <aabcf1a1-1cdf-5d05-cc11-daa36f9f10fa@huawei.com>
2021-02-04 6:23 ` [PATCH for-next 3/6] RDMA/hns: Fixes missing error code of CMDQ Weihang Li
` (3 subsequent siblings)
5 siblings, 1 reply; 9+ messages in thread
From: Weihang Li @ 2021-02-04 6:23 UTC (permalink / raw)
To: dledford, jgg; +Cc: leon, linux-rdma, linuxarm
From: Lang Cheng <chenglang@huawei.com>
HIP08/09 only supports CMDQ in non-interrupt mode, and the firmware always
ignores the flag to indicate the mode. Therefore, remove the dead code.
Fixes: a04ff739f2a9 ("RDMA/hns: Add command queue support for hip08 RoCE driver")
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 24 ++++++++----------------
drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 2 --
2 files changed, 8 insertions(+), 18 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 7a5a41d..260c17c 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -1197,8 +1197,7 @@ static void hns_roce_cmq_setup_basic_desc(struct hns_roce_cmq_desc *desc,
{
memset((void *)desc, 0, sizeof(struct hns_roce_cmq_desc));
desc->opcode = cpu_to_le16(opcode);
- desc->flag =
- cpu_to_le16(HNS_ROCE_CMD_FLAG_NO_INTR | HNS_ROCE_CMD_FLAG_IN);
+ desc->flag = cpu_to_le16(HNS_ROCE_CMD_FLAG_IN);
if (is_read)
desc->flag |= cpu_to_le16(HNS_ROCE_CMD_FLAG_WR);
else
@@ -1275,18 +1274,12 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
/* Write to hardware */
roce_write(hr_dev, ROCEE_TX_CMQ_TAIL_REG, csq->next_to_use);
- /*
- * If the command is sync, wait for the firmware to write back,
- * if multi descriptors to be sent, use the first one to check
- */
- if (le16_to_cpu(desc->flag) & HNS_ROCE_CMD_FLAG_NO_INTR) {
- do {
- if (hns_roce_cmq_csq_done(hr_dev))
- break;
- udelay(1);
- timeout++;
- } while (timeout < priv->cmq.tx_timeout);
- }
+ do {
+ if (hns_roce_cmq_csq_done(hr_dev))
+ break;
+ udelay(1);
+ timeout++;
+ } while (timeout < priv->cmq.tx_timeout);
if (hns_roce_cmq_csq_done(hr_dev)) {
handle = 0;
@@ -1626,8 +1619,7 @@ static int hns_roce_set_vf_switch_param(struct hns_roce_dev *hr_dev, int vf_id)
if (ret)
return ret;
- desc.flag =
- cpu_to_le16(HNS_ROCE_CMD_FLAG_NO_INTR | HNS_ROCE_CMD_FLAG_IN);
+ desc.flag = cpu_to_le16(HNS_ROCE_CMD_FLAG_IN);
desc.flag &= cpu_to_le16(~HNS_ROCE_CMD_FLAG_WR);
roce_set_bit(swt->cfg, VF_SWITCH_DATA_CFG_ALW_LPBK_S, 1);
roce_set_bit(swt->cfg, VF_SWITCH_DATA_CFG_ALW_LCL_LPBK_S, 0);
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index 9f97e32..986a287 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -128,14 +128,12 @@
#define HNS_ROCE_CMD_FLAG_OUT_VALID_SHIFT 1
#define HNS_ROCE_CMD_FLAG_NEXT_SHIFT 2
#define HNS_ROCE_CMD_FLAG_WR_OR_RD_SHIFT 3
-#define HNS_ROCE_CMD_FLAG_NO_INTR_SHIFT 4
#define HNS_ROCE_CMD_FLAG_ERR_INTR_SHIFT 5
#define HNS_ROCE_CMD_FLAG_IN BIT(HNS_ROCE_CMD_FLAG_IN_VALID_SHIFT)
#define HNS_ROCE_CMD_FLAG_OUT BIT(HNS_ROCE_CMD_FLAG_OUT_VALID_SHIFT)
#define HNS_ROCE_CMD_FLAG_NEXT BIT(HNS_ROCE_CMD_FLAG_NEXT_SHIFT)
#define HNS_ROCE_CMD_FLAG_WR BIT(HNS_ROCE_CMD_FLAG_WR_OR_RD_SHIFT)
-#define HNS_ROCE_CMD_FLAG_NO_INTR BIT(HNS_ROCE_CMD_FLAG_NO_INTR_SHIFT)
#define HNS_ROCE_CMD_FLAG_ERR_INTR BIT(HNS_ROCE_CMD_FLAG_ERR_INTR_SHIFT)
#define HNS_ROCE_CMQ_DESC_NUM_S 3
--
2.8.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH for-next 3/6] RDMA/hns: Fixes missing error code of CMDQ
2021-02-04 6:23 [PATCH for-next 0/6] RDMA/hns: Fix and refactor CMDQ related code Weihang Li
2021-02-04 6:23 ` [PATCH for-next 1/6] RDMA/hns: Remove unused member and variable of CMDQ Weihang Li
2021-02-04 6:23 ` [PATCH for-next 2/6] RDMA/hns: Remove unsupported CMDQ mode Weihang Li
@ 2021-02-04 6:23 ` Weihang Li
2021-02-04 6:23 ` [PATCH for-next 4/6] RDMA/hns: Remove redundant operations on CMDQ Weihang Li
` (2 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Weihang Li @ 2021-02-04 6:23 UTC (permalink / raw)
To: dledford, jgg; +Cc: leon, linux-rdma, linuxarm
From: Lang Cheng <chenglang@huawei.com>
When posting a multi-descriptors command, the error code of previous failed
descriptors may be rewrote to 0 by a later successful descriptor.
Fixes: a04ff739f2a9 ("RDMA/hns: Add command queue support for hip08 RoCE driver")
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 260c17c..13f7897 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -1245,7 +1245,7 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
u32 timeout = 0;
int handle = 0;
u16 desc_ret;
- int ret = 0;
+ int ret;
int ntc;
spin_lock_bh(&csq->lock);
@@ -1283,15 +1283,14 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
if (hns_roce_cmq_csq_done(hr_dev)) {
handle = 0;
+ ret = 0;
while (handle < num) {
/* get the result of hardware write back */
desc_to_use = &csq->desc[ntc];
desc[handle] = *desc_to_use;
dev_dbg(hr_dev->dev, "Get cmq desc:\n");
desc_ret = le16_to_cpu(desc[handle].retval);
- if (desc_ret == CMD_EXEC_SUCCESS)
- ret = 0;
- else
+ if (unlikely(desc_ret != CMD_EXEC_SUCCESS))
ret = -EIO;
ntc++;
--
2.8.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH for-next 4/6] RDMA/hns: Remove redundant operations on CMDQ
2021-02-04 6:23 [PATCH for-next 0/6] RDMA/hns: Fix and refactor CMDQ related code Weihang Li
` (2 preceding siblings ...)
2021-02-04 6:23 ` [PATCH for-next 3/6] RDMA/hns: Fixes missing error code of CMDQ Weihang Li
@ 2021-02-04 6:23 ` Weihang Li
2021-02-04 6:23 ` [PATCH for-next 5/6] RDMA/hns: Adjust fields and variables about CMDQ tail/head Weihang Li
2021-02-04 6:23 ` [PATCH for-next 6/6] RDMA/hns: Refactor process of posting CMDQ Weihang Li
5 siblings, 0 replies; 9+ messages in thread
From: Weihang Li @ 2021-02-04 6:23 UTC (permalink / raw)
To: dledford, jgg; +Cc: leon, linux-rdma, linuxarm
From: Lang Cheng <chenglang@huawei.com>
CMDQ works serially, after each successful transmission, the head and tail
pointers will be equal, so there is no need to check whether the queue is
full. At the same time, since the descriptor of each transmission is new,
there is no need to perform a cleanup operation. Then, the field named
next_to_clean in structure hns_roce_v2_cmq_ring is redundant.
Fixes: a04ff739f2a9 ("RDMA/hns: Add command queue support for hip08 RoCE driver")
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 54 +++---------------------------
drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 1 -
2 files changed, 5 insertions(+), 50 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 13f7897..04ff0ec 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -1059,15 +1059,6 @@ static int hns_roce_v2_rst_process_cmd(struct hns_roce_dev *hr_dev)
return 0;
}
-static int hns_roce_cmq_space(struct hns_roce_v2_cmq_ring *ring)
-{
- int ntu = ring->next_to_use;
- int ntc = ring->next_to_clean;
- int used = (ntu - ntc + ring->desc_num) % ring->desc_num;
-
- return ring->desc_num - used - 1;
-}
-
static int hns_roce_alloc_cmq_desc(struct hns_roce_dev *hr_dev,
struct hns_roce_v2_cmq_ring *ring)
{
@@ -1107,7 +1098,6 @@ static int hns_roce_init_cmq_ring(struct hns_roce_dev *hr_dev, bool ring_type)
&priv->cmq.csq : &priv->cmq.crq;
ring->flag = ring_type;
- ring->next_to_clean = 0;
ring->next_to_use = 0;
return hns_roce_alloc_cmq_desc(hr_dev, ring);
@@ -1212,30 +1202,6 @@ static int hns_roce_cmq_csq_done(struct hns_roce_dev *hr_dev)
return head == priv->cmq.csq.next_to_use;
}
-static int hns_roce_cmq_csq_clean(struct hns_roce_dev *hr_dev)
-{
- struct hns_roce_v2_priv *priv = hr_dev->priv;
- struct hns_roce_v2_cmq_ring *csq = &priv->cmq.csq;
- struct hns_roce_cmq_desc *desc;
- u16 ntc = csq->next_to_clean;
- u32 head;
- int clean = 0;
-
- desc = &csq->desc[ntc];
- head = roce_read(hr_dev, ROCEE_TX_CMQ_HEAD_REG);
- while (head != ntc) {
- memset(desc, 0, sizeof(*desc));
- ntc++;
- if (ntc == csq->desc_num)
- ntc = 0;
- desc = &csq->desc[ntc];
- clean++;
- }
- csq->next_to_clean = ntc;
-
- return clean;
-}
-
static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
struct hns_roce_cmq_desc *desc, int num)
{
@@ -1250,15 +1216,6 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
spin_lock_bh(&csq->lock);
- if (num > hns_roce_cmq_space(csq)) {
- spin_unlock_bh(&csq->lock);
- return -EBUSY;
- }
-
- /*
- * Record the location of desc in the cmq for this time
- * which will be use for hardware to write back
- */
ntc = csq->next_to_use;
while (handle < num) {
@@ -1299,15 +1256,14 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
ntc = 0;
}
} else {
+ /* FW/HW reset or incorrect number of desc */
+ ntc = roce_read(hr_dev, ROCEE_TX_CMQ_HEAD_REG);
+ dev_warn(hr_dev->dev, "CMDQ move head from %d to %d\n",
+ csq->next_to_use, ntc);
+ csq->next_to_use = ntc;
ret = -EAGAIN;
}
- /* clean the command send queue */
- handle = hns_roce_cmq_csq_clean(hr_dev);
- if (handle != num)
- dev_warn(hr_dev->dev, "Cleaned %d, need to clean %d\n",
- handle, num);
-
spin_unlock_bh(&csq->lock);
return ret;
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index 986a287..db77d2c 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -1828,7 +1828,6 @@ struct hns_roce_v2_cmq_ring {
u16 buf_size;
u16 desc_num;
int next_to_use;
- int next_to_clean;
u8 flag;
spinlock_t lock; /* command queue lock */
};
--
2.8.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH for-next 5/6] RDMA/hns: Adjust fields and variables about CMDQ tail/head
2021-02-04 6:23 [PATCH for-next 0/6] RDMA/hns: Fix and refactor CMDQ related code Weihang Li
` (3 preceding siblings ...)
2021-02-04 6:23 ` [PATCH for-next 4/6] RDMA/hns: Remove redundant operations on CMDQ Weihang Li
@ 2021-02-04 6:23 ` Weihang Li
2021-02-04 6:23 ` [PATCH for-next 6/6] RDMA/hns: Refactor process of posting CMDQ Weihang Li
5 siblings, 0 replies; 9+ messages in thread
From: Weihang Li @ 2021-02-04 6:23 UTC (permalink / raw)
To: dledford, jgg; +Cc: leon, linux-rdma, linuxarm
From: Lang Cheng <chenglang@huawei.com>
The register 0x07014 is actually the head pointer of CMDQ, and 0x07010
means tail pointer. Current definitions are confusing, so rename them and
related variables.
The next_to_use of structure hns_roce_v2_cmq_ring has the same semantics as
head, merge them into one member. The next_to_clean of structure
hns_roce_v2_cmq_ring has the same semantics as tail. After deleting
next_to_clean, tail should also be deleted.
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_common.h | 4 ++--
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 37 +++++++++++++++--------------
drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 3 ---
3 files changed, 21 insertions(+), 23 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_common.h b/drivers/infiniband/hw/hns/hns_roce_common.h
index 3ca6e88..23c438c 100644
--- a/drivers/infiniband/hw/hns/hns_roce_common.h
+++ b/drivers/infiniband/hw/hns/hns_roce_common.h
@@ -364,8 +364,8 @@
#define ROCEE_TX_CMQ_BASEADDR_L_REG 0x07000
#define ROCEE_TX_CMQ_BASEADDR_H_REG 0x07004
#define ROCEE_TX_CMQ_DEPTH_REG 0x07008
-#define ROCEE_TX_CMQ_TAIL_REG 0x07010
-#define ROCEE_TX_CMQ_HEAD_REG 0x07014
+#define ROCEE_TX_CMQ_HEAD_REG 0x07010
+#define ROCEE_TX_CMQ_TAIL_REG 0x07014
#define ROCEE_RX_CMQ_BASEADDR_L_REG 0x07018
#define ROCEE_RX_CMQ_BASEADDR_H_REG 0x0701c
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 04ff0ec..23a69cf 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -1098,7 +1098,7 @@ static int hns_roce_init_cmq_ring(struct hns_roce_dev *hr_dev, bool ring_type)
&priv->cmq.csq : &priv->cmq.crq;
ring->flag = ring_type;
- ring->next_to_use = 0;
+ ring->head = 0;
return hns_roce_alloc_cmq_desc(hr_dev, ring);
}
@@ -1196,10 +1196,10 @@ static void hns_roce_cmq_setup_basic_desc(struct hns_roce_cmq_desc *desc,
static int hns_roce_cmq_csq_done(struct hns_roce_dev *hr_dev)
{
- u32 head = roce_read(hr_dev, ROCEE_TX_CMQ_HEAD_REG);
+ u32 tail = roce_read(hr_dev, ROCEE_TX_CMQ_TAIL_REG);
struct hns_roce_v2_priv *priv = hr_dev->priv;
- return head == priv->cmq.csq.next_to_use;
+ return tail == priv->cmq.csq.head;
}
static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
@@ -1211,25 +1211,25 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
u32 timeout = 0;
int handle = 0;
u16 desc_ret;
+ u32 tail;
int ret;
- int ntc;
spin_lock_bh(&csq->lock);
- ntc = csq->next_to_use;
+ tail = csq->head;
while (handle < num) {
- desc_to_use = &csq->desc[csq->next_to_use];
+ desc_to_use = &csq->desc[csq->head];
*desc_to_use = desc[handle];
dev_dbg(hr_dev->dev, "set cmq desc:\n");
- csq->next_to_use++;
- if (csq->next_to_use == csq->desc_num)
- csq->next_to_use = 0;
+ csq->head++;
+ if (csq->head == csq->desc_num)
+ csq->head = 0;
handle++;
}
/* Write to hardware */
- roce_write(hr_dev, ROCEE_TX_CMQ_TAIL_REG, csq->next_to_use);
+ roce_write(hr_dev, ROCEE_TX_CMQ_HEAD_REG, csq->head);
do {
if (hns_roce_cmq_csq_done(hr_dev))
@@ -1243,24 +1243,25 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
ret = 0;
while (handle < num) {
/* get the result of hardware write back */
- desc_to_use = &csq->desc[ntc];
+ desc_to_use = &csq->desc[tail];
desc[handle] = *desc_to_use;
dev_dbg(hr_dev->dev, "Get cmq desc:\n");
desc_ret = le16_to_cpu(desc[handle].retval);
if (unlikely(desc_ret != CMD_EXEC_SUCCESS))
ret = -EIO;
- ntc++;
+ tail++;
handle++;
- if (ntc == csq->desc_num)
- ntc = 0;
+ if (tail == csq->desc_num)
+ tail = 0;
}
} else {
/* FW/HW reset or incorrect number of desc */
- ntc = roce_read(hr_dev, ROCEE_TX_CMQ_HEAD_REG);
- dev_warn(hr_dev->dev, "CMDQ move head from %d to %d\n",
- csq->next_to_use, ntc);
- csq->next_to_use = ntc;
+ tail = roce_read(hr_dev, ROCEE_TX_CMQ_TAIL_REG);
+ dev_warn(hr_dev->dev, "CMDQ move tail from %d to %d\n",
+ csq->head, tail);
+ csq->head = tail;
+
ret = -EAGAIN;
}
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index db77d2c..691b757 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -1823,11 +1823,8 @@ struct hns_roce_v2_cmq_ring {
dma_addr_t desc_dma_addr;
struct hns_roce_cmq_desc *desc;
u32 head;
- u32 tail;
-
u16 buf_size;
u16 desc_num;
- int next_to_use;
u8 flag;
spinlock_t lock; /* command queue lock */
};
--
2.8.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH for-next 6/6] RDMA/hns: Refactor process of posting CMDQ
2021-02-04 6:23 [PATCH for-next 0/6] RDMA/hns: Fix and refactor CMDQ related code Weihang Li
` (4 preceding siblings ...)
2021-02-04 6:23 ` [PATCH for-next 5/6] RDMA/hns: Adjust fields and variables about CMDQ tail/head Weihang Li
@ 2021-02-04 6:23 ` Weihang Li
5 siblings, 0 replies; 9+ messages in thread
From: Weihang Li @ 2021-02-04 6:23 UTC (permalink / raw)
To: dledford, jgg; +Cc: leon, linux-rdma, linuxarm
From: Lang Cheng <chenglang@huawei.com>
Simplify __hns_roce_cmq_send() then remove the redundant variables.
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 39 ++++++++++++------------------
1 file changed, 16 insertions(+), 23 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 23a69cf..69b210a 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -1207,25 +1207,20 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
{
struct hns_roce_v2_priv *priv = hr_dev->priv;
struct hns_roce_v2_cmq_ring *csq = &priv->cmq.csq;
- struct hns_roce_cmq_desc *desc_to_use;
u32 timeout = 0;
- int handle = 0;
u16 desc_ret;
u32 tail;
int ret;
+ int i;
spin_lock_bh(&csq->lock);
tail = csq->head;
- while (handle < num) {
- desc_to_use = &csq->desc[csq->head];
- *desc_to_use = desc[handle];
- dev_dbg(hr_dev->dev, "set cmq desc:\n");
- csq->head++;
+ for (i = 0; i < num; i++) {
+ csq->desc[csq->head++] = desc[i];
if (csq->head == csq->desc_num)
csq->head = 0;
- handle++;
}
/* Write to hardware */
@@ -1235,25 +1230,23 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
if (hns_roce_cmq_csq_done(hr_dev))
break;
udelay(1);
- timeout++;
- } while (timeout < priv->cmq.tx_timeout);
+ } while (++timeout < priv->cmq.tx_timeout);
if (hns_roce_cmq_csq_done(hr_dev)) {
- handle = 0;
- ret = 0;
- while (handle < num) {
- /* get the result of hardware write back */
- desc_to_use = &csq->desc[tail];
- desc[handle] = *desc_to_use;
- dev_dbg(hr_dev->dev, "Get cmq desc:\n");
- desc_ret = le16_to_cpu(desc[handle].retval);
- if (unlikely(desc_ret != CMD_EXEC_SUCCESS))
- ret = -EIO;
-
- tail++;
- handle++;
+ for (ret = 0, i = 0; i < num; i++) {
+ /* check the result of hardware write back */
+ desc[i] = csq->desc[tail++];
if (tail == csq->desc_num)
tail = 0;
+
+ desc_ret = le16_to_cpu(desc[i].retval);
+ if (likely(desc_ret == CMD_EXEC_SUCCESS))
+ continue;
+
+ dev_err_ratelimited(hr_dev->dev,
+ "Cmdq IO error, opcode = %x, return = %x\n",
+ desc->opcode, desc_ret);
+ ret = -EIO;
}
} else {
/* FW/HW reset or incorrect number of desc */
--
2.8.1
^ permalink raw reply related [flat|nested] 9+ messages in thread