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From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: linus.walleij@linaro.org, linux-renesas-soc@vger.kernel.org,
	laurent.pinchart@ideasonboard.com, linux-gpio@vger.kernel.org,
	geert+renesas@glider.be
Subject: [PATCH] pinctrl: sh-pfc: r8a7792: add EtherAVB pin groups
Date: Mon, 04 Jul 2016 22:52:20 +0300	[thread overview]
Message-ID: <1734030.FmmGtJt7OA@wasted.cogentembedded.com> (raw)
In-Reply-To: <1501145.5ro9yfox2Z@wasted.cogentembedded.com>

Add the EtherAVB pin groups to the R8A7792 PFC driver.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
The patch is against the 'devel' branch of Linus Walleij's 'linux-pinctrl.git'
repo plus my 2 PFC patches posted last week...

 drivers/pinctrl/sh-pfc/pfc-r8a7792.c |   91 +++++++++++++++++++++++++++++++++++
 1 file changed, 91 insertions(+)

Index: linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7792.c
===================================================================
--- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/pfc-r8a7792.c
+++ linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7792.c
@@ -728,6 +728,81 @@ static const struct sh_pfc_pin pinmux_pi
 	PINMUX_GPIO_GP_ALL(),
 };
 
+/* - AVB -------------------------------------------------------------------- */
+static const unsigned int avb_link_pins[] = {
+	RCAR_GP_PIN(7, 9),
+};
+static const unsigned int avb_link_mux[] = {
+	AVB_LINK_MARK,
+};
+static const unsigned int avb_magic_pins[] = {
+	RCAR_GP_PIN(7, 10),
+};
+static const unsigned int avb_magic_mux[] = {
+	AVB_MAGIC_MARK,
+};
+static const unsigned int avb_phy_int_pins[] = {
+	RCAR_GP_PIN(7, 11),
+};
+static const unsigned int avb_phy_int_mux[] = {
+	AVB_PHY_INT_MARK,
+};
+static const unsigned int avb_mdio_pins[] = {
+	RCAR_GP_PIN(7, 7), RCAR_GP_PIN(7, 8),
+};
+static const unsigned int avb_mdio_mux[] = {
+	AVB_MDC_MARK, AVB_MDIO_MARK,
+};
+static const unsigned int avb_mii_pins[] = {
+	RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15), RCAR_GP_PIN(6, 16),
+	RCAR_GP_PIN(6, 12),
+
+	RCAR_GP_PIN(6, 2),  RCAR_GP_PIN(6, 3),  RCAR_GP_PIN(6, 4),
+	RCAR_GP_PIN(6, 5),
+
+	RCAR_GP_PIN(6, 10), RCAR_GP_PIN(6, 0),  RCAR_GP_PIN(6, 1),
+	RCAR_GP_PIN(7, 12), RCAR_GP_PIN(6, 13), RCAR_GP_PIN(7, 5),
+	RCAR_GP_PIN(7, 0),  RCAR_GP_PIN(6, 11),
+};
+static const unsigned int avb_mii_mux[] = {
+	AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK,
+	AVB_TXD3_MARK,
+
+	AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK,
+	AVB_RXD3_MARK,
+
+	AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK,
+	AVB_CRS_MARK, AVB_TX_EN_MARK, AVB_TX_ER_MARK,
+	AVB_TX_CLK_MARK, AVB_COL_MARK,
+};
+static const unsigned int avb_gmii_pins[] = {
+	RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15), RCAR_GP_PIN(6, 16),
+	RCAR_GP_PIN(6, 12), RCAR_GP_PIN(7, 1),  RCAR_GP_PIN(7, 2),
+	RCAR_GP_PIN(7, 3),  RCAR_GP_PIN(7, 4),
+
+	RCAR_GP_PIN(6, 2),  RCAR_GP_PIN(6, 3), RCAR_GP_PIN(6, 4),
+	RCAR_GP_PIN(6, 5),  RCAR_GP_PIN(6, 6), RCAR_GP_PIN(6, 7),
+	RCAR_GP_PIN(6, 8),  RCAR_GP_PIN(6, 9),
+
+	RCAR_GP_PIN(6, 10), RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1),
+	RCAR_GP_PIN(7, 12), RCAR_GP_PIN(7, 6), RCAR_GP_PIN(7, 13),
+	RCAR_GP_PIN(6, 13), RCAR_GP_PIN(7, 5), RCAR_GP_PIN(7, 0),
+	RCAR_GP_PIN(6, 11),
+};
+static const unsigned int avb_gmii_mux[] = {
+	AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK,
+	AVB_TXD3_MARK, AVB_TXD4_MARK, AVB_TXD5_MARK,
+	AVB_TXD6_MARK, AVB_TXD7_MARK,
+
+	AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK,
+	AVB_RXD3_MARK, AVB_RXD4_MARK, AVB_RXD5_MARK,
+	AVB_RXD6_MARK, AVB_RXD7_MARK,
+
+	AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK,
+	AVB_CRS_MARK, AVB_GTX_CLK_MARK, AVB_GTXREFCLK_MARK,
+	AVB_TX_EN_MARK, AVB_TX_ER_MARK, AVB_TX_CLK_MARK,
+	AVB_COL_MARK,
+};
 /* - INTC ------------------------------------------------------------------- */
 static const unsigned int intc_irq0_pins[] = {
 	/* IRQ0 */
@@ -853,6 +928,12 @@ static const unsigned int scif3_clk_mux[
 };
 
 static const struct sh_pfc_pin_group pinmux_groups[] = {
+	SH_PFC_PIN_GROUP(avb_link),
+	SH_PFC_PIN_GROUP(avb_magic),
+	SH_PFC_PIN_GROUP(avb_phy_int),
+	SH_PFC_PIN_GROUP(avb_mdio),
+	SH_PFC_PIN_GROUP(avb_mii),
+	SH_PFC_PIN_GROUP(avb_gmii),
 	SH_PFC_PIN_GROUP(intc_irq0),
 	SH_PFC_PIN_GROUP(intc_irq1),
 	SH_PFC_PIN_GROUP(intc_irq2),
@@ -872,6 +953,15 @@ static const struct sh_pfc_pin_group pin
 	SH_PFC_PIN_GROUP(scif3_clk),
 };
 
+static const char * const avb_groups[] = {
+	"avb_link",
+	"avb_magic",
+	"avb_phy_int",
+	"avb_mdio",
+	"avb_mii",
+	"avb_gmii",
+};
+
 static const char * const intc_groups[] = {
 	"intc_irq0",
 	"intc_irq1",
@@ -902,6 +992,7 @@ static const char * const scif3_groups[]
 };
 
 static const struct sh_pfc_function pinmux_functions[] = {
+	SH_PFC_FUNCTION(avb),
 	SH_PFC_FUNCTION(intc),
 	SH_PFC_FUNCTION(lbsc),
 	SH_PFC_FUNCTION(scif0),

       reply	other threads:[~2016-07-04 19:52 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1501145.5ro9yfox2Z@wasted.cogentembedded.com>
2016-07-04 19:52 ` Sergei Shtylyov [this message]
2016-07-05  6:57   ` [PATCH] pinctrl: sh-pfc: r8a7792: add EtherAVB pin groups Geert Uytterhoeven
2016-07-05 11:00     ` Sergei Shtylyov
2016-07-05 14:54     ` Linus Walleij
2016-07-05 15:46       ` Geert Uytterhoeven
2016-07-05 21:14         ` Linus Walleij
2016-07-06 17:18           ` Sergei Shtylyov
2016-07-05 21:53 ` [PATCH] gpio: rcar: document R8A7792 support Sergei Shtylyov
2016-07-07 11:10   ` Sergei Shtylyov
2016-07-07 14:11 ` [PATCH] gpio: rcar: add " Sergei Shtylyov
2016-07-11  7:49   ` Linus Walleij
2016-07-12 21:38 ` [PATCH v2] pinctrl: sh-pfc: r8a7792: add EtherAVB pin groups Sergei Shtylyov
2016-07-13  6:13   ` Geert Uytterhoeven
2016-07-14 12:09     ` Sergei Shtylyov
2016-07-12 21:40 ` [PATCH] pinctrl: sh-pfc: r8a7792: add SDHI " Sergei Shtylyov
2016-07-13  6:17   ` Geert Uytterhoeven
2016-08-04  7:44   ` Linus Walleij
2016-07-14 19:51 ` [PATCH] pinctrl: sh-pfc: r8a7792: add CAN " Sergei Shtylyov
2016-07-18  9:25   ` Geert Uytterhoeven
2016-07-22 13:51 ` [PATCH] pinctrl: sh-pfc: r8a7792: add missing pinmux data Sergei Shtylyov
2016-08-04  8:04   ` Linus Walleij
2016-08-04 13:39     ` Sergei Shtylyov
2016-08-08 10:32       ` Geert Uytterhoeven
2016-07-22 22:24 ` [PATCH] pinctrl: sh-pfc: r8a7792: add VIN pin groups Sergei Shtylyov
2016-08-03 19:51   ` Sergei Shtylyov
2016-08-05 20:52 ` [PATCH v2] " Sergei Shtylyov
2016-08-08 11:46   ` Geert Uytterhoeven
2016-08-05 20:54 ` [PATCH] pinctrl: sh-pfc: r8a7792: add DU " Sergei Shtylyov
2016-08-08 12:06   ` Geert Uytterhoeven
2016-09-02 21:49 ` Sergei Shtylyov
2016-09-02 21:50 ` [PATCH resend] pinctrl: sh-pfc: r8a7792: add QSPI " Sergei Shtylyov
2016-09-05  9:00   ` Geert Uytterhoeven
2016-09-07 21:49   ` Linus Walleij
2016-09-05 20:17 ` [PATCH] pinctrl: sh-pfc: r8a7792: add MSIOF " Sergei Shtylyov
2016-09-06  7:02   ` Geert Uytterhoeven

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