From: Conor Dooley <conor.dooley@microchip.com>
To: Andy Chiu <andy.chiu@sifive.com>
Cc: <linux-riscv@lists.infradead.org>, <palmer@dabbelt.com>,
<vineetg@rivosinc.com>, <bjorn@kernel.org>,
<greentime.hu@sifive.com>, <paul.walmsley@sifive.com>,
<guoren@linux.alibaba.com>, <anup@brainfault.org>,
<atishp@atishpatra.org>, <heiko.stuebner@vrull.eu>,
Albert Ou <aou@eecs.berkeley.edu>
Subject: Re: [v1, 6/6] riscv: vector: enable preemptive kernel-mode Vector to be built
Date: Mon, 17 Jul 2023 12:11:24 +0100 [thread overview]
Message-ID: <20230717-selective-lucid-272c4e74f4ae@wendy> (raw)
In-Reply-To: <20230715150032.6917-7-andy.chiu@sifive.com>
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Hey Andy,
On Sat, Jul 15, 2023 at 03:00:32PM +0000, Andy Chiu wrote:
> Add a Kconfig to let user decides whether kernel-mode Vector in a
> preemptive kernel should also run with preemption. If the config is 'N',
> then all kernel-mode Vector code are run with preemption disabled.
nit: "is run".
>
> Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
> ---
> arch/riscv/Kconfig | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index a9e8b697fefb..da6a45ea42ec 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -500,6 +500,16 @@ config RISCV_ISA_V_DEFAULT_ENABLE
>
> If you don't know what to do here, say Y.
>
> +config RISCV_ISA_V_PREEMPTIVE_KMV
> + bool "Run kernel-mode Vector with kernel preemption"
> + depends on PREEMPTION
> + depends on RISCV_ISA_V
> + default y
> + help
> + Ordinarily the kernel disables preemption before running in-kernel
> + Vector code. This config frees the kernel from disabling preemption
> + by adding meory on demand for tracking kernel's V-context.
s/meory/memory/
This should be part of the previous patch.
Thanks,
Conor.
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next prev parent reply other threads:[~2023-07-17 11:12 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-15 15:00 [v1, 0/6] riscv: support kernel-mode Vector Andy Chiu
2023-07-15 15:00 ` [v1, 1/6] riscv: sched: defer restoring Vector context for user Andy Chiu
2023-07-17 9:46 ` Conor Dooley
2023-07-17 16:03 ` Andy Chiu
2023-07-15 15:00 ` [v1, 2/6] riscv: Add support for kernel mode vector Andy Chiu
2023-07-17 10:22 ` Conor Dooley
2023-07-20 14:54 ` Andy Chiu
2023-07-15 15:00 ` [v1, 3/6] riscv: Add vector extension XOR implementation Andy Chiu
2023-07-17 10:25 ` Conor Dooley
2023-07-20 14:56 ` Andy Chiu
2023-07-15 15:00 ` [v1, 4/6] riscv: vector: do not pass task_struct into riscv_v_vstate_{save,restore}() Andy Chiu
2023-07-17 10:32 ` Conor Dooley
2023-07-20 14:59 ` Andy Chiu
2023-07-15 15:00 ` [v1, 5/6] riscv: vector: allow kernel-mode Vector with preemption Andy Chiu
2023-07-17 11:05 ` Conor Dooley
2023-07-20 15:13 ` Andy Chiu
2023-07-15 15:00 ` [v1, 6/6] riscv: vector: enable preemptive kernel-mode Vector to be built Andy Chiu
2023-07-17 11:11 ` Conor Dooley [this message]
2023-07-16 9:26 ` [v1, 0/6] riscv: support kernel-mode Vector Heiko Stuebner
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