public inbox for linux-riscv@lists.infradead.org
 help / color / mirror / Atom feed
* [PATCH] riscv: fix isa validation for virtual [ms]envcfg extension
@ 2024-07-30  7:38 Andy Chiu
  2024-07-30 13:14 ` Andrew Jones
  0 siblings, 1 reply; 2+ messages in thread
From: Andy Chiu @ 2024-07-30  7:38 UTC (permalink / raw)
  To: linux-riscv, palmer
  Cc: greentime.hu, guoren, bjorn, debug, Andy Chiu, Paul Walmsley,
	Albert Ou, Conor Dooley, Clément Léger, Evan Green,
	Andrew Jones, Charlie Jenkins

The exntension RISCV_ISA_EXT_XLINUXENVCFG was accidentally turned off
after introducing ISA validation. The reason is that this extension is
not in the riscv_isa_ext[] list, causing riscv_get_isa_ext_data() fail
to find a corresponding riscv_isa_ext_data pointer. As a result, the
kernel skipped setting resolved_isa bitmask. To fix this, we proceed
with the bit information obtained from source_isa bitmask. This means
that the bit in resolved_isa is set unconditionally, regardless of
whether we find an entry from riscv_isa_ext[] list. This should be safe
as the kernel already parse isa string before writing into source_isa.

Fixes: 625034abd52a ("riscv: add ISA extensions validation callback")
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
---
 arch/riscv/kernel/cpufeature.c | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index 8f20607adb40..3f91a1f39a50 100644
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -432,10 +432,7 @@ static void __init riscv_resolve_isa(unsigned long *source_isa,
 		bitmap_copy(prev_resolved_isa, resolved_isa, RISCV_ISA_EXT_MAX);
 		for_each_set_bit(bit, source_isa, RISCV_ISA_EXT_MAX) {
 			ext = riscv_get_isa_ext_data(bit);
-			if (!ext)
-				continue;
-
-			if (ext->validate) {
+			if (ext && ext->validate) {
 				ret = ext->validate(ext, resolved_isa);
 				if (ret == -EPROBE_DEFER) {
 					loop = true;
@@ -447,13 +444,13 @@ static void __init riscv_resolve_isa(unsigned long *source_isa,
 				}
 			}
 
-			set_bit(ext->id, resolved_isa);
+			set_bit(bit, resolved_isa);
 			/* No need to keep it in source isa now that it is enabled */
-			clear_bit(ext->id, source_isa);
+			clear_bit(bit, source_isa);
 
 			/* Single letter extensions get set in hwcap */
-			if (ext->id < RISCV_ISA_EXT_BASE)
-				*this_hwcap |= isa2hwcap[ext->id];
+			if (bit < RISCV_ISA_EXT_BASE)
+				*this_hwcap |= isa2hwcap[bit];
 		}
 	} while (loop && memcmp(prev_resolved_isa, resolved_isa, sizeof(prev_resolved_isa)));
 }
-- 
2.43.0


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] riscv: fix isa validation for virtual [ms]envcfg extension
  2024-07-30  7:38 [PATCH] riscv: fix isa validation for virtual [ms]envcfg extension Andy Chiu
@ 2024-07-30 13:14 ` Andrew Jones
  0 siblings, 0 replies; 2+ messages in thread
From: Andrew Jones @ 2024-07-30 13:14 UTC (permalink / raw)
  To: Andy Chiu
  Cc: linux-riscv, palmer, greentime.hu, guoren, bjorn, debug,
	Paul Walmsley, Albert Ou, Conor Dooley, Clément Léger,
	Evan Green, Charlie Jenkins, samuel.holland

On Tue, Jul 30, 2024 at 03:38:45PM GMT, Andy Chiu wrote:
> The exntension RISCV_ISA_EXT_XLINUXENVCFG was accidentally turned off
> after introducing ISA validation. The reason is that this extension is
> not in the riscv_isa_ext[] list, causing riscv_get_isa_ext_data() fail
> to find a corresponding riscv_isa_ext_data pointer. As a result, the
> kernel skipped setting resolved_isa bitmask. To fix this, we proceed
> with the bit information obtained from source_isa bitmask. This means
> that the bit in resolved_isa is set unconditionally, regardless of
> whether we find an entry from riscv_isa_ext[] list. This should be safe
> as the kernel already parse isa string before writing into source_isa.
> 
> Fixes: 625034abd52a ("riscv: add ISA extensions validation callback")
> Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
> ---
>  arch/riscv/kernel/cpufeature.c | 13 +++++--------
>  1 file changed, 5 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index 8f20607adb40..3f91a1f39a50 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -432,10 +432,7 @@ static void __init riscv_resolve_isa(unsigned long *source_isa,
>  		bitmap_copy(prev_resolved_isa, resolved_isa, RISCV_ISA_EXT_MAX);
>  		for_each_set_bit(bit, source_isa, RISCV_ISA_EXT_MAX) {
>  			ext = riscv_get_isa_ext_data(bit);
> -			if (!ext)
> -				continue;
> -
> -			if (ext->validate) {
> +			if (ext && ext->validate) {
>  				ret = ext->validate(ext, resolved_isa);
>  				if (ret == -EPROBE_DEFER) {
>  					loop = true;
> @@ -447,13 +444,13 @@ static void __init riscv_resolve_isa(unsigned long *source_isa,
>  				}
>  			}
>  
> -			set_bit(ext->id, resolved_isa);
> +			set_bit(bit, resolved_isa);
>  			/* No need to keep it in source isa now that it is enabled */
> -			clear_bit(ext->id, source_isa);
> +			clear_bit(bit, source_isa);
>  
>  			/* Single letter extensions get set in hwcap */
> -			if (ext->id < RISCV_ISA_EXT_BASE)
> -				*this_hwcap |= isa2hwcap[ext->id];
> +			if (bit < RISCV_ISA_EXT_BASE)
> +				*this_hwcap |= isa2hwcap[bit];
>  		}
>  	} while (loop && memcmp(prev_resolved_isa, resolved_isa, sizeof(prev_resolved_isa)));
>  }
> -- 
> 2.43.0
>

Hi Andy,

This looks like the same solution that Samuel sent which is currently
under discussion[1].

[1] https://lore.kernel.org/all/20240718213011.2600150-1-samuel.holland@sifive.com/

Thanks,
drew

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2024-07-30 13:14 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-07-30  7:38 [PATCH] riscv: fix isa validation for virtual [ms]envcfg extension Andy Chiu
2024-07-30 13:14 ` Andrew Jones

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox