* Re: [PATCH] riscv: defconfig: sophgo: enable clks for sg2042
2024-08-05 2:33 [PATCH] riscv: defconfig: sophgo: enable clks for sg2042 Chen Wang
@ 2024-08-06 9:30 ` Emil Renner Berthing
2024-08-07 0:45 ` Chen Wang
2024-08-09 6:26 ` Chen Wang
2024-08-19 17:02 ` Conor Dooley
2 siblings, 1 reply; 7+ messages in thread
From: Emil Renner Berthing @ 2024-08-06 9:30 UTC (permalink / raw)
To: Chen Wang, paul.walmsley, palmer, aou, inochiama, conor.dooley,
guoren, emil.renner.berthing, apatel, hal.feng, dfustini,
prabhakar.mahadev-lad.rj, linux-riscv, linux-kernel, haijiao.liu,
xiaoguang.xing
Cc: Chen Wang
Chen Wang wrote:
> From: Chen Wang <unicorn_wang@outlook.com>
>
> Enable clk generators for sg2042 due to many peripherals rely on
> these clocks.
>
> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
> ---
> arch/riscv/configs/defconfig | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 0d678325444f..d43a028909e5 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -249,6 +249,9 @@ CONFIG_VIRTIO_BALLOON=y
> CONFIG_VIRTIO_INPUT=y
> CONFIG_VIRTIO_MMIO=y
> CONFIG_CLK_SOPHGO_CV1800=y
> +CONFIG_CLK_SOPHGO_SG2042_PLL=y
> +CONFIG_CLK_SOPHGO_SG2042_CLKGEN=y
> +CONFIG_CLK_SOPHGO_SG2042_RPGATE=y
> CONFIG_SUN8I_DE2_CCU=m
> CONFIG_RENESAS_OSTM=y
> CONFIG_SUN50I_IOMMU=y
Are these all critical to boot or could they be modules?
/Emil
>
> base-commit: de9c2c66ad8e787abec7c9d7eff4f8c3cdd28aed
> --
> 2.34.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] riscv: defconfig: sophgo: enable clks for sg2042
2024-08-06 9:30 ` Emil Renner Berthing
@ 2024-08-07 0:45 ` Chen Wang
0 siblings, 0 replies; 7+ messages in thread
From: Chen Wang @ 2024-08-07 0:45 UTC (permalink / raw)
To: Emil Renner Berthing, paul.walmsley, palmer, aou, inochiama,
conor.dooley, guoren, apatel, hal.feng, dfustini,
prabhakar.mahadev-lad.rj, linux-riscv, linux-kernel, haijiao.liu,
xiaoguang.xing
On 2024/8/6 17:30, Emil Renner Berthing wrote:
> Chen Wang wrote:
>> From: Chen Wang <unicorn_wang@outlook.com>
>>
>> Enable clk generators for sg2042 due to many peripherals rely on
>> these clocks.
>>
>> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
>> ---
>> arch/riscv/configs/defconfig | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
>> index 0d678325444f..d43a028909e5 100644
>> --- a/arch/riscv/configs/defconfig
>> +++ b/arch/riscv/configs/defconfig
>> @@ -249,6 +249,9 @@ CONFIG_VIRTIO_BALLOON=y
>> CONFIG_VIRTIO_INPUT=y
>> CONFIG_VIRTIO_MMIO=y
>> CONFIG_CLK_SOPHGO_CV1800=y
>> +CONFIG_CLK_SOPHGO_SG2042_PLL=y
>> +CONFIG_CLK_SOPHGO_SG2042_CLKGEN=y
>> +CONFIG_CLK_SOPHGO_SG2042_RPGATE=y
>> CONFIG_SUN8I_DE2_CCU=m
>> CONFIG_RENESAS_OSTM=y
>> CONFIG_SUN50I_IOMMU=y
> Are these all critical to boot or could they be modules?
>
> /Emil
Since 6.11, sg2042.dtsi has been changed and uart now has dependency on
clocks and boot into minimal console will fail without this.
The sg2042 clock is configured as builtin to facilitate bootup in
initramfs with defconfig build.
Regards.
Chen
>> base-commit: de9c2c66ad8e787abec7c9d7eff4f8c3cdd28aed
>> --
>> 2.34.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] riscv: defconfig: sophgo: enable clks for sg2042
2024-08-05 2:33 [PATCH] riscv: defconfig: sophgo: enable clks for sg2042 Chen Wang
2024-08-06 9:30 ` Emil Renner Berthing
@ 2024-08-09 6:26 ` Chen Wang
2024-08-15 0:09 ` Chen Wang
2024-08-19 17:02 ` Conor Dooley
2 siblings, 1 reply; 7+ messages in thread
From: Chen Wang @ 2024-08-09 6:26 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: Chen Wang, paul.walmsley, aou, inochiama, conor.dooley, guoren,
emil.renner.berthing, apatel, hal.feng, dfustini,
prabhakar.mahadev-lad.rj, linux-riscv, linux-kernel, haijiao.liu,
xiaoguang.xing
On 2024/8/5 10:33, Chen Wang wrote:
> From: Chen Wang <unicorn_wang@outlook.com>
>
> Enable clk generators for sg2042 due to many peripherals rely on
> these clocks.
>
> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
> ---
> arch/riscv/configs/defconfig | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 0d678325444f..d43a028909e5 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -249,6 +249,9 @@ CONFIG_VIRTIO_BALLOON=y
> CONFIG_VIRTIO_INPUT=y
> CONFIG_VIRTIO_MMIO=y
> CONFIG_CLK_SOPHGO_CV1800=y
> +CONFIG_CLK_SOPHGO_SG2042_PLL=y
> +CONFIG_CLK_SOPHGO_SG2042_CLKGEN=y
> +CONFIG_CLK_SOPHGO_SG2042_RPGATE=y
> CONFIG_SUN8I_DE2_CCU=m
> CONFIG_RENESAS_OSTM=y
> CONFIG_SUN50I_IOMMU=y
>
> base-commit: de9c2c66ad8e787abec7c9d7eff4f8c3cdd28aed
Hi，Palmer,
Could you please have a look on this patch and pick it for next tree?
These clk drivers are required for sg2042 to boot into minimal console.
Thanks,
Chen
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] riscv: defconfig: sophgo: enable clks for sg2042
2024-08-09 6:26 ` Chen Wang
@ 2024-08-15 0:09 ` Chen Wang
0 siblings, 0 replies; 7+ messages in thread
From: Chen Wang @ 2024-08-15 0:09 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: Chen Wang, paul.walmsley, aou, inochiama, conor.dooley, guoren,
emil.renner.berthing, apatel, hal.feng, dfustini,
prabhakar.mahadev-lad.rj, linux-riscv, linux-kernel, haijiao.liu,
xiaoguang.xing
Hi, Palmer,
Could you please pick this into riscv/for-next?
Thanks,
Chen
On 2024/8/9 14:26, Chen Wang wrote:
>
> On 2024/8/5 10:33, Chen Wang wrote:
>> From: Chen Wang <unicorn_wang@outlook.com>
>>
>> Enable clk generators for sg2042 due to many peripherals rely on
>> these clocks.
>>
>> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
>> ---
>> arch/riscv/configs/defconfig | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
>> index 0d678325444f..d43a028909e5 100644
>> --- a/arch/riscv/configs/defconfig
>> +++ b/arch/riscv/configs/defconfig
>> @@ -249,6 +249,9 @@ CONFIG_VIRTIO_BALLOON=y
>> CONFIG_VIRTIO_INPUT=y
>> CONFIG_VIRTIO_MMIO=y
>> CONFIG_CLK_SOPHGO_CV1800=y
>> +CONFIG_CLK_SOPHGO_SG2042_PLL=y
>> +CONFIG_CLK_SOPHGO_SG2042_CLKGEN=y
>> +CONFIG_CLK_SOPHGO_SG2042_RPGATE=y
>> CONFIG_SUN8I_DE2_CCU=m
>> CONFIG_RENESAS_OSTM=y
>> CONFIG_SUN50I_IOMMU=y
>>
>> base-commit: de9c2c66ad8e787abec7c9d7eff4f8c3cdd28aed
>
> Hi，Palmer,
>
> Could you please have a look on this patch and pick it for next tree?
> These clk drivers are required for sg2042 to boot into minimal console.
>
> Thanks,
>
> Chen
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] riscv: defconfig: sophgo: enable clks for sg2042
2024-08-05 2:33 [PATCH] riscv: defconfig: sophgo: enable clks for sg2042 Chen Wang
2024-08-06 9:30 ` Emil Renner Berthing
2024-08-09 6:26 ` Chen Wang
@ 2024-08-19 17:02 ` Conor Dooley
2024-08-19 23:49 ` Chen Wang
2 siblings, 1 reply; 7+ messages in thread
From: Conor Dooley @ 2024-08-19 17:02 UTC (permalink / raw)
To: paul.walmsley, palmer, aou, inochiama, guoren,
emil.renner.berthing, apatel, hal.feng, dfustini,
prabhakar.mahadev-lad.rj, linux-riscv, linux-kernel, haijiao.liu,
xiaoguang.xing, Chen Wang
Cc: conor, Conor Dooley, Chen Wang
From: Conor Dooley <conor.dooley@microchip.com>
On Mon, 05 Aug 2024 10:33:20 +0800, Chen Wang wrote:
> Enable clk generators for sg2042 due to many peripherals rely on
> these clocks.
>
>
Applied to riscv-config-for-next, thanks!
[1/1] riscv: defconfig: sophgo: enable clks for sg2042
https://git.kernel.org/conor/c/3ccedd259cc3
Thanks,
Conor.
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^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] riscv: defconfig: sophgo: enable clks for sg2042
2024-08-19 17:02 ` Conor Dooley
@ 2024-08-19 23:49 ` Chen Wang
0 siblings, 0 replies; 7+ messages in thread
From: Chen Wang @ 2024-08-19 23:49 UTC (permalink / raw)
To: Conor Dooley
Cc: Conor Dooley, paul.walmsley, palmer, aou, inochiama, guoren,
emil.renner.berthing, apatel, hal.feng, dfustini,
prabhakar.mahadev-lad.rj, linux-riscv, linux-kernel, haijiao.liu,
xiaoguang.xing, Chen Wang
On 2024/8/20 1:02, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> On Mon, 05 Aug 2024 10:33:20 +0800, Chen Wang wrote:
>> Enable clk generators for sg2042 due to many peripherals rely on
>> these clocks.
>>
>>
> Applied to riscv-config-for-next, thanks!
>
> [1/1] riscv: defconfig: sophgo: enable clks for sg2042
> https://git.kernel.org/conor/c/3ccedd259cc3
>
> Thanks,
> Conor.
Thanks a lot.
Regards,
Chen
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^ permalink raw reply [flat|nested] 7+ messages in thread