From: Xu Lu <luxu.kernel@bytedance.com>
To: pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
alex@ghiti.fr, apatel@ventanamicro.com, guoren@kernel.org
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Xu Lu <luxu.kernel@bytedance.com>
Subject: [RFC PATCH v1 3/4] riscv: mm: Enqueue tlbflush info if task is not running on target cpu
Date: Thu, 30 Oct 2025 21:56:51 +0800 [thread overview]
Message-ID: <20251030135652.63837-4-luxu.kernel@bytedance.com> (raw)
In-Reply-To: <20251030135652.63837-1-luxu.kernel@bytedance.com>
When need to flush tlb of a remote cpu, we only send ipi to the target
cpu if the task is currently running on it. Otherwise, we only enqueue
the tlb flush info in target cpu's tlb flush queue.
Signed-off-by: Xu Lu <luxu.kernel@bytedance.com>
---
arch/riscv/mm/tlbflush.c | 30 +++++++++++++++++++++++++++++-
1 file changed, 29 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c
index aa8f1304ae5c4..f4333c3a6d251 100644
--- a/arch/riscv/mm/tlbflush.c
+++ b/arch/riscv/mm/tlbflush.c
@@ -115,6 +115,32 @@ DEFINE_PER_CPU(struct tlb_flush_queue, tlb_flush_queue) = {
.len = 0,
};
+static bool should_ipi_flush(int cpu, void *info)
+{
+ struct tlb_flush_queue *queue = per_cpu_ptr(&tlb_flush_queue, cpu);
+ struct flush_tlb_range_data *d = info;
+ unsigned long flags;
+
+ if (per_cpu(loaded_asid, cpu) == d->asid)
+ return true;
+
+ raw_spin_lock_irqsave(&queue->lock, flags);
+ if (queue->len < TLB_FLUSH_QUEUE_SIZE) {
+ queue->tasks[queue->len] = *d;
+ queue->len++;
+ } else {
+ raw_spin_unlock_irqrestore(&queue->lock, flags);
+ return true;
+ }
+ raw_spin_unlock_irqrestore(&queue->lock, flags);
+
+ /* Recheck whether loaded_asid changed during enqueueing task */
+ if (per_cpu(loaded_asid, cpu) == d->asid)
+ return true;
+
+ return false;
+}
+
static void __ipi_flush_tlb_range_asid(void *info)
{
struct flush_tlb_range_data *d = info;
@@ -152,7 +178,9 @@ static void __flush_tlb_range(struct mm_struct *mm,
ftd.start = start;
ftd.size = size;
ftd.stride = stride;
- on_each_cpu_mask(cmask, __ipi_flush_tlb_range_asid, &ftd, 1);
+ on_each_cpu_cond_mask(should_ipi_flush,
+ __ipi_flush_tlb_range_asid,
+ &ftd, 1, cmask);
}
put_cpu();
--
2.20.1
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next prev parent reply other threads:[~2025-10-30 13:57 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-30 13:56 [RFC PATCH v1 0/4] riscv: mm: Defer tlb flush to context_switch Xu Lu
2025-10-30 13:56 ` [RFC PATCH v1 1/4] riscv: mm: Introduce percpu loaded_asid Xu Lu
2025-10-30 13:56 ` [RFC PATCH v1 2/4] riscv: mm: Introduce percpu tlb flush queue Xu Lu
2025-10-30 13:56 ` Xu Lu [this message]
2025-10-30 13:56 ` [RFC PATCH v1 4/4] riscv: mm: Perform tlb flush during context_switch Xu Lu
2025-11-03 3:44 ` Guo Ren
2025-11-03 3:44 ` [RFC PATCH v1 0/4] riscv: mm: Defer tlb flush to context_switch Guo Ren
2025-11-03 7:06 ` [External] " Xu Lu
2025-11-07 1:55 ` Guo Ren
2025-11-07 3:03 ` [External] " Xu Lu
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