From: Andrew Jones <andrew.jones@oss.qualcomm.com>
To: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
kvm-riscv@lists.infradead.org
Cc: "Paul Walmsley" <pjw@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Anup Patel" <anup@brainfault.org>,
"Clément Léger" <cleger@rivosinc.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Guodong Xu" <guodong@riscstar.com>,
"Charlie Jenkins" <charlie@rivosinc.com>,
"Charlie Jenkins" <thecharlesjenkins@gmail.com>,
"Samuel Holland" <samuel.holland@sifive.com>
Subject: [RFC PATCH v1 07/11] riscv: Export have_user_pmlen* booleans
Date: Thu, 5 Feb 2026 18:23:45 -0600 [thread overview]
Message-ID: <20260206002349.96740-8-andrew.jones@oss.qualcomm.com> (raw)
In-Reply-To: <20260206002349.96740-1-andrew.jones@oss.qualcomm.com>
A following patch will need to access have_user_pmlen_7 from
another file.
Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com>
---
arch/riscv/kernel/process.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c
index 31a392993cb4..4fa14aff7f8d 100644
--- a/arch/riscv/kernel/process.c
+++ b/arch/riscv/kernel/process.c
@@ -274,8 +274,8 @@ enum {
PMLEN_16 = 16,
};
-static bool have_user_pmlen_7;
-static bool have_user_pmlen_16;
+bool riscv_have_user_pmlen_7;
+bool riscv_have_user_pmlen_16;
/*
* Control the relaxed ABI allowing tagged user addresses into the kernel.
@@ -306,10 +306,10 @@ long set_tagged_addr_ctrl(struct task_struct *task, unsigned long arg)
pmlen = FIELD_GET(PR_PMLEN_MASK, arg);
if (pmlen == PMLEN_0) {
pmm = ENVCFG_PMM_PMLEN_0;
- } else if (pmlen <= PMLEN_7 && have_user_pmlen_7) {
+ } else if (pmlen <= PMLEN_7 && riscv_have_user_pmlen_7) {
pmlen = PMLEN_7;
pmm = ENVCFG_PMM_PMLEN_7;
- } else if (pmlen <= PMLEN_16 && have_user_pmlen_16) {
+ } else if (pmlen <= PMLEN_16 && riscv_have_user_pmlen_16) {
pmlen = PMLEN_16;
pmm = ENVCFG_PMM_PMLEN_16;
} else {
@@ -407,8 +407,8 @@ static int __init tagged_addr_init(void)
* Assume the supported PMLEN values are the same on all harts.
*/
csr_clear(CSR_ENVCFG, ENVCFG_PMM);
- have_user_pmlen_7 = try_to_set_pmm(ENVCFG_PMM_PMLEN_7);
- have_user_pmlen_16 = try_to_set_pmm(ENVCFG_PMM_PMLEN_16);
+ riscv_have_user_pmlen_7 = try_to_set_pmm(ENVCFG_PMM_PMLEN_7);
+ riscv_have_user_pmlen_16 = try_to_set_pmm(ENVCFG_PMM_PMLEN_16);
if (!register_sysctl("abi", tagged_addr_sysctl_table))
return -EINVAL;
--
2.43.0
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next prev parent reply other threads:[~2026-02-06 0:24 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-06 0:23 [RFC PATCH v1 00/11] riscv: hwprobe: Introduce rva23u64 base behavior Andrew Jones
2026-02-06 0:23 ` [RFC PATCH v1 01/11] riscv: hwprobe: add support for RISCV_HWPROBE_KEY_IMA_EXT_1 Andrew Jones
2026-02-06 0:23 ` [RFC PATCH v1 02/11] RISC-V: Add Zicclsm to cpufeature and hwprobe Andrew Jones
2026-02-06 0:23 ` [RFC PATCH v1 03/11] riscv: Standardize extension capitilization Andrew Jones
2026-02-06 0:23 ` [RFC PATCH v1 04/11] riscv: Add B to hwcap Andrew Jones
2026-02-21 10:49 ` Guodong Xu
2026-02-24 23:04 ` Andrew Jones
2026-03-06 2:17 ` Guodong Xu
2026-03-06 18:27 ` Andrew Jones
2026-03-06 18:50 ` Conor Dooley
2026-03-06 19:04 ` Andrew Jones
2026-02-06 0:23 ` [RFC PATCH v1 05/11] riscv: hwprobe.rst: Replace tabs with spaces Andrew Jones
2026-02-06 0:23 ` [RFC PATCH v1 06/11] riscv: Add Ziccamoa, Ziccif, Ziccrse, and Za64rs to hwprobe Andrew Jones
2026-02-21 10:50 ` Guodong Xu
2026-02-24 23:22 ` Andrew Jones
2026-02-06 0:23 ` Andrew Jones [this message]
2026-02-21 10:50 ` [RFC PATCH v1 07/11] riscv: Export have_user_pmlen* booleans Guodong Xu
2026-02-24 23:32 ` Andrew Jones
2026-02-06 0:23 ` [RFC PATCH v1 08/11] riscv: hwprobe: Introduce rva23u64 base behavior Andrew Jones
2026-02-08 16:15 ` Andrew Jones
2026-02-21 10:51 ` Guodong Xu
2026-02-25 0:03 ` Andrew Jones
2026-03-06 12:29 ` Guodong Xu
2026-03-06 18:31 ` Andrew Jones
2026-03-06 12:08 ` Guodong Xu
2026-03-06 18:33 ` Andrew Jones
2026-02-06 0:23 ` [RFC PATCH v1 09/11] riscv: selftests: hwprobe: Check rva23u64 consistency Andrew Jones
2026-02-06 0:23 ` [RFC PATCH v1 10/11] riscv: /proc/cpuinfo: Add rva23 bases to output Andrew Jones
2026-02-21 10:52 ` Guodong Xu
2026-02-25 0:08 ` Andrew Jones
2026-03-06 12:47 ` Guodong Xu
2026-03-06 18:34 ` Andrew Jones
2026-02-06 0:23 ` [RFC PATCH v1 11/11] riscv: /proc/cpuinfo: Also output rva20 and rva22 isa bases Andrew Jones
2026-03-05 0:58 ` [RFC PATCH v1 00/11] riscv: hwprobe: Introduce rva23u64 base behavior Charlie Jenkins
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