* [PATCH v2 1/6] dt-bindings: timer: thead,c900-aclint-mtimer: Add SpacemiT K3
2026-09-08 16:28 [PATCH v2 0/6] spacemit: k3: Replace bad CLINT node with ACLINT nodes Junhui Liu
@ 2026-09-08 16:28 ` Junhui Liu
2026-09-08 17:37 ` Conor Dooley
2026-09-08 16:28 ` [PATCH v2 2/6] dt-bindings: interrupt-controller: thead,c900-aclint-mswi: " Junhui Liu
` (4 subsequent siblings)
5 siblings, 1 reply; 11+ messages in thread
From: Junhui Liu @ 2026-09-08 16:28 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Yixun Lan, Inochi Amaoto, Radu Rendec,
Paul Walmsley, Samuel Holland, Palmer Dabbelt, Anup Patel,
Guodong Xu, Albert Ou, Alexandre Ghiti
Cc: linux-kernel, devicetree, linux-riscv, spacemit, Conor Dooley,
Junhui Liu
Add support for the SpacemiT K3 ACLINT MTIMER, which provides per-hart
timer interrupts in Machine mode.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
---
Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml b/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml
index cf7c82e980f6..082378b04d72 100644
--- a/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml
+++ b/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml
@@ -12,6 +12,7 @@ maintainers:
properties:
compatible:
oneOf:
+ - const: spacemit,k3-aclint-mtimer
- items:
- enum:
- sophgo,sg2042-aclint-mtimer
--
2.55.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v2 1/6] dt-bindings: timer: thead,c900-aclint-mtimer: Add SpacemiT K3
2026-09-08 16:28 ` [PATCH v2 1/6] dt-bindings: timer: thead,c900-aclint-mtimer: Add SpacemiT K3 Junhui Liu
@ 2026-09-08 17:37 ` Conor Dooley
0 siblings, 0 replies; 11+ messages in thread
From: Conor Dooley @ 2026-09-08 17:37 UTC (permalink / raw)
To: Junhui Liu
Cc: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Yixun Lan, Inochi Amaoto, Radu Rendec,
Paul Walmsley, Samuel Holland, Palmer Dabbelt, Anup Patel,
Guodong Xu, Albert Ou, Alexandre Ghiti, linux-kernel, devicetree,
linux-riscv, spacemit, Conor Dooley
[-- Attachment #1.1: Type: text/plain, Size: 1038 bytes --]
On Wed, Sep 09, 2026 at 12:28:44AM +0800, Junhui Liu wrote:
> Add support for the SpacemiT K3 ACLINT MTIMER, which provides per-hart
> timer interrupts in Machine mode.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
>
> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
> ---
> Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml b/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml
> index cf7c82e980f6..082378b04d72 100644
> --- a/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml
> +++ b/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml
> @@ -12,6 +12,7 @@ maintainers:
> properties:
> compatible:
> oneOf:
> + - const: spacemit,k3-aclint-mtimer
> - items:
> - enum:
> - sophgo,sg2042-aclint-mtimer
>
> --
> 2.55.0
>
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 161 bytes --]
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 2/6] dt-bindings: interrupt-controller: thead,c900-aclint-mswi: Add SpacemiT K3
2026-09-08 16:28 [PATCH v2 0/6] spacemit: k3: Replace bad CLINT node with ACLINT nodes Junhui Liu
2026-09-08 16:28 ` [PATCH v2 1/6] dt-bindings: timer: thead,c900-aclint-mtimer: Add SpacemiT K3 Junhui Liu
@ 2026-09-08 16:28 ` Junhui Liu
2026-09-08 17:37 ` Conor Dooley
2026-09-08 16:28 ` [PATCH v2 3/6] dt-bindings: interrupt-controller: thead,c900-aclint-sswi: " Junhui Liu
` (3 subsequent siblings)
5 siblings, 1 reply; 11+ messages in thread
From: Junhui Liu @ 2026-09-08 16:28 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Yixun Lan, Inochi Amaoto, Radu Rendec,
Paul Walmsley, Samuel Holland, Palmer Dabbelt, Anup Patel,
Guodong Xu, Albert Ou, Alexandre Ghiti
Cc: linux-kernel, devicetree, linux-riscv, spacemit, Conor Dooley,
Junhui Liu
Add support for the SpacemiT K3 ACLINT MSWI, which provides per-hart
software interrupts for inter-processor communication in Machine mode.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
---
.../devicetree/bindings/interrupt-controller/thead,c900-aclint-mswi.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-mswi.yaml b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-mswi.yaml
index 62fd220e126e..d17f5613612c 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-mswi.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-mswi.yaml
@@ -12,6 +12,7 @@ maintainers:
properties:
compatible:
oneOf:
+ - const: spacemit,k3-aclint-mswi
- items:
- enum:
- sophgo,sg2042-aclint-mswi
--
2.55.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v2 2/6] dt-bindings: interrupt-controller: thead,c900-aclint-mswi: Add SpacemiT K3
2026-09-08 16:28 ` [PATCH v2 2/6] dt-bindings: interrupt-controller: thead,c900-aclint-mswi: " Junhui Liu
@ 2026-09-08 17:37 ` Conor Dooley
0 siblings, 0 replies; 11+ messages in thread
From: Conor Dooley @ 2026-09-08 17:37 UTC (permalink / raw)
To: Junhui Liu
Cc: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Yixun Lan, Inochi Amaoto, Radu Rendec,
Paul Walmsley, Samuel Holland, Palmer Dabbelt, Anup Patel,
Guodong Xu, Albert Ou, Alexandre Ghiti, linux-kernel, devicetree,
linux-riscv, spacemit, Conor Dooley
[-- Attachment #1.1: Type: text/plain, Size: 75 bytes --]
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 161 bytes --]
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 3/6] dt-bindings: interrupt-controller: thead,c900-aclint-sswi: Add SpacemiT K3
2026-09-08 16:28 [PATCH v2 0/6] spacemit: k3: Replace bad CLINT node with ACLINT nodes Junhui Liu
2026-09-08 16:28 ` [PATCH v2 1/6] dt-bindings: timer: thead,c900-aclint-mtimer: Add SpacemiT K3 Junhui Liu
2026-09-08 16:28 ` [PATCH v2 2/6] dt-bindings: interrupt-controller: thead,c900-aclint-mswi: " Junhui Liu
@ 2026-09-08 16:28 ` Junhui Liu
2026-09-08 17:38 ` Conor Dooley
2026-09-08 16:28 ` [PATCH v2 4/6] dt-bindings: timer: sifive,clint: Deprecate spacemit,k3-clint Junhui Liu
` (2 subsequent siblings)
5 siblings, 1 reply; 11+ messages in thread
From: Junhui Liu @ 2026-09-08 16:28 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Yixun Lan, Inochi Amaoto, Radu Rendec,
Paul Walmsley, Samuel Holland, Palmer Dabbelt, Anup Patel,
Guodong Xu, Albert Ou, Alexandre Ghiti
Cc: linux-kernel, devicetree, linux-riscv, spacemit, Conor Dooley,
Junhui Liu
Add support for the SpacemiT K3 ACLINT SSWI, which provides
inter-processor interrupts in Supervisor mode without calling into
Machine-mode firmware.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
---
.../bindings/interrupt-controller/thead,c900-aclint-sswi.yaml | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml
index d02c6886283a..0b34ed5b4639 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml
@@ -24,12 +24,13 @@ description:
properties:
compatible:
oneOf:
+ - enum:
+ - mips,p8700-aclint-sswi
+ - spacemit,k3-aclint-sswi
- items:
- enum:
- sophgo,sg2044-aclint-sswi
- const: thead,c900-aclint-sswi
- - items:
- - const: mips,p8700-aclint-sswi
- items:
- enum:
- anlogic,dr1v90-aclint-sswi
--
2.55.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v2 3/6] dt-bindings: interrupt-controller: thead,c900-aclint-sswi: Add SpacemiT K3
2026-09-08 16:28 ` [PATCH v2 3/6] dt-bindings: interrupt-controller: thead,c900-aclint-sswi: " Junhui Liu
@ 2026-09-08 17:38 ` Conor Dooley
0 siblings, 0 replies; 11+ messages in thread
From: Conor Dooley @ 2026-09-08 17:38 UTC (permalink / raw)
To: Junhui Liu
Cc: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Yixun Lan, Inochi Amaoto, Radu Rendec,
Paul Walmsley, Samuel Holland, Palmer Dabbelt, Anup Patel,
Guodong Xu, Albert Ou, Alexandre Ghiti, linux-kernel, devicetree,
linux-riscv, spacemit, Conor Dooley
[-- Attachment #1.1: Type: text/plain, Size: 75 bytes --]
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 161 bytes --]
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 4/6] dt-bindings: timer: sifive,clint: Deprecate spacemit,k3-clint
2026-09-08 16:28 [PATCH v2 0/6] spacemit: k3: Replace bad CLINT node with ACLINT nodes Junhui Liu
` (2 preceding siblings ...)
2026-09-08 16:28 ` [PATCH v2 3/6] dt-bindings: interrupt-controller: thead,c900-aclint-sswi: " Junhui Liu
@ 2026-09-08 16:28 ` Junhui Liu
2026-09-08 16:49 ` Conor Dooley
2026-09-08 16:28 ` [PATCH v2 5/6] irqchip/aclint-sswi: Add support for SpacemiT K3 Junhui Liu
2026-09-08 16:28 ` [PATCH v2 6/6] riscv: dts: spacemit: k3: Replace incorrect CLINT node with ACLINT nodes Junhui Liu
5 siblings, 1 reply; 11+ messages in thread
From: Junhui Liu @ 2026-09-08 16:28 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Yixun Lan, Inochi Amaoto, Radu Rendec,
Paul Walmsley, Samuel Holland, Palmer Dabbelt, Anup Patel,
Guodong Xu, Albert Ou, Alexandre Ghiti
Cc: linux-kernel, devicetree, linux-riscv, spacemit, Conor Dooley,
Junhui Liu
The SpacemiT K3 implements separate ACLINT MSWI, MTIMER and SSWI
devices. The existing spacemit,k3-clint compatible incorrectly describes
the SSWI register space as a legacy CLINT.
Deprecate this compatible in favor of the K3-specific ACLINT
compatibles.
Fixes: 6cdeb30db4d8 ("dt-bindings: timer: add SpacemiT K3 CLINT")
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
---
Documentation/devicetree/bindings/timer/sifive,clint.yaml | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
index 3673836e14de..88b9be2230a1 100644
--- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
+++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
@@ -34,7 +34,6 @@ properties:
- microchip,pic64gx-clint # Microchip PIC64GX
- sifive,fu540-c000-clint # SiFive FU540
- spacemit,k1-clint # SpacemiT K1
- - spacemit,k3-clint # SpacemiT K3
- starfive,jh7100-clint # StarFive JH7100
- starfive,jh7110-clint # StarFive JH7110
- starfive,jh8100-clint # StarFive JH8100
@@ -62,6 +61,10 @@ properties:
- const: riscv,clint0
deprecated: true
description: For the QEMU virt machine only
+ - items:
+ - const: spacemit,k3-clint
+ - const: sifive,clint0
+ deprecated: true
description:
Should be "<vendor>,<chip>-clint", followed by "sifive,clint<version>"
--
2.55.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v2 4/6] dt-bindings: timer: sifive,clint: Deprecate spacemit,k3-clint
2026-09-08 16:28 ` [PATCH v2 4/6] dt-bindings: timer: sifive,clint: Deprecate spacemit,k3-clint Junhui Liu
@ 2026-09-08 16:49 ` Conor Dooley
0 siblings, 0 replies; 11+ messages in thread
From: Conor Dooley @ 2026-09-08 16:49 UTC (permalink / raw)
To: Junhui Liu
Cc: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Yixun Lan, Inochi Amaoto, Radu Rendec,
Paul Walmsley, Samuel Holland, Palmer Dabbelt, Anup Patel,
Guodong Xu, Albert Ou, Alexandre Ghiti, linux-kernel, devicetree,
linux-riscv, spacemit, Conor Dooley
[-- Attachment #1.1: Type: text/plain, Size: 1953 bytes --]
On Wed, Sep 09, 2026 at 12:28:47AM +0800, Junhui Liu wrote:
> The SpacemiT K3 implements separate ACLINT MSWI, MTIMER and SSWI
> devices. The existing spacemit,k3-clint compatible incorrectly describes
> the SSWI register space as a legacy CLINT.
>
> Deprecate this compatible in favor of the K3-specific ACLINT
> compatibles.
If it is this badly wrong, please just delete it.
Leaving it deprecated implies that it is frowned upon but still works.
pw-bot: changes-requested
Thanks,
Conor.
>
> Fixes: 6cdeb30db4d8 ("dt-bindings: timer: add SpacemiT K3 CLINT")
> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
> ---
> Documentation/devicetree/bindings/timer/sifive,clint.yaml | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> index 3673836e14de..88b9be2230a1 100644
> --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> @@ -34,7 +34,6 @@ properties:
> - microchip,pic64gx-clint # Microchip PIC64GX
> - sifive,fu540-c000-clint # SiFive FU540
> - spacemit,k1-clint # SpacemiT K1
> - - spacemit,k3-clint # SpacemiT K3
> - starfive,jh7100-clint # StarFive JH7100
> - starfive,jh7110-clint # StarFive JH7110
> - starfive,jh8100-clint # StarFive JH8100
> @@ -62,6 +61,10 @@ properties:
> - const: riscv,clint0
> deprecated: true
> description: For the QEMU virt machine only
> + - items:
> + - const: spacemit,k3-clint
> + - const: sifive,clint0
> + deprecated: true
>
> description:
> Should be "<vendor>,<chip>-clint", followed by "sifive,clint<version>"
>
> --
> 2.55.0
>
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 161 bytes --]
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 5/6] irqchip/aclint-sswi: Add support for SpacemiT K3
2026-09-08 16:28 [PATCH v2 0/6] spacemit: k3: Replace bad CLINT node with ACLINT nodes Junhui Liu
` (3 preceding siblings ...)
2026-09-08 16:28 ` [PATCH v2 4/6] dt-bindings: timer: sifive,clint: Deprecate spacemit,k3-clint Junhui Liu
@ 2026-09-08 16:28 ` Junhui Liu
2026-09-08 16:28 ` [PATCH v2 6/6] riscv: dts: spacemit: k3: Replace incorrect CLINT node with ACLINT nodes Junhui Liu
5 siblings, 0 replies; 11+ messages in thread
From: Junhui Liu @ 2026-09-08 16:28 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Yixun Lan, Inochi Amaoto, Radu Rendec,
Paul Walmsley, Samuel Holland, Palmer Dabbelt, Anup Patel,
Guodong Xu, Albert Ou, Alexandre Ghiti
Cc: linux-kernel, devicetree, linux-riscv, spacemit, Conor Dooley,
Junhui Liu
Add a match entry for the spacemit,k3-aclint-sswi compatible. The K3
SSWI device requires no special handling and can use the existing
generic ACLINT SSWI initialization function.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
---
drivers/irqchip/irq-aclint-sswi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/irqchip/irq-aclint-sswi.c b/drivers/irqchip/irq-aclint-sswi.c
index ca06efd86fa1..d3ef2cd3b5c5 100644
--- a/drivers/irqchip/irq-aclint-sswi.c
+++ b/drivers/irqchip/irq-aclint-sswi.c
@@ -179,6 +179,7 @@ static int __init generic_aclint_sswi_early_probe(struct device_node *node,
}
IRQCHIP_DECLARE(mips_p8700_sswi, "mips,p8700-aclint-sswi", generic_aclint_sswi_early_probe);
IRQCHIP_DECLARE(nuclei_ux900_sswi, "nuclei,ux900-aclint-sswi", generic_aclint_sswi_early_probe);
+IRQCHIP_DECLARE(spacemit_k3_sswi, "spacemit,k3-aclint-sswi", generic_aclint_sswi_early_probe);
/* THEAD variant */
#define THEAD_C9XX_CSR_SXSTATUS 0x5c0
--
2.55.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v2 6/6] riscv: dts: spacemit: k3: Replace incorrect CLINT node with ACLINT nodes
2026-09-08 16:28 [PATCH v2 0/6] spacemit: k3: Replace bad CLINT node with ACLINT nodes Junhui Liu
` (4 preceding siblings ...)
2026-09-08 16:28 ` [PATCH v2 5/6] irqchip/aclint-sswi: Add support for SpacemiT K3 Junhui Liu
@ 2026-09-08 16:28 ` Junhui Liu
5 siblings, 0 replies; 11+ messages in thread
From: Junhui Liu @ 2026-09-08 16:28 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Yixun Lan, Inochi Amaoto, Radu Rendec,
Paul Walmsley, Samuel Holland, Palmer Dabbelt, Anup Patel,
Guodong Xu, Albert Ou, Alexandre Ghiti
Cc: linux-kernel, devicetree, linux-riscv, spacemit, Conor Dooley,
Junhui Liu
The K3 implements separate ACLINT MSWI, MTIMER and SSWI devices.
The existing CLINT node at 0xe081c000 incorrectly describes the SSWI
register space as a legacy CLINT.
Replace the CLINT node with an SSWI interrupt controller using the
K3-specific compatible and supervisor software interrupt IDs. Add
the MSWI and MTIMER nodes to describe the machine-level devices
for firmware such as OpenSBI.
Use the secure addresses for MSWI and MTIMER, as their non-secure
aliases are inaccessible. Keep SSWI at its non-secure address,
0xe081c000, because an efuse bit can restrict access to its secure
alias at 0xf181c000 to Machine mode.
Fixes: 56f37e391a62 ("riscv: dts: spacemit: add initial support for K3 SoC")
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
---
arch/riscv/boot/dts/spacemit/k3.dtsi | 37 ++++++++++++++++++++++++++----------
1 file changed, 27 insertions(+), 10 deletions(-)
diff --git a/arch/riscv/boot/dts/spacemit/k3.dtsi b/arch/riscv/boot/dts/spacemit/k3.dtsi
index c3f2dce0969c..7ca662fe4cbe 100644
--- a/arch/riscv/boot/dts/spacemit/k3.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k3.dtsi
@@ -1261,17 +1261,15 @@ saplic: interrupt-controller@e0804000 {
riscv,num-sources = <512>;
};
- clint: timer@e081c000 {
- compatible = "spacemit,k3-clint", "sifive,clint0";
+ aclint_sswi: interrupt-controller@e081c000 {
+ compatible = "spacemit,k3-aclint-sswi";
reg = <0x0 0xe081c000 0x0 0x4000>;
- interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
- <&cpu1_intc 3>, <&cpu1_intc 7>,
- <&cpu2_intc 3>, <&cpu2_intc 7>,
- <&cpu3_intc 3>, <&cpu3_intc 7>,
- <&cpu4_intc 3>, <&cpu4_intc 7>,
- <&cpu5_intc 3>, <&cpu5_intc 7>,
- <&cpu6_intc 3>, <&cpu6_intc 7>,
- <&cpu7_intc 3>, <&cpu7_intc 7>;
+ #interrupt-cells = <0>;
+ interrupt-controller;
+ interrupts-extended = <&cpu0_intc 1>, <&cpu1_intc 1>,
+ <&cpu2_intc 1>, <&cpu3_intc 1>,
+ <&cpu4_intc 1>, <&cpu5_intc 1>,
+ <&cpu6_intc 1>, <&cpu7_intc 1>;
};
/* sec_i2c3: 0xf0614000, not available from Linux */
@@ -1305,5 +1303,24 @@ maplic: interrupt-controller@f1800000 {
riscv,num-sources = <512>;
status = "reserved";
};
+
+ aclint_mswi: interrupt-controller@f1810000 {
+ compatible = "spacemit,k3-aclint-mswi";
+ reg = <0x0 0xf1810000 0x0 0x4000>;
+ interrupts-extended = <&cpu0_intc 3>, <&cpu1_intc 3>,
+ <&cpu2_intc 3>, <&cpu3_intc 3>,
+ <&cpu4_intc 3>, <&cpu5_intc 3>,
+ <&cpu6_intc 3>, <&cpu7_intc 3>;
+ };
+
+ aclint_mtimer: timer@f1814000 {
+ compatible = "spacemit,k3-aclint-mtimer";
+ reg = <0x0 0xf1814000 0x0 0x8000>;
+ reg-names = "mtimecmp";
+ interrupts-extended = <&cpu0_intc 7>, <&cpu1_intc 7>,
+ <&cpu2_intc 7>, <&cpu3_intc 7>,
+ <&cpu4_intc 7>, <&cpu5_intc 7>,
+ <&cpu6_intc 7>, <&cpu7_intc 7>;
+ };
};
};
--
2.55.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 11+ messages in thread