Linux-RISC-V Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Pu Lehui <pulehui@huawei.com>
To: Peilin Ye <yepeilin@google.com>, <bpf@vger.kernel.org>
Cc: linux-riscv@lists.infradead.org,
	"Andrea Parri" <parri.andrea@gmail.com>,
	"Björn Töpel" <bjorn@kernel.org>,
	"Puranjay Mohan" <puranjay@kernel.org>,
	"Alexei Starovoitov" <ast@kernel.org>,
	"Daniel Borkmann" <daniel@iogearbox.net>,
	"Andrii Nakryiko" <andrii@kernel.org>,
	"Martin KaFai Lau" <martin.lau@linux.dev>,
	"Eduard Zingerman" <eddyz87@gmail.com>,
	"Paul E. McKenney" <paulmck@kernel.org>,
	"Song Liu" <song@kernel.org>,
	"Yonghong Song" <yonghong.song@linux.dev>,
	"John Fastabend" <john.fastabend@gmail.com>,
	"KP Singh" <kpsingh@kernel.org>,
	"Stanislav Fomichev" <sdf@fomichev.me>,
	"Hao Luo" <haoluo@google.com>, "Jiri Olsa" <jolsa@kernel.org>,
	"Luke Nelson" <luke.r.nels@gmail.com>,
	"Xi Wang" <xi.wang@gmail.com>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Mykola Lysenko" <mykolal@fb.com>,
	"Shuah Khan" <shuah@kernel.org>, "Josh Don" <joshdon@google.com>,
	"Barret Rhoden" <brho@google.com>,
	"Neel Natu" <neelnatu@google.com>,
	"Benjamin Segall" <bsegall@google.com>
Subject: Re: [PATCH bpf-next 6/8] selftests/bpf: Avoid passing out-of-range values to __retval()
Date: Tue, 6 May 2025 22:23:09 +0800	[thread overview]
Message-ID: <22ecc626-0982-4cff-adfd-9ea4bb658ee5@huawei.com> (raw)
In-Reply-To: <5f7e4c5ac5d254c0f42b4ba274437262e238a5cb.1745970908.git.yepeilin@google.com>



On 2025/4/30 8:51, Peilin Ye wrote:
> Currently, we pass 0x1234567890abcdef to __retval() for the following
> two tests:
> 
>    verifier_load_acquire/load_acquire_64
>    verifier_store_release/store_release_64
> 
> However, the upper 32 bits of that value are being ignored, since
> __retval() expects an int.  Actually, the tests would still pass even if
> I change '__retval(0x1234567890abcdef)' to e.g. '__retval(0x90abcdef)'.
> 
> Restructure the tests a bit to test the entire 64-bit values properly.
> Do the same to their 8-, 16- and 32-bit variants as well to keep the
> style consistent.
> 
> Fixes: ff3afe5da998 ("selftests/bpf: Add selftests for load-acquire and store-release instructions")
> Signed-off-by: Peilin Ye <yepeilin@google.com>
> ---
>   .../bpf/progs/verifier_load_acquire.c         | 40 +++++++++++++------
>   .../bpf/progs/verifier_store_release.c        | 32 +++++++++++----
>   2 files changed, 52 insertions(+), 20 deletions(-)
> 
> diff --git a/tools/testing/selftests/bpf/progs/verifier_load_acquire.c b/tools/testing/selftests/bpf/progs/verifier_load_acquire.c
> index 77698d5a19e4..a696ab84bfd6 100644
> --- a/tools/testing/selftests/bpf/progs/verifier_load_acquire.c
> +++ b/tools/testing/selftests/bpf/progs/verifier_load_acquire.c
> @@ -10,65 +10,81 @@
>   
>   SEC("socket")
>   __description("load-acquire, 8-bit")
> -__success __success_unpriv __retval(0x12)
> +__success __success_unpriv __retval(0)
>   __naked void load_acquire_8(void)
>   {
>   	asm volatile (
> +	"r0 = 0;"
>   	"w1 = 0x12;"
>   	"*(u8 *)(r10 - 1) = w1;"
> -	".8byte %[load_acquire_insn];" // w0 = load_acquire((u8 *)(r10 - 1));
> +	".8byte %[load_acquire_insn];" // w2 = load_acquire((u8 *)(r10 - 1));
> +	"if r2 == r1 goto 1f;"
> +	"r0 = 1;"
> +"1:"
>   	"exit;"
>   	:
>   	: __imm_insn(load_acquire_insn,
> -		     BPF_ATOMIC_OP(BPF_B, BPF_LOAD_ACQ, BPF_REG_0, BPF_REG_10, -1))
> +		     BPF_ATOMIC_OP(BPF_B, BPF_LOAD_ACQ, BPF_REG_2, BPF_REG_10, -1))
>   	: __clobber_all);
>   }
>   
>   SEC("socket")
>   __description("load-acquire, 16-bit")
> -__success __success_unpriv __retval(0x1234)
> +__success __success_unpriv __retval(0)
>   __naked void load_acquire_16(void)
>   {
>   	asm volatile (
> +	"r0 = 0;"
>   	"w1 = 0x1234;"
>   	"*(u16 *)(r10 - 2) = w1;"
> -	".8byte %[load_acquire_insn];" // w0 = load_acquire((u16 *)(r10 - 2));
> +	".8byte %[load_acquire_insn];" // w2 = load_acquire((u16 *)(r10 - 2));
> +	"if r2 == r1 goto 1f;"
> +	"r0 = 1;"
> +"1:"
>   	"exit;"
>   	:
>   	: __imm_insn(load_acquire_insn,
> -		     BPF_ATOMIC_OP(BPF_H, BPF_LOAD_ACQ, BPF_REG_0, BPF_REG_10, -2))
> +		     BPF_ATOMIC_OP(BPF_H, BPF_LOAD_ACQ, BPF_REG_2, BPF_REG_10, -2))
>   	: __clobber_all);
>   }
>   
>   SEC("socket")
>   __description("load-acquire, 32-bit")
> -__success __success_unpriv __retval(0x12345678)
> +__success __success_unpriv __retval(0)
>   __naked void load_acquire_32(void)
>   {
>   	asm volatile (
> +	"r0 = 0;"
>   	"w1 = 0x12345678;"
>   	"*(u32 *)(r10 - 4) = w1;"
> -	".8byte %[load_acquire_insn];" // w0 = load_acquire((u32 *)(r10 - 4));
> +	".8byte %[load_acquire_insn];" // w2 = load_acquire((u32 *)(r10 - 4));
> +	"if r2 == r1 goto 1f;"
> +	"r0 = 1;"
> +"1:"
>   	"exit;"
>   	:
>   	: __imm_insn(load_acquire_insn,
> -		     BPF_ATOMIC_OP(BPF_W, BPF_LOAD_ACQ, BPF_REG_0, BPF_REG_10, -4))
> +		     BPF_ATOMIC_OP(BPF_W, BPF_LOAD_ACQ, BPF_REG_2, BPF_REG_10, -4))
>   	: __clobber_all);
>   }
>   
>   SEC("socket")
>   __description("load-acquire, 64-bit")
> -__success __success_unpriv __retval(0x1234567890abcdef)
> +__success __success_unpriv __retval(0)
>   __naked void load_acquire_64(void)
>   {
>   	asm volatile (
> +	"r0 = 0;"
>   	"r1 = 0x1234567890abcdef ll;"
>   	"*(u64 *)(r10 - 8) = r1;"
> -	".8byte %[load_acquire_insn];" // r0 = load_acquire((u64 *)(r10 - 8));
> +	".8byte %[load_acquire_insn];" // r2 = load_acquire((u64 *)(r10 - 8));
> +	"if r2 == r1 goto 1f;"
> +	"r0 = 1;"
> +"1:"
>   	"exit;"
>   	:
>   	: __imm_insn(load_acquire_insn,
> -		     BPF_ATOMIC_OP(BPF_DW, BPF_LOAD_ACQ, BPF_REG_0, BPF_REG_10, -8))
> +		     BPF_ATOMIC_OP(BPF_DW, BPF_LOAD_ACQ, BPF_REG_2, BPF_REG_10, -8))
>   	: __clobber_all);
>   }
>   
> diff --git a/tools/testing/selftests/bpf/progs/verifier_store_release.c b/tools/testing/selftests/bpf/progs/verifier_store_release.c
> index 7e456e2861b4..72f1eb006074 100644
> --- a/tools/testing/selftests/bpf/progs/verifier_store_release.c
> +++ b/tools/testing/selftests/bpf/progs/verifier_store_release.c
> @@ -10,13 +10,17 @@
>   
>   SEC("socket")
>   __description("store-release, 8-bit")
> -__success __success_unpriv __retval(0x12)
> +__success __success_unpriv __retval(0)
>   __naked void store_release_8(void)
>   {
>   	asm volatile (
> +	"r0 = 0;"
>   	"w1 = 0x12;"
>   	".8byte %[store_release_insn];" // store_release((u8 *)(r10 - 1), w1);
> -	"w0 = *(u8 *)(r10 - 1);"
> +	"w2 = *(u8 *)(r10 - 1);"
> +	"if r2 == r1 goto 1f;"
> +	"r0 = 1;"
> +"1:"
>   	"exit;"
>   	:
>   	: __imm_insn(store_release_insn,
> @@ -26,13 +30,17 @@ __naked void store_release_8(void)
>   
>   SEC("socket")
>   __description("store-release, 16-bit")
> -__success __success_unpriv __retval(0x1234)
> +__success __success_unpriv __retval(0)
>   __naked void store_release_16(void)
>   {
>   	asm volatile (
> +	"r0 = 0;"
>   	"w1 = 0x1234;"
>   	".8byte %[store_release_insn];" // store_release((u16 *)(r10 - 2), w1);
> -	"w0 = *(u16 *)(r10 - 2);"
> +	"w2 = *(u16 *)(r10 - 2);"
> +	"if r2 == r1 goto 1f;"
> +	"r0 = 1;"
> +"1:"
>   	"exit;"
>   	:
>   	: __imm_insn(store_release_insn,
> @@ -42,13 +50,17 @@ __naked void store_release_16(void)
>   
>   SEC("socket")
>   __description("store-release, 32-bit")
> -__success __success_unpriv __retval(0x12345678)
> +__success __success_unpriv __retval(0)
>   __naked void store_release_32(void)
>   {
>   	asm volatile (
> +	"r0 = 0;"
>   	"w1 = 0x12345678;"
>   	".8byte %[store_release_insn];" // store_release((u32 *)(r10 - 4), w1);
> -	"w0 = *(u32 *)(r10 - 4);"
> +	"w2 = *(u32 *)(r10 - 4);"
> +	"if r2 == r1 goto 1f;"
> +	"r0 = 1;"
> +"1:"
>   	"exit;"
>   	:
>   	: __imm_insn(store_release_insn,
> @@ -58,13 +70,17 @@ __naked void store_release_32(void)
>   
>   SEC("socket")
>   __description("store-release, 64-bit")
> -__success __success_unpriv __retval(0x1234567890abcdef)
> +__success __success_unpriv __retval(0)
>   __naked void store_release_64(void)
>   {
>   	asm volatile (
> +	"r0 = 0;"
>   	"r1 = 0x1234567890abcdef ll;"
>   	".8byte %[store_release_insn];" // store_release((u64 *)(r10 - 8), r1);
> -	"r0 = *(u64 *)(r10 - 8);"
> +	"r2 = *(u64 *)(r10 - 8);"
> +	"if r2 == r1 goto 1f;"
> +	"r0 = 1;"
> +"1:"
>   	"exit;"
>   	:
>   	: __imm_insn(store_release_insn,
Reviewed-by: Pu Lehui <pulehui@huawei.com>

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2025-05-06 18:18 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-30  0:48 [PATCH bpf-next 0/8] bpf, riscv64: Support load-acquire and store-release instructions Peilin Ye
2025-04-30  0:50 ` [PATCH bpf-next 1/8] bpf/verifier: Handle BPF_LOAD_ACQ instructions in insn_def_regno() Peilin Ye
2025-05-06 14:03   ` Pu Lehui
2025-05-07  0:18     ` Peilin Ye
2025-04-30  0:50 ` [PATCH bpf-next 2/8] bpf, riscv64: Introduce emit_load_*() and emit_store_*() Peilin Ye
2025-04-30  3:48   ` Pu Lehui
2025-04-30  0:50 ` [PATCH bpf-next 3/8] bpf, riscv64: Support load-acquire and store-release instructions Peilin Ye
2025-04-30  3:48   ` Pu Lehui
2025-05-06 14:20   ` Pu Lehui
2025-05-07  0:23     ` Peilin Ye
2025-04-30  0:50 ` [PATCH bpf-next 4/8] bpf, riscv64: Skip redundant zext instruction after load-acquire Peilin Ye
2025-04-30  3:48   ` Pu Lehui
2025-04-30  0:51 ` [PATCH bpf-next 5/8] selftests/bpf: Use CAN_USE_LOAD_ACQ_STORE_REL when appropriate Peilin Ye
2025-05-06 14:22   ` Pu Lehui
2025-04-30  0:51 ` [PATCH bpf-next 6/8] selftests/bpf: Avoid passing out-of-range values to __retval() Peilin Ye
2025-05-06 14:23   ` Pu Lehui [this message]
2025-04-30  0:51 ` [PATCH bpf-next 7/8] selftests/bpf: Verify zero-extension behavior in load-acquire tests Peilin Ye
2025-05-06 14:23   ` Pu Lehui
2025-04-30  0:51 ` [PATCH bpf-next 8/8] selftests/bpf: Enable non-arena load-acquire/store-release selftests for riscv64 Peilin Ye
2025-05-06 14:23   ` Pu Lehui
2025-04-30  3:56 ` [PATCH bpf-next 0/8] bpf, riscv64: Support load-acquire and store-release instructions Pu Lehui
2025-04-30 19:47   ` Peilin Ye
2025-05-02 15:43 ` Björn Töpel
2025-05-03  1:03   ` Peilin Ye

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=22ecc626-0982-4cff-adfd-9ea4bb658ee5@huawei.com \
    --to=pulehui@huawei.com \
    --cc=alex@ghiti.fr \
    --cc=andrii@kernel.org \
    --cc=aou@eecs.berkeley.edu \
    --cc=ast@kernel.org \
    --cc=bjorn@kernel.org \
    --cc=bpf@vger.kernel.org \
    --cc=brho@google.com \
    --cc=bsegall@google.com \
    --cc=daniel@iogearbox.net \
    --cc=eddyz87@gmail.com \
    --cc=haoluo@google.com \
    --cc=john.fastabend@gmail.com \
    --cc=jolsa@kernel.org \
    --cc=joshdon@google.com \
    --cc=kpsingh@kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=luke.r.nels@gmail.com \
    --cc=martin.lau@linux.dev \
    --cc=mykolal@fb.com \
    --cc=neelnatu@google.com \
    --cc=palmer@dabbelt.com \
    --cc=parri.andrea@gmail.com \
    --cc=paul.walmsley@sifive.com \
    --cc=paulmck@kernel.org \
    --cc=puranjay@kernel.org \
    --cc=sdf@fomichev.me \
    --cc=shuah@kernel.org \
    --cc=song@kernel.org \
    --cc=xi.wang@gmail.com \
    --cc=yepeilin@google.com \
    --cc=yonghong.song@linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox