* [PATCH v2] riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board @ 2024-03-07 12:21 Shengyu Qu 2024-03-07 18:06 ` Conor Dooley 2024-03-26 20:37 ` Conor Dooley 0 siblings, 2 replies; 6+ messages in thread From: Shengyu Qu @ 2024-03-07 12:21 UTC (permalink / raw) To: ganboing, kernel, robh, krzysztof.kozlowski+dt, conor+dt, paul.walmsley, palmer, aou, devicetree, linux-riscv, linux-kernel Cc: stable, Shengyu Qu Interrupt line number of the AXP15060 PMIC is not a necessary part of its device tree. And this would cause kernel to try to enable interrupt line 0, which is not expected. So delete this part from device tree. Cc: stable@vger.kernel.org Reported-by: Bo Gan <ganboing@gmail.com> Link: https://lore.kernel.org/all/c8b6e960-2459-130f-e4e4-7c9c2ebaa6d3@gmail.com/ Signed-off-by: Shengyu Qu <wiagn233@outlook.com> --- arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 45b58b6f3df8..7783d464d529 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -238,7 +238,6 @@ &i2c5 { axp15060: pmic@36 { compatible = "x-powers,axp15060"; reg = <0x36>; - interrupts = <0>; interrupt-controller; #interrupt-cells = <1>; -- 2.39.2 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2] riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board 2024-03-07 12:21 [PATCH v2] riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board Shengyu Qu @ 2024-03-07 18:06 ` Conor Dooley 2024-03-26 20:37 ` Conor Dooley 1 sibling, 0 replies; 6+ messages in thread From: Conor Dooley @ 2024-03-07 18:06 UTC (permalink / raw) To: Shengyu Qu Cc: ganboing, kernel, robh, krzysztof.kozlowski+dt, conor+dt, paul.walmsley, palmer, aou, devicetree, linux-riscv, linux-kernel, stable [-- Attachment #1.1: Type: text/plain, Size: 1866 bytes --] On Thu, Mar 07, 2024 at 08:21:12PM +0800, Shengyu Qu wrote: > Interrupt line number of the AXP15060 PMIC is not a necessary part of > its device tree. And this would cause kernel to try to enable interrupt > line 0, which is not expected. So delete this part from device tree. > > Cc: stable@vger.kernel.org > Reported-by: Bo Gan <ganboing@gmail.com> > Link: https://lore.kernel.org/all/c8b6e960-2459-130f-e4e4-7c9c2ebaa6d3@gmail.com/ > Signed-off-by: Shengyu Qu <wiagn233@outlook.com> Thanks for resending. Just to note that I already sent all 6.8 and 6.9 material, so since this is only something that manifests with that "improved" version of OpenSBI I'm gonna pick this up after the merge window. Fixes: 2378341504de ("riscv: dts: starfive: Enable axp15060 pmic for cpufreq") And hopefully I remember to re-write the commit message to mention that the board doesn't actually connect the interrupt link to a GPIO etc, so the original patch was invalid and a hack. I should have rejected it and got the driver fixed at the time to allow not having an interrupt, but clearly I didn't register that that zero was a plic interrupt, not a GPIO. Thanks, Conor. > --- > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > index 45b58b6f3df8..7783d464d529 100644 > --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > @@ -238,7 +238,6 @@ &i2c5 { > axp15060: pmic@36 { > compatible = "x-powers,axp15060"; > reg = <0x36>; > - interrupts = <0>; > interrupt-controller; > #interrupt-cells = <1>; > > -- > 2.39.2 > [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 161 bytes --] _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board 2024-03-07 12:21 [PATCH v2] riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board Shengyu Qu 2024-03-07 18:06 ` Conor Dooley @ 2024-03-26 20:37 ` Conor Dooley 2024-03-26 22:06 ` Bo Gan 1 sibling, 1 reply; 6+ messages in thread From: Conor Dooley @ 2024-03-26 20:37 UTC (permalink / raw) To: ganboing, kernel, robh, krzysztof.kozlowski+dt, conor+dt, paul.walmsley, palmer, aou, devicetree, linux-riscv, linux-kernel, Shengyu Qu Cc: conor, Conor Dooley, stable From: Conor Dooley <conor.dooley@microchip.com> On Thu, 07 Mar 2024 20:21:12 +0800, Shengyu Qu wrote: > Interrupt line number of the AXP15060 PMIC is not a necessary part of > its device tree. And this would cause kernel to try to enable interrupt > line 0, which is not expected. So delete this part from device tree. > > Applied to riscv-dt-fixes, thanks! And I didn't forget, so I re-wrote the commit message to add some more information as promised. [1/1] riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board https://git.kernel.org/conor/c/0b163f43920d Thanks, Conor. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board 2024-03-26 20:37 ` Conor Dooley @ 2024-03-26 22:06 ` Bo Gan 2024-03-26 22:10 ` Conor Dooley 0 siblings, 1 reply; 6+ messages in thread From: Bo Gan @ 2024-03-26 22:06 UTC (permalink / raw) To: Conor Dooley, ganboing, kernel, robh, krzysztof.kozlowski+dt, conor+dt, paul.walmsley, palmer, aou, devicetree, linux-riscv, linux-kernel, Shengyu Qu Cc: Conor Dooley, stable On 3/26/24 1:37 PM, Conor Dooley wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > On Thu, 07 Mar 2024 20:21:12 +0800, Shengyu Qu wrote: >> Interrupt line number of the AXP15060 PMIC is not a necessary part of >> its device tree. And this would cause kernel to try to enable interrupt >> line 0, which is not expected. So delete this part from device tree. >> >> > > Applied to riscv-dt-fixes, thanks! And I didn't forget, so I re-wrote > the commit message to add some more information as promised. > > [1/1] riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board > https://git.kernel.org/conor/c/0b163f43920d > > Thanks, > Conor. > Hi Conor, Thank you very much for taking care of this. Actually the PLIC may silently ignore the enablement of interrupt 0, so the upstream openSBI won't notice anything. My modified version, however, will deliberately trigger a fault for all writes to the reserved fields of PLIC, thus catching this issue. Hope it can clarify things a bit more. Bo _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board 2024-03-26 22:06 ` Bo Gan @ 2024-03-26 22:10 ` Conor Dooley 2024-03-26 22:12 ` Bo Gan 0 siblings, 1 reply; 6+ messages in thread From: Conor Dooley @ 2024-03-26 22:10 UTC (permalink / raw) To: Bo Gan Cc: kernel, robh, krzysztof.kozlowski+dt, conor+dt, paul.walmsley, palmer, aou, devicetree, linux-riscv, linux-kernel, Shengyu Qu, Conor Dooley, stable [-- Attachment #1.1: Type: text/plain, Size: 1228 bytes --] On Tue, Mar 26, 2024 at 03:06:33PM -0700, Bo Gan wrote: > On 3/26/24 1:37 PM, Conor Dooley wrote: > > From: Conor Dooley <conor.dooley@microchip.com> > > > > On Thu, 07 Mar 2024 20:21:12 +0800, Shengyu Qu wrote: > > > Interrupt line number of the AXP15060 PMIC is not a necessary part of > > > its device tree. And this would cause kernel to try to enable interrupt > > > line 0, which is not expected. So delete this part from device tree. > > > > > > > > > > Applied to riscv-dt-fixes, thanks! And I didn't forget, so I re-wrote > > the commit message to add some more information as promised. > > > > [1/1] riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board > > https://git.kernel.org/conor/c/0b163f43920d > > > > Thanks, > > Conor. > > > Hi Conor, > > Thank you very much for taking care of this. Actually the PLIC may silently > ignore the enablement of interrupt 0, so the upstream openSBI won't notice > anything. My modified version, however, will deliberately trigger a fault > for all writes to the reserved fields of PLIC, thus catching this issue. > > Hope it can clarify things a bit more. https://git.kernel.org/conor/c/0f74c64f0a9f Better? [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 161 bytes --] _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board 2024-03-26 22:10 ` Conor Dooley @ 2024-03-26 22:12 ` Bo Gan 0 siblings, 0 replies; 6+ messages in thread From: Bo Gan @ 2024-03-26 22:12 UTC (permalink / raw) To: Conor Dooley, Bo Gan Cc: kernel, robh, krzysztof.kozlowski+dt, conor+dt, paul.walmsley, palmer, aou, devicetree, linux-riscv, linux-kernel, Shengyu Qu, Conor Dooley, stable On 3/26/24 3:10 PM, Conor Dooley wrote: > On Tue, Mar 26, 2024 at 03:06:33PM -0700, Bo Gan wrote: >> On 3/26/24 1:37 PM, Conor Dooley wrote: >>> From: Conor Dooley <conor.dooley@microchip.com> >>> >>> On Thu, 07 Mar 2024 20:21:12 +0800, Shengyu Qu wrote: >>>> Interrupt line number of the AXP15060 PMIC is not a necessary part of >>>> its device tree. And this would cause kernel to try to enable interrupt >>>> line 0, which is not expected. So delete this part from device tree. >>>> >>>> >>> >>> Applied to riscv-dt-fixes, thanks! And I didn't forget, so I re-wrote >>> the commit message to add some more information as promised. >>> >>> [1/1] riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board >>> https://git.kernel.org/conor/c/0b163f43920d >>> >>> Thanks, >>> Conor. >>> >> Hi Conor, >> >> Thank you very much for taking care of this. Actually the PLIC may silently >> ignore the enablement of interrupt 0, so the upstream openSBI won't notice >> anything. My modified version, however, will deliberately trigger a fault >> for all writes to the reserved fields of PLIC, thus catching this issue. >> >> Hope it can clarify things a bit more. > > https://git.kernel.org/conor/c/0f74c64f0a9f > > Better? > Great! Thanks again. Bo _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-03-26 22:12 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-03-07 12:21 [PATCH v2] riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board Shengyu Qu 2024-03-07 18:06 ` Conor Dooley 2024-03-26 20:37 ` Conor Dooley 2024-03-26 22:06 ` Bo Gan 2024-03-26 22:10 ` Conor Dooley 2024-03-26 22:12 ` Bo Gan
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox