* [PATCH 1/3] dt-bindings: arm: rockchip: Add Radxa ROCK 5B+
2024-12-24 21:09 [PATCH 0/3] arm64: dts: rockchip: Add Radxa ROCK 5B+ and rebase Radxa ROCK 5B FUKAUMI Naoki
@ 2024-12-24 21:09 ` FUKAUMI Naoki
2024-12-24 21:09 ` [PATCH 2/3] arm64: dts: " FUKAUMI Naoki
` (3 subsequent siblings)
4 siblings, 0 replies; 10+ messages in thread
From: FUKAUMI Naoki @ 2024-12-24 21:09 UTC (permalink / raw)
To: heiko
Cc: robh, conor+dt, inindev, liujianfeng1994, jonas, dmt.yashin,
sebastian.reichel, tim, kever.yang, marcin.juszkiewicz,
linux-rockchip, devicetree, alchark, michael.riesch, macromorgan,
FUKAUMI Naoki, krzk+dt, dsimic
Add devicetree binding for the Radxa ROCK 5B+.
The Radxa ROCK 5B+ is an upgraded version of the ROCK 5B based on the
Rockchip RK3588 SoC.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 753199a12923..df959dbfa9eb 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -895,6 +895,11 @@ properties:
- const: radxa,rock-5b
- const: rockchip,rk3588
+ - description: Radxa ROCK 5B+
+ items:
+ - const: radxa,rock-5b-plus
+ - const: rockchip,rk3588
+
- description: Radxa ROCK 5C
items:
- const: radxa,rock-5c
--
2.43.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 2/3] arm64: dts: rockchip: Add Radxa ROCK 5B+
2024-12-24 21:09 [PATCH 0/3] arm64: dts: rockchip: Add Radxa ROCK 5B+ and rebase Radxa ROCK 5B FUKAUMI Naoki
2024-12-24 21:09 ` [PATCH 1/3] dt-bindings: arm: rockchip: Add Radxa ROCK 5B+ FUKAUMI Naoki
@ 2024-12-24 21:09 ` FUKAUMI Naoki
2024-12-24 21:09 ` [PATCH 3/3] arm64: dts: rockchip: Convert Radxa ROCK 5B to use shared .dtsi FUKAUMI Naoki
` (2 subsequent siblings)
4 siblings, 0 replies; 10+ messages in thread
From: FUKAUMI Naoki @ 2024-12-24 21:09 UTC (permalink / raw)
To: heiko
Cc: robh, conor+dt, inindev, liujianfeng1994, jonas, dmt.yashin,
sebastian.reichel, tim, kever.yang, marcin.juszkiewicz,
linux-rockchip, devicetree, alchark, michael.riesch, macromorgan,
FUKAUMI Naoki, krzk+dt, dsimic
The Radxa ROCK 5B+[1] is an upgraded version of the ROCK 5B based on
the Rockchip RK3588 SoC.
- Quad Cortex-A76 and quad Cortex-A55 CPU
- 6TOPS NPU
- up to 32GB LPDDR5 RAM
- up to 256GB on-board optional eMMC
- microSD card slot
- 2x USB 3.0 Type-A HOST ports
- 2x USB 2.0 Type-A HOST ports
- USB Type-C OTG port
- USB Type-C PD power port
- WiFi6 / BT5.4
- 2.5 GbE port (supports PoE with additional PoE HAT)
- 2x M.2 M Key connectors with PCIe 3.0 2-lane support
- M.2 B Key connector with 4G module support
- SIM card slot
[1] https://radxa.com/products/rock5/5bp
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3588-rock-5.dtsi | 1006 +++++++++++++++++
.../boot/dts/rockchip/rk3588-rock-5b-plus.dts | 97 ++
3 files changed, 1104 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-rock-5.dtsi
create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index cac3f39af82a..2b09c8f71cfd 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -176,6 +176,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5-itx.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-ep.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-srns.dtbo
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-plus.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-toybrick-x0.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-turing-rk1.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-rock-5.dtsi
new file mode 100644
index 000000000000..98f12a5523a0
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5.dtsi
@@ -0,0 +1,1006 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Radxa Computer (Shenzhen) Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include <dt-bindings/usb/pd.h>
+#include "rk3588.dtsi"
+
+/ {
+ aliases {
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ fan: fan {
+ compatible = "pwm-fan";
+ #cooling-cells = <2>;
+ cooling-levels = <0 64 128 192 255>;
+ fan-supply = <&vcc5v0_sys>;
+ pwms = <&pwm1 0 60000 0>;
+ };
+
+ hdmi0-con {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi0_con_in: endpoint {
+ remote-endpoint = <&hdmi0_out_con>;
+ };
+ };
+ };
+
+ leds: leds {
+ compatible = "pwm-leds";
+
+ led-0 {
+ color = <LED_COLOR_ID_BLUE>;
+ default-state = "on";
+ function = LED_FUNCTION_STATUS;
+ linux,default-trigger = "heartbeat";
+ pwms = <&pwm0 0 1000000 0>;
+ max-brightness = <255>;
+ };
+ };
+
+ vcc_1v1_nldo_s3: regulator-1v1 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v1_nldo_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ vin-supply = <&vcc4v0_sys>;
+ };
+
+ /* pi6c pcie clock generator */
+ vcc3v3_pi6c_05: vcc3v3_pcie30: vcc3v3_pcie30_1: regulator-3v3-0 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie30x4_pwren_h>;
+ regulator-name = "vcc3v3_pi6c_05";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc3v3_wf: regulator-3v3-1 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ekey_en>;
+ regulator-name = "vcc3v3_wf";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc4v0_sys: regulator-4v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc4v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <4000000>;
+ regulator-max-microvolt = <4000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vbus_typec0: regulator-5v0-0 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&typec5v_pwren_h>;
+ regulator-name = "vbus_typec0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_sys: regulator-5v0-1 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vcc5v_usb: regulator-5v0-2 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_host_pwren_h>;
+ regulator-name = "vcc5v_usb";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_5v: regulator-5v0-3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_5v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ rfkill {
+ compatible = "rfkill-gpio";
+ radio-type = "wlan";
+ };
+
+ rfkill-bt {
+ compatible = "rfkill-gpio";
+ radio-type = "bluetooth";
+ shutdown-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
+ };
+
+ sound {
+ compatible = "audio-graph-card";
+ label = "rk3588-es8316";
+ dais = <&i2s0_8ch_p0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hp_detect>;
+ routing = "MIC2", "Mic Jack",
+ "Headphones", "HPOL",
+ "Headphones", "HPOR";
+ widgets = "Microphone", "Mic Jack",
+ "Headphone", "Headphones";
+ };
+};
+
+&combphy0_ps {
+ status = "okay";
+};
+
+&combphy1_ps {
+ status = "okay";
+};
+
+&combphy2_psu {
+ status = "okay";
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_b3 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ status = "okay";
+};
+
+&hdmi0 {
+ status = "okay";
+};
+
+&hdmi0_in {
+ hdmi0_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi0>;
+ };
+};
+
+&hdmi0_out {
+ hdmi0_out_con: endpoint {
+ remote-endpoint = <&hdmi0_con_in>;
+ };
+};
+
+&hdptxphy_hdmi0 {
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0m2_xfer>;
+ status = "okay";
+
+ vdd_cpu_big0_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big0_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc4v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_big1_s0: regulator@43 {
+ compatible = "rockchip,rk8603", "rockchip,rk8602";
+ reg = <0x43>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big1_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc4v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1m2_xfer>;
+ status = "okay";
+
+ vdd_npu_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_npu_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc4v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ eeprom: eeprom@50 {
+ compatible = "belling,bl24c16a", "atmel,24c16";
+ reg = <0x50>;
+ pagesize = <16>;
+ vcc-supply = <&vcc_3v3_s3>;
+ };
+};
+
+&i2c4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c4m1_xfer>;
+ status = "okay";
+
+ usbc0: usb-typec@22 {
+ compatible = "fcs,fusb302";
+ reg = <0x22>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cc_int_l>;
+ vbus-supply = <&vbus_typec0>;
+
+ usbc0_con: connector {
+ compatible = "usb-c-connector";
+ label = "USB-C";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ usbc0_role_sw: endpoint {
+ remote-endpoint = <&dwc3_0_role_switch>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ usbc0_orien_sw: endpoint {
+ remote-endpoint = <&usbdp_phy0_orientation_switch>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ dp_altmode_mux: endpoint {
+ remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
+ };
+ };
+ };
+ };
+ };
+};
+
+&i2c6 {
+ status = "okay";
+
+ rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-output-names = "32kout_wifi";
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_int_l>;
+ wakeup-source;
+ };
+};
+
+&i2c7 {
+ status = "okay";
+
+ audio-codec@11 {
+ compatible = "everest,es8316";
+ reg = <0x11>;
+ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
+ assigned-clock-rates = <12288000>;
+ clocks = <&cru I2S0_8CH_MCLKOUT>;
+ clock-names = "mclk";
+ #sound-dai-cells = <0>;
+
+ port {
+ es8316_p0_0: endpoint {
+ remote-endpoint = <&i2s0_8ch_p0_0>;
+ };
+ };
+ };
+};
+
+&i2s0_8ch {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s0_lrck
+ &i2s0_mclk
+ &i2s0_sclk
+ &i2s0_sdi0
+ &i2s0_sdo0>;
+ status = "okay";
+
+ i2s0_8ch_p0: port {
+ i2s0_8ch_p0_0: endpoint {
+ dai-format = "i2s";
+ mclk-fs = <256>;
+ remote-endpoint = <&es8316_p0_0>;
+ };
+ };
+};
+
+&package_thermal {
+ polling-delay = <1000>;
+
+ trips {
+ package_fan0: package-fan0 {
+ hysteresis = <2000>;
+ temperature = <55000>;
+ type = "active";
+ };
+
+ package_fan1: package-fan1 {
+ hysteresis = <2000>;
+ temperature = <65000>;
+ type = "active";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ cooling-device = <&fan THERMAL_NO_LIMIT 1>;
+ trip = <&package_fan0>;
+ };
+
+ map1 {
+ cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
+ trip = <&package_fan1>;
+ };
+ };
+};
+
+&pcie2x1l0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie30x1_0_perstn_m1_l>;
+ reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_wf>;
+ status = "okay";
+};
+
+&pcie2x1l2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_perst_l>;
+ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc_3v3_s3>;
+ status = "okay";
+};
+
+&pcie30phy {
+ phy-supply = <&vcc3v3_pi6c_05>;
+ status = "okay";
+};
+
+&pcie3x2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie30x2_perstn_m1>;
+ reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie30_1>;
+ status = "okay";
+};
+
+&pcie3x4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie30x4_perstn_m1_l>;
+ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie30>;
+ status = "okay";
+};
+
+&pinctrl {
+ pcie {
+ pcie30x1_0_perstn_m1_l: pcie-0 {
+ rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pcie_perst_l: pcie-2 {
+ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pcie30x2_perstn_m1: pcie-3 {
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pcie30x4_perstn_m1_l: pcie-4 {
+ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pcie30x4_pwren_h: regulator-3v3-0 {
+ rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ rtc {
+ rtc_int_l: rtc-0 {
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ cc_int_l: usb-0 {
+ rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ typec5v_pwren_h: regulator-5v0-0 {
+ rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcca_1v8_s0>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ no-sd;
+ no-sdio;
+ non-removable;
+ vmmc-supply = <&vcc_3v3_s3>;
+ vqmmc-supply = <&vcc_1v8_s3>;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ no-sdio;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_3v3_s3>;
+ vqmmc-supply = <&vccio_sd_s0>;
+ status = "okay";
+};
+
+&sfc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&fspim2_pins>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <104000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
+ };
+};
+
+&spi2 {
+ status = "okay";
+ assigned-clocks = <&cru CLK_SPI2>;
+ assigned-clock-rates = <200000000>;
+ num-cs = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
+
+ pmic@0 {
+ compatible = "rockchip,rk806";
+ reg = <0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+ spi-max-frequency = <1000000>;
+ system-power-controller;
+
+ vcc1-supply = <&vcc4v0_sys>;
+ vcc2-supply = <&vcc4v0_sys>;
+ vcc3-supply = <&vcc4v0_sys>;
+ vcc4-supply = <&vcc4v0_sys>;
+ vcc5-supply = <&vcc4v0_sys>;
+ vcc6-supply = <&vcc4v0_sys>;
+ vcc7-supply = <&vcc4v0_sys>;
+ vcc8-supply = <&vcc4v0_sys>;
+ vcc9-supply = <&vcc4v0_sys>;
+ vcc10-supply = <&vcc4v0_sys>;
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
+ vcc12-supply = <&vcc4v0_sys>;
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
+ vcca-supply = <&vcc4v0_sys>;
+
+ rk806_dvs1_null: dvs1-null-pins {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs2_null: dvs2-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs3_null: dvs3-null-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun0";
+ };
+
+ regulators {
+ vdd_gpu_s0: dcdc-reg1 {
+ regulator-name = "vdd_gpu_s0";
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-enable-ramp-delay = <400>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_lit_s0: dcdc-reg2 {
+ regulator-name = "vdd_cpu_lit_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_log_s0: dcdc-reg3 {
+ regulator-name = "vdd_log_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <750000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdd_vdenc_s0: dcdc-reg4 {
+ regulator-name = "vdd_vdenc_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_ddr_s0: dcdc-reg5 {
+ regulator-name = "vdd_ddr_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <900000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ vdd2_ddr_s3: dcdc-reg6 {
+ regulator-name = "vdd2_ddr_s3";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_2v0_pldo_s3: dcdc-reg7 {
+ regulator-name = "vcc_2v0_pldo_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <2000000>;
+ };
+ };
+
+ vcc_3v3_s3: dcdc-reg8 {
+ regulator-name = "vcc_3v3_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vddq_ddr_s0: dcdc-reg9 {
+ regulator-name = "vddq_ddr_s0";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3: dcdc-reg10 {
+ regulator-name = "vcc_1v8_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcca_1v8_s0: pldo-reg1 {
+ regulator-name = "vcca_1v8_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_1v8_s0: pldo-reg2 {
+ regulator-name = "vcc_1v8_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdda_1v2_s0: pldo-reg3 {
+ regulator-name = "vdda_1v2_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca_3v3_s0: pldo-reg4 {
+ regulator-name = "vcca_3v3_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vccio_sd_s0: pldo-reg5 {
+ regulator-name = "vccio_sd_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ pldo6_s3: pldo-reg6 {
+ regulator-name = "pldo6_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_0v75_s3: nldo-reg1 {
+ regulator-name = "vdd_0v75_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdda_ddr_pll_s0: nldo-reg2 {
+ regulator-name = "vdda_ddr_pll_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ vdda_0v75_s0: nldo-reg3 {
+ regulator-name = "vdda_0v75_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdda_0v85_s0: nldo-reg4 {
+ regulator-name = "vdda_0v85_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_0v75_s0: nldo-reg5 {
+ regulator-name = "vdd_0v75_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&tsadc {
+ status = "okay";
+};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ phy-supply = <&vbus_typec0>;
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy1_otg {
+ status = "okay";
+};
+
+&u2phy2 {
+ status = "okay";
+};
+
+&u2phy2_host {
+ status = "okay";
+};
+
+&u2phy3 {
+ status = "okay";
+};
+
+&u2phy3_host {
+ phy-supply = <&vcc5v_usb>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-0 = <&uart2m0_xfer>;
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ usb-role-switch;
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dwc3_0_role_switch: endpoint {
+ remote-endpoint = <&usbc0_role_sw>;
+ };
+ };
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usb_host1_xhci {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usb_host2_xhci {
+ status = "okay";
+};
+
+&usbdp_phy0 {
+ mode-switch;
+ orientation-switch;
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usbdp_phy0_orientation_switch: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&usbc0_orien_sw>;
+ };
+
+ usbdp_phy0_dp_altmode_mux: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&dp_altmode_mux>;
+ };
+ };
+};
+
+&usbdp_phy1 {
+ status = "okay";
+};
+
+&vop {
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi0_in_vp0>;
+ };
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
new file mode 100644
index 000000000000..a8c472def581
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Radxa Computer (Shenzhen) Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include "rk3588-rock-5.dtsi"
+
+/ {
+ model = "Radxa ROCK 5B+";
+ compatible = "radxa,rock-5b-plus", "rockchip,rk3588";
+
+ regulator-3v3-1 {
+ gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
+ };
+
+ regulator-5v0-2 {
+ gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
+ };
+
+ rfkill {
+ label = "rfkill-wlan";
+ shutdown-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
+ };
+
+ rfkill-bt {
+ label = "rfkill-bt";
+ };
+
+ sound {
+ hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&pcie30phy {
+ data-lanes = <1 1 2 2>;
+};
+
+&pcie3x4 {
+ num-lanes = <2>;
+};
+
+&pinctrl {
+ pcie {
+ ekey_en: regulator-3v3-1 {
+ rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sound {
+ hp_detect: sound-0 {
+ rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ usb_host_pwren_h: regulator-5v0-2 {
+ rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&u2phy1_otg {
+ phy-supply = <&vcc5v_usb>;
+};
+
+&u2phy2_host {
+ /* connected to USB hub, which is powered by vcc_5v */
+ phy-supply = <&vcc_5v>;
+};
+
+&usbc0 {
+ /*
+ * When the board is starting to send power-delivery messages
+ * too late (5 seconds according to the specification), the
+ * power-supply reacts with a hard-reset. That removes the
+ * power from VBUS for some time, which resets the whole board.
+ */
+ status = "fail";
+};
+
+&usbc0_con {
+ power-role = "dual";
+ try-power-role = "sink";
+ op-sink-microwatt = <1000000>;
+ sink-pdos =
+ <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>,
+ <PDO_VAR(5000, 20000, 5000)>;
+ source-pdos =
+ <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+};
+
+&usbdp_phy0 {
+ sbu1-dc-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
+ sbu2-dc-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+};
--
2.43.0
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^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 3/3] arm64: dts: rockchip: Convert Radxa ROCK 5B to use shared .dtsi
2024-12-24 21:09 [PATCH 0/3] arm64: dts: rockchip: Add Radxa ROCK 5B+ and rebase Radxa ROCK 5B FUKAUMI Naoki
2024-12-24 21:09 ` [PATCH 1/3] dt-bindings: arm: rockchip: Add Radxa ROCK 5B+ FUKAUMI Naoki
2024-12-24 21:09 ` [PATCH 2/3] arm64: dts: " FUKAUMI Naoki
@ 2024-12-24 21:09 ` FUKAUMI Naoki
2024-12-25 8:32 ` [PATCH 0/3] arm64: dts: rockchip: Add Radxa ROCK 5B+ and rebase Radxa ROCK 5B Alexey Charkov
2024-12-27 15:18 ` Rob Herring (Arm)
4 siblings, 0 replies; 10+ messages in thread
From: FUKAUMI Naoki @ 2024-12-24 21:09 UTC (permalink / raw)
To: heiko
Cc: robh, conor+dt, inindev, liujianfeng1994, jonas, dmt.yashin,
sebastian.reichel, tim, kever.yang, marcin.juszkiewicz,
linux-rockchip, devicetree, alchark, michael.riesch, macromorgan,
FUKAUMI Naoki, krzk+dt, dsimic
Use the shared rk3588-rock-5.dtsi and the board-specific
rk3588-rock-5b.dts.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
---
.../boot/dts/rockchip/rk3588-rock-5b.dts | 1026 ++---------------
1 file changed, 119 insertions(+), 907 deletions(-)
rewrite arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts (93%)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
dissimilarity index 93%
index d597112f1d5b..7e2f569af123 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -1,907 +1,119 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3588.dtsi"
-
-/ {
- model = "Radxa ROCK 5B";
- compatible = "radxa,rock-5b", "rockchip,rk3588";
-
- aliases {
- mmc0 = &sdhci;
- mmc1 = &sdmmc;
- mmc2 = &sdio;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- analog-sound {
- compatible = "audio-graph-card";
- label = "rk3588-es8316";
-
- widgets = "Microphone", "Mic Jack",
- "Headphone", "Headphones";
-
- routing = "MIC2", "Mic Jack",
- "Headphones", "HPOL",
- "Headphones", "HPOR";
-
- dais = <&i2s0_8ch_p0>;
- hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&hp_detect>;
- };
-
- hdmi0-con {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi0_con_in: endpoint {
- remote-endpoint = <&hdmi0_out_con>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&led_rgb_b>;
-
- led_rgb_b {
- function = LED_FUNCTION_STATUS;
- color = <LED_COLOR_ID_BLUE>;
- gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- fan: pwm-fan {
- compatible = "pwm-fan";
- cooling-levels = <0 120 150 180 210 240 255>;
- fan-supply = <&vcc5v0_sys>;
- pwms = <&pwm1 0 50000 0>;
- #cooling-cells = <2>;
- };
-
- rfkill {
- compatible = "rfkill-gpio";
- label = "rfkill-m2-wlan";
- radio-type = "wlan";
- shutdown-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
- };
-
- rfkill-bt {
- compatible = "rfkill-gpio";
- label = "rfkill-m2-bt";
- radio-type = "bluetooth";
- shutdown-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
- };
-
- vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie2_0_vcc3v3_en>;
- regulator-name = "vcc3v3_pcie2x1l0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <50000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_pcie2x1l2: regulator-vcc3v3-pcie2x1l2 {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_pcie2x1l2";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <5000>;
- vin-supply = <&vcc_3v3_s3>;
- };
-
- vcc3v3_pcie30: regulator-vcc3v3-pcie30 {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie3_vcc3v3_en>;
- regulator-name = "vcc3v3_pcie30";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <5000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_host: regulator-vcc5v0-host {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_host";
- regulator-boot-on;
- regulator-always-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host_en>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_sys: regulator-vcc5v0-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
- compatible = "regulator-fixed";
- regulator-name = "vcc_1v1_nldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&combphy0_ps {
- status = "okay";
-};
-
-&combphy1_ps {
- status = "okay";
-};
-
-&combphy2_psu {
- status = "okay";
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b2 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_b3 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&gpu {
- mali-supply = <&vdd_gpu_s0>;
- status = "okay";
-};
-
-&hdmi0 {
- status = "okay";
-};
-
-&hdmi0_in {
- hdmi0_in_vp0: endpoint {
- remote-endpoint = <&vp0_out_hdmi0>;
- };
-};
-
-&hdmi0_out {
- hdmi0_out_con: endpoint {
- remote-endpoint = <&hdmi0_con_in>;
- };
-};
-
-&hdptxphy_hdmi0 {
- status = "okay";
-};
-
-&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0m2_xfer>;
- status = "okay";
-
- vdd_cpu_big0_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big0_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_big1_s0: regulator@43 {
- compatible = "rockchip,rk8603", "rockchip,rk8602";
- reg = <0x43>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big1_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c6 {
- status = "okay";
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <&hym8563_int>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
- wakeup-source;
- };
-};
-
-&i2c7 {
- status = "okay";
-
- es8316: audio-codec@11 {
- compatible = "everest,es8316";
- reg = <0x11>;
- clocks = <&cru I2S0_8CH_MCLKOUT>;
- clock-names = "mclk";
- assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
- assigned-clock-rates = <12288000>;
- #sound-dai-cells = <0>;
-
- port {
- es8316_p0_0: endpoint {
- remote-endpoint = <&i2s0_8ch_p0_0>;
- };
- };
- };
-};
-
-&i2s0_8ch {
- pinctrl-names = "default";
- pinctrl-0 = <&i2s0_lrck
- &i2s0_mclk
- &i2s0_sclk
- &i2s0_sdi0
- &i2s0_sdo0>;
- status = "okay";
-
- i2s0_8ch_p0: port {
- i2s0_8ch_p0_0: endpoint {
- dai-format = "i2s";
- mclk-fs = <256>;
- remote-endpoint = <&es8316_p0_0>;
- };
- };
-};
-
-&package_thermal {
- polling-delay = <1000>;
-
- trips {
- package_fan0: package-fan0 {
- temperature = <55000>;
- hysteresis = <2000>;
- type = "active";
- };
-
- package_fan1: package-fan1 {
- temperature = <65000>;
- hysteresis = <2000>;
- type = "active";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&package_fan0>;
- cooling-device = <&fan THERMAL_NO_LIMIT 1>;
- };
-
- map1 {
- trip = <&package_fan1>;
- cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
- };
- };
-};
-
-&pcie2x1l0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie2_0_rst>;
- reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
- status = "okay";
-};
-
-&pcie2x1l2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie2_2_rst>;
- reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie2x1l2>;
- status = "okay";
-};
-
-&pcie30phy {
- status = "okay";
-};
-
-&pcie3x4 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie3_rst>;
- reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie30>;
- status = "okay";
-};
-
-&pinctrl {
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- leds {
- led_rgb_b: led-rgb-b {
- rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- sound {
- hp_detect: hp-detect {
- rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie2 {
- pcie2_0_rst: pcie2-0-rst {
- rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie2_0_vcc3v3_en: pcie2-0-vcc-en {
- rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie2_2_rst: pcie2-2-rst {
- rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie3 {
- pcie3_rst: pcie3-rst {
- rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie3_vcc3v3_en: pcie3-vcc3v3-en {
- rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb {
- vcc5v0_host_en: vcc5v0-host-en {
- rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pwm1 {
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&avcc_1v8_s0>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- no-sdio;
- no-sd;
- non-removable;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- status = "okay";
-};
-
-&sdmmc {
- max-frequency = <200000000>;
- no-sdio;
- no-mmc;
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
- disable-wp;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3_s3>;
- vqmmc-supply = <&vccio_sd_s0>;
- status = "okay";
-};
-
-&sdio {
- max-frequency = <200000000>;
- no-sd;
- no-mmc;
- non-removable;
- bus-width = <4>;
- cap-sdio-irq;
- disable-wp;
- keep-power-in-suspend;
- wakeup-source;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc3v3_pcie2x1l0>;
- vqmmc-supply = <&vcc_1v8_s3>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdiom0_pins>;
- status = "okay";
-};
-
-&sfc {
- pinctrl-names = "default";
- pinctrl-0 = <&fspim2_pins>;
- status = "okay";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <104000000>;
- spi-rx-bus-width = <4>;
- spi-tx-bus-width = <1>;
- };
-};
-
-&uart6 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart6m1_xfer &uart6m1_ctsn &uart6m1_rtsn>;
- status = "okay";
-};
-
-&spi2 {
- status = "okay";
- assigned-clocks = <&cru CLK_SPI2>;
- assigned-clock-rates = <200000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
- num-cs = <1>;
-
- pmic@0 {
- compatible = "rockchip,rk806";
- spi-max-frequency = <1000000>;
- reg = <0x0>;
-
- interrupt-parent = <&gpio0>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
-
- system-power-controller;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc5v0_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc5v0_sys>;
- vcc13-supply = <&vcc_1v1_nldo_s3>;
- vcc14-supply = <&vcc_1v1_nldo_s3>;
- vcca-supply = <&vcc5v0_sys>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl1";
- function = "pin_fun0";
- };
-
- rk806_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
- regulators {
- vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_gpu_s0";
- regulator-enable-ramp-delay = <400>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_cpu_lit_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_log_s0: dcdc-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_log_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_vdenc_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_s0: dcdc-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <900000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_ddr_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- vdd2_ddr_s3: dcdc-reg6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vdd2_ddr_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_2v0_pldo_s3: dcdc-reg7 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2000000>;
- regulator-max-microvolt = <2000000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_2v0_pldo_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2000000>;
- };
- };
-
- vcc_3v3_s3: dcdc-reg8 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc_3v3_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vddq_ddr_s0: dcdc-reg9 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vddq_ddr_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s3: dcdc-reg10 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc_1v8_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avcc_1v8_s0: pldo-reg1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "avcc_1v8_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s0: pldo-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc_1v8_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avdd_1v2_s0: pldo-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-name = "avdd_1v2_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3_s0: pldo-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vcc_3v3_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd_s0: pldo-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vccio_sd_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- pldo6_s3: pldo-reg6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "pldo6_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_s3: nldo-reg1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "vdd_0v75_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_ddr_pll_s0: nldo-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- regulator-name = "vdd_ddr_pll_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- avdd_0v75_s0: nldo-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "avdd_0v75_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v85_s0: nldo-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- regulator-name = "vdd_0v85_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v75_s0: nldo-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "vdd_0v75_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&tsadc {
- status = "okay";
-};
-
-&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
-};
-
-&u2phy1 {
- status = "okay";
-};
-
-&u2phy1_otg {
- status = "okay";
-};
-
-&u2phy2 {
- status = "okay";
-};
-
-&u2phy2_host {
- /* connected to USB hub, which is powered by vcc5v0_sys */
- phy-supply = <&vcc5v0_sys>;
- status = "okay";
-};
-
-&u2phy3 {
- status = "okay";
-};
-
-&u2phy3_host {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
-};
-
-&usbdp_phy1 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usb_host1_xhci {
- dr_mode = "host";
- status = "okay";
-};
-
-&usb_host2_xhci {
- status = "okay";
-};
-
-&vop_mmu {
- status = "okay";
-};
-
-&vop {
- status = "okay";
-};
-
-&vp0 {
- vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
- reg = <ROCKCHIP_VOP2_EP_HDMI0>;
- remote-endpoint = <&hdmi0_in_vp0>;
- };
-};
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Radxa Computer (Shenzhen) Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include "rk3588-rock-5.dtsi"
+
+/delete-node/ &eeprom;
+/delete-node/ &pcie30x2_perstn_m1;
+/delete-node/ &pcie3x2;
+/delete-node/ &vcc_5v;
+
+/ {
+ model = "Radxa ROCK 5B";
+ compatible = "radxa,rock-5b", "rockchip,rk3588";
+
+ aliases {
+ mmc2 = &sdio;
+ };
+
+ regulator-3v3-1 {
+ gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
+ };
+
+ regulator-5v0-2 {
+ gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
+ };
+
+ rfkill {
+ label = "rfkill-m2-wlan";
+ shutdown-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
+ };
+
+ rfkill-bt {
+ label = "rfkill-m2-bt";
+ };
+
+ sound {
+ hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&pinctrl {
+ pcie {
+ ekey_en: regulator-3v3-1 {
+ rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sound {
+ hp_detect: sound-0 {
+ rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ usb_host_pwren_h: regulator-5v0-2 {
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&sdio {
+ bus-width = <4>;
+ cap-sdio-irq;
+ disable-wp;
+ keep-power-in-suspend;
+ no-mmc;
+ no-sd;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdiom0_pins>;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc3v3_wf>;
+ vqmmc-supply = <&vcc_1v8_s3>;
+ wakeup-source;
+ status = "okay";
+};
+
+&u2phy1_otg {
+ phy-supply = <&vcc5v_usb>;
+};
+
+&u2phy2_host {
+ /* connected to USB hub, which is powered by vcc5v0_sys */
+ phy-supply = <&vcc5v0_sys>;
+};
+
+&uart6 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart6m1_xfer &uart6m1_ctsn &uart6m1_rtsn>;
+ status = "okay";
+};
+
+&usbc0 {
+ /*
+ * When the board is starting to send power-delivery messages
+ * too late (5 seconds according to the specification), the
+ * power-supply reacts with a hard-reset. That removes the
+ * power from VBUS for some time, which resets the whole board.
+ */
+ status = "fail";
+};
+
+&usbc0_con {
+ power-role = "sink";
+ try-power-role = "sink";
+ op-sink-microwatt = <1000000>;
+ sink-pdos =
+ <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>,
+ <PDO_VAR(5000, 20000, 5000)>;
+};
+
+&usbdp_phy0 {
+ sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
+ sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
+};
--
2.43.0
_______________________________________________
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Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH 0/3] arm64: dts: rockchip: Add Radxa ROCK 5B+ and rebase Radxa ROCK 5B
2024-12-24 21:09 [PATCH 0/3] arm64: dts: rockchip: Add Radxa ROCK 5B+ and rebase Radxa ROCK 5B FUKAUMI Naoki
` (2 preceding siblings ...)
2024-12-24 21:09 ` [PATCH 3/3] arm64: dts: rockchip: Convert Radxa ROCK 5B to use shared .dtsi FUKAUMI Naoki
@ 2024-12-25 8:32 ` Alexey Charkov
2024-12-25 9:35 ` Dragan Simic
2024-12-25 10:09 ` FUKAUMI Naoki
2024-12-27 15:18 ` Rob Herring (Arm)
4 siblings, 2 replies; 10+ messages in thread
From: Alexey Charkov @ 2024-12-25 8:32 UTC (permalink / raw)
To: FUKAUMI Naoki
Cc: heiko, robh, conor+dt, inindev, liujianfeng1994, jonas,
dmt.yashin, sebastian.reichel, tim, kever.yang,
marcin.juszkiewicz, linux-rockchip, devicetree, michael.riesch,
macromorgan, krzk+dt, dsimic
Hi Naoki,
On Wed, Dec 25, 2024 at 12:22 PM FUKAUMI Naoki <naoki@radxa.com> wrote:
>
> The Radxa ROCK 5B+ is an upgraded version of the Radxa ROCK 5B.
>
> This patch series introduces a shared .dtsi that can be used on the
> new Radxa ROCK 5B+, the existing Radxa ROCK 5B, and the upcoming Radxa
> ROCK 5T.
>
> This patch series includes "arm64: dts: rockchip: Add USB-C support to
> ROCK 5B" by Sebastian Reichel[1].
>
> [1] https://patchwork.kernel.org/project/linux-rockchip/patch/20241210163615.120594-1-sebastian.reichel@collabora.com/
>
> FUKAUMI Naoki (3):
> dt-bindings: arm: rockchip: Add Radxa ROCK 5B+
> arm64: dts: rockchip: Add Radxa ROCK 5B+
> arm64: dts: rockchip: Convert Radxa ROCK 5B to use shared .dtsi
This one doesn't look equivalent to the existing ROCK 5B device tree
after your changes (I've noticed in particular that fan cooling levels
are different - but that's just the part I remember well since I
modified it earlier, there might be more differences).
Would you mind rearranging the patches so that the split of ROCK 5B
dts into a common .dtsi and per-board .dts additions could be made
one-to-one equivalent without functional changes, and then add ROCK
5B+ and any other required changes on top of that?
See what Dragan did where he prepared parent .dtsi for per-variant OPPs [1]
[1] https://lore.kernel.org/linux-rockchip/9ffedc0e2ca7f167d9d795b2a8f43cb9f56a653b.1717923308.git.dsimic@manjaro.org/
Best,
Alexey
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH 0/3] arm64: dts: rockchip: Add Radxa ROCK 5B+ and rebase Radxa ROCK 5B
2024-12-25 8:32 ` [PATCH 0/3] arm64: dts: rockchip: Add Radxa ROCK 5B+ and rebase Radxa ROCK 5B Alexey Charkov
@ 2024-12-25 9:35 ` Dragan Simic
2024-12-25 10:09 ` FUKAUMI Naoki
1 sibling, 0 replies; 10+ messages in thread
From: Dragan Simic @ 2024-12-25 9:35 UTC (permalink / raw)
To: Alexey Charkov
Cc: FUKAUMI Naoki, heiko, robh, conor+dt, inindev, liujianfeng1994,
jonas, dmt.yashin, sebastian.reichel, tim, kever.yang,
marcin.juszkiewicz, linux-rockchip, devicetree, michael.riesch,
macromorgan, krzk+dt
Hello Alexey and Naoki,
On 2024-12-25 09:32, Alexey Charkov wrote:
> On Wed, Dec 25, 2024 at 12:22 PM FUKAUMI Naoki <naoki@radxa.com> wrote:
>>
>> The Radxa ROCK 5B+ is an upgraded version of the Radxa ROCK 5B.
>>
>> This patch series introduces a shared .dtsi that can be used on the
>> new Radxa ROCK 5B+, the existing Radxa ROCK 5B, and the upcoming Radxa
>> ROCK 5T.
>>
>> This patch series includes "arm64: dts: rockchip: Add USB-C support to
>> ROCK 5B" by Sebastian Reichel[1].
>>
>> [1]
>> https://patchwork.kernel.org/project/linux-rockchip/patch/20241210163615.120594-1-sebastian.reichel@collabora.com/
>>
>> FUKAUMI Naoki (3):
>> dt-bindings: arm: rockchip: Add Radxa ROCK 5B+
>> arm64: dts: rockchip: Add Radxa ROCK 5B+
>> arm64: dts: rockchip: Convert Radxa ROCK 5B to use shared .dtsi
>
> This one doesn't look equivalent to the existing ROCK 5B device tree
> after your changes (I've noticed in particular that fan cooling levels
> are different - but that's just the part I remember well since I
> modified it earlier, there might be more differences).
>
> Would you mind rearranging the patches so that the split of ROCK 5B
> dts into a common .dtsi and per-board .dts additions could be made
> one-to-one equivalent without functional changes, and then add ROCK
> 5B+ and any other required changes on top of that?
>
> See what Dragan did where he prepared parent .dtsi for per-variant OPPs
> [1]
>
> [1]
> https://lore.kernel.org/linux-rockchip/9ffedc0e2ca7f167d9d795b2a8f43cb9f56a653b.1717923308.git.dsimic@manjaro.org/
Just a brief note that I agree with Alexey's recommendation above.
These patches should be reworked in a way that makes the transition
to using the shared dtsi file much more obvious.
Besides making these changes easier to review that way, and giving
better chances to ensuring there are no issues that managed to slip
through the cracks, it will also be much easier later to track down
any possible regressions, in case they eventually are discovered.
_______________________________________________
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Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 0/3] arm64: dts: rockchip: Add Radxa ROCK 5B+ and rebase Radxa ROCK 5B
2024-12-25 8:32 ` [PATCH 0/3] arm64: dts: rockchip: Add Radxa ROCK 5B+ and rebase Radxa ROCK 5B Alexey Charkov
2024-12-25 9:35 ` Dragan Simic
@ 2024-12-25 10:09 ` FUKAUMI Naoki
2024-12-25 10:25 ` Dragan Simic
1 sibling, 1 reply; 10+ messages in thread
From: FUKAUMI Naoki @ 2024-12-25 10:09 UTC (permalink / raw)
To: Alexey Charkov
Cc: heiko, robh, conor+dt, inindev, liujianfeng1994, jonas,
dmt.yashin, sebastian.reichel, tim, kever.yang,
marcin.juszkiewicz, linux-rockchip, devicetree, michael.riesch,
macromorgan, krzk+dt, dsimic
Hi Alexey,
On 12/25/24 17:32, Alexey Charkov wrote:
> Hi Naoki,
>
> On Wed, Dec 25, 2024 at 12:22 PM FUKAUMI Naoki <naoki@radxa.com> wrote:
>>
>> The Radxa ROCK 5B+ is an upgraded version of the Radxa ROCK 5B.
>>
>> This patch series introduces a shared .dtsi that can be used on the
>> new Radxa ROCK 5B+, the existing Radxa ROCK 5B, and the upcoming Radxa
>> ROCK 5T.
>>
>> This patch series includes "arm64: dts: rockchip: Add USB-C support to
>> ROCK 5B" by Sebastian Reichel[1].
>>
>> [1] https://patchwork.kernel.org/project/linux-rockchip/patch/20241210163615.120594-1-sebastian.reichel@collabora.com/
>>
>> FUKAUMI Naoki (3):
>> dt-bindings: arm: rockchip: Add Radxa ROCK 5B+
>> arm64: dts: rockchip: Add Radxa ROCK 5B+
>> arm64: dts: rockchip: Convert Radxa ROCK 5B to use shared .dtsi
>
> This one doesn't look equivalent to the existing ROCK 5B device tree
> after your changes (I've noticed in particular that fan cooling levels
> are different - but that's just the part I remember well since I
> modified it earlier, there might be more differences).
Thanks for pointing!
> Would you mind rearranging the patches so that the split of ROCK 5B
> dts into a common .dtsi and per-board .dts additions could be made
> one-to-one equivalent without functional changes, and then add ROCK
> 5B+ and any other required changes on top of that?
My priority goal is to add support for ROCK 5B+ and 5T. This time, I
will not make any changes to ROCK 5B so as not to break it. Therefore, I
will drop PATCH 3/3.
(I would like to make changes to ROCK 5B at some point.)
Best regards,
--
FUKAUMI Naoki
Radxa Computer (Shenzhen) Co., Ltd.
> See what Dragan did where he prepared parent .dtsi for per-variant OPPs [1]
>
> [1] https://lore.kernel.org/linux-rockchip/9ffedc0e2ca7f167d9d795b2a8f43cb9f56a653b.1717923308.git.dsimic@manjaro.org/
>
> Best,
> Alexey
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 0/3] arm64: dts: rockchip: Add Radxa ROCK 5B+ and rebase Radxa ROCK 5B
2024-12-25 10:09 ` FUKAUMI Naoki
@ 2024-12-25 10:25 ` Dragan Simic
2024-12-26 0:41 ` FUKAUMI Naoki
0 siblings, 1 reply; 10+ messages in thread
From: Dragan Simic @ 2024-12-25 10:25 UTC (permalink / raw)
To: FUKAUMI Naoki
Cc: Alexey Charkov, heiko, robh, conor+dt, inindev, liujianfeng1994,
jonas, dmt.yashin, sebastian.reichel, tim, kever.yang,
marcin.juszkiewicz, linux-rockchip, devicetree, michael.riesch,
macromorgan, krzk+dt
Hello Naoki,
On 2024-12-25 11:09, FUKAUMI Naoki wrote:
> On 12/25/24 17:32, Alexey Charkov wrote:
>> On Wed, Dec 25, 2024 at 12:22 PM FUKAUMI Naoki <naoki@radxa.com>
>> wrote:
>>>
>>> The Radxa ROCK 5B+ is an upgraded version of the Radxa ROCK 5B.
>>>
>>> This patch series introduces a shared .dtsi that can be used on the
>>> new Radxa ROCK 5B+, the existing Radxa ROCK 5B, and the upcoming
>>> Radxa
>>> ROCK 5T.
>>>
>>> This patch series includes "arm64: dts: rockchip: Add USB-C support
>>> to
>>> ROCK 5B" by Sebastian Reichel[1].
>>>
>>> [1]
>>> https://patchwork.kernel.org/project/linux-rockchip/patch/20241210163615.120594-1-sebastian.reichel@collabora.com/
>>>
>>> FUKAUMI Naoki (3):
>>> dt-bindings: arm: rockchip: Add Radxa ROCK 5B+
>>> arm64: dts: rockchip: Add Radxa ROCK 5B+
>>> arm64: dts: rockchip: Convert Radxa ROCK 5B to use shared .dtsi
>>
>> This one doesn't look equivalent to the existing ROCK 5B device tree
>> after your changes (I've noticed in particular that fan cooling levels
>> are different - but that's just the part I remember well since I
>> modified it earlier, there might be more differences).
>
> Thanks for pointing!
>
>> Would you mind rearranging the patches so that the split of ROCK 5B
>> dts into a common .dtsi and per-board .dts additions could be made
>> one-to-one equivalent without functional changes, and then add ROCK
>> 5B+ and any other required changes on top of that?
>
> My priority goal is to add support for ROCK 5B+ and 5T. This time, I
> will not make any changes to ROCK 5B so as not to break it. Therefore,
> I will drop PATCH 3/3.
>
> (I would like to make changes to ROCK 5B at some point.)
I see, but I think that just dropping the patch 3/3 wouldn't be the
best possible option. That way you'd end up with a "dangling" dtsi
file, used by just one board dts file, which is a bit suboptimal.
I'd suggest that you actually do it the right way, so to speak, by
actually converting the ROCK 5B dts file to use the shared dtsi file
in a way that makes the transition more obvious and, as a result,
easier to review, as already suggested above.
As another option, I'm going to ask Radxa for a sample ROCK 5B+ board
soon, for my Rockchip SoC binning project, and if I actually get it,
I could take over this series, to help you that way with getting the
patch series in better shape.
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 0/3] arm64: dts: rockchip: Add Radxa ROCK 5B+ and rebase Radxa ROCK 5B
2024-12-25 10:25 ` Dragan Simic
@ 2024-12-26 0:41 ` FUKAUMI Naoki
0 siblings, 0 replies; 10+ messages in thread
From: FUKAUMI Naoki @ 2024-12-26 0:41 UTC (permalink / raw)
To: Dragan Simic
Cc: Alexey Charkov, heiko, robh, conor+dt, inindev, liujianfeng1994,
jonas, dmt.yashin, sebastian.reichel, tim, kever.yang,
marcin.juszkiewicz, linux-rockchip, devicetree, michael.riesch,
macromorgan, krzk+dt
Hi Dragan,
On 12/25/24 19:25, Dragan Simic wrote:
> Hello Naoki,
>
> On 2024-12-25 11:09, FUKAUMI Naoki wrote:
>> On 12/25/24 17:32, Alexey Charkov wrote:
>>> On Wed, Dec 25, 2024 at 12:22 PM FUKAUMI Naoki <naoki@radxa.com> wrote:
>>>>
>>>> The Radxa ROCK 5B+ is an upgraded version of the Radxa ROCK 5B.
>>>>
>>>> This patch series introduces a shared .dtsi that can be used on the
>>>> new Radxa ROCK 5B+, the existing Radxa ROCK 5B, and the upcoming Radxa
>>>> ROCK 5T.
>>>>
>>>> This patch series includes "arm64: dts: rockchip: Add USB-C support to
>>>> ROCK 5B" by Sebastian Reichel[1].
>>>>
>>>> [1] https://patchwork.kernel.org/project/linux-rockchip/
>>>> patch/20241210163615.120594-1-sebastian.reichel@collabora.com/
>>>>
>>>> FUKAUMI Naoki (3):
>>>> dt-bindings: arm: rockchip: Add Radxa ROCK 5B+
>>>> arm64: dts: rockchip: Add Radxa ROCK 5B+
>>>> arm64: dts: rockchip: Convert Radxa ROCK 5B to use shared .dtsi
>>>
>>> This one doesn't look equivalent to the existing ROCK 5B device tree
>>> after your changes (I've noticed in particular that fan cooling levels
>>> are different - but that's just the part I remember well since I
>>> modified it earlier, there might be more differences).
>>
>> Thanks for pointing!
>>
>>> Would you mind rearranging the patches so that the split of ROCK 5B
>>> dts into a common .dtsi and per-board .dts additions could be made
>>> one-to-one equivalent without functional changes, and then add ROCK
>>> 5B+ and any other required changes on top of that?
>>
>> My priority goal is to add support for ROCK 5B+ and 5T. This time, I
>> will not make any changes to ROCK 5B so as not to break it. Therefore,
>> I will drop PATCH 3/3.
>>
>> (I would like to make changes to ROCK 5B at some point.)
>
> I see, but I think that just dropping the patch 3/3 wouldn't be the
> best possible option. That way you'd end up with a "dangling" dtsi
> file, used by just one board dts file, which is a bit suboptimal.
So please ignore this patch series until I can add ROCK 5T, which will
be available soon. (Maybe...)
I'm sending v2 due to a small fix, please ignore it.
> I'd suggest that you actually do it the right way, so to speak, by
> actually converting the ROCK 5B dts file to use the shared dtsi file
> in a way that makes the transition more obvious and, as a result,
> easier to review, as already suggested above.
If I have enough time to fix the ROCK 5B dts, I will do it.
Best regards,
--
FUKAUMI Naoki
Radxa Computer (Shenzhen) Co., Ltd.
> As another option, I'm going to ask Radxa for a sample ROCK 5B+ board
> soon, for my Rockchip SoC binning project, and if I actually get it,
> I could take over this series, to help you that way with getting the
> patch series in better shape.
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 0/3] arm64: dts: rockchip: Add Radxa ROCK 5B+ and rebase Radxa ROCK 5B
2024-12-24 21:09 [PATCH 0/3] arm64: dts: rockchip: Add Radxa ROCK 5B+ and rebase Radxa ROCK 5B FUKAUMI Naoki
` (3 preceding siblings ...)
2024-12-25 8:32 ` [PATCH 0/3] arm64: dts: rockchip: Add Radxa ROCK 5B+ and rebase Radxa ROCK 5B Alexey Charkov
@ 2024-12-27 15:18 ` Rob Herring (Arm)
4 siblings, 0 replies; 10+ messages in thread
From: Rob Herring (Arm) @ 2024-12-27 15:18 UTC (permalink / raw)
To: FUKAUMI Naoki
Cc: devicetree, conor+dt, inindev, liujianfeng1994, jonas, dmt.yashin,
kever.yang, tim, sebastian.reichel, marcin.juszkiewicz,
linux-rockchip, alchark, michael.riesch, macromorgan, krzk+dt,
dsimic, heiko
On Tue, 24 Dec 2024 21:09:09 +0000, FUKAUMI Naoki wrote:
> The Radxa ROCK 5B+ is an upgraded version of the Radxa ROCK 5B.
>
> This patch series introduces a shared .dtsi that can be used on the
> new Radxa ROCK 5B+, the existing Radxa ROCK 5B, and the upcoming Radxa
> ROCK 5T.
>
> This patch series includes "arm64: dts: rockchip: Add USB-C support to
> ROCK 5B" by Sebastian Reichel[1].
>
> [1] https://patchwork.kernel.org/project/linux-rockchip/patch/20241210163615.120594-1-sebastian.reichel@collabora.com/
>
> FUKAUMI Naoki (3):
> dt-bindings: arm: rockchip: Add Radxa ROCK 5B+
> arm64: dts: rockchip: Add Radxa ROCK 5B+
> arm64: dts: rockchip: Convert Radxa ROCK 5B to use shared .dtsi
>
> .../devicetree/bindings/arm/rockchip.yaml | 5 +
> arch/arm64/boot/dts/rockchip/Makefile | 1 +
> ...{rk3588-rock-5b.dts => rk3588-rock-5.dtsi} | 555 +++++----
> .../boot/dts/rockchip/rk3588-rock-5b-plus.dts | 97 ++
> .../boot/dts/rockchip/rk3588-rock-5b.dts | 1026 ++---------------
> 5 files changed, 549 insertions(+), 1135 deletions(-)
> copy arch/arm64/boot/dts/rockchip/{rk3588-rock-5b.dts => rk3588-rock-5.dtsi} (71%)
> create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
> rewrite arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts (93%)
>
> --
> 2.43.0
>
>
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
New warnings running 'make CHECK_DTBS=y rockchip/rk3588-rock-5b-plus.dtb rockchip/rk3588-rock-5b.dtb' for 20241224210912.2121-1-naoki@radxa.com:
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtb: phy@fee80000: 'phy-supply' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/phy/rockchip,pcie3-phy.yaml#
arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dtb: phy@fee80000: 'phy-supply' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/phy/rockchip,pcie3-phy.yaml#
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^ permalink raw reply [flat|nested] 10+ messages in thread