[v2,PATCH 0/5] RK3566 BigtreeTech Pi2 fixes

[v2,PATCH 0/5] RK3566 BigtreeTech Pi2 fixes

[Andrey Leonchikov]

From: Andrei Leonchikov <andreil499@gmail.com>

Some fixes for a DTS to a valid support all features.
Two fixes affect6 to a normal work, two for supress
a some warnings and one to future use.
Signed-off-by: Andrey Leonchikov <andreil499@gmail.com>

 arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi  |    2 +-
 arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi  |    2 ++
 arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi  |    1 +
 arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-pi2.dts   |    9 +++++++++
 arch/arm64/boot/dts/rockchip/rk356x-base.dtsi             |  105 +++++++++++++++++++++++++
 2 file changed, 118 insertion(+), 1 deletion(-)

-- 
2.51.0


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[v2,PATCH 1/5] RK3566 BTT Pi2 DTS fixes.

[Andrey Leonchikov]

Original DTS is invalid and can't use a PCIe. With fixed GPIO bank number all fine.
And a valid value for this pin - into "pcie_drv" definition:
	pcie_drv: pcie-drv {
	    rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
	};
Signed-off-by: Andrey Leonchikov <andreil499@gmail.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
index e7ba477e75f9..fdf7d00edf4d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
@@ -120,7 +120,7 @@ vcc3v3_pcie: regulator-vcc3v3-pcie {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc3v3_pcie";
 		enable-active-high;
-		gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
+		gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pcie_drv>;
 		regulator-always-on;
-- 
2.51.0


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[v2,PATCH 2/5] RK3566 BTT Pi2 - Fix GMAC default delays.

[Andrey Leonchikov]

Simple patch to avoid a warning on GMAC driver initialization.
Default values same to a manufacturer DTS.
Signed-off-by: Andrey Leonchikov <andreil499@gmail.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
index fdf7d00edf4d..d31b9bd54162 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
@@ -265,6 +265,8 @@ &gmac1m0_rx_bus2
 			&gmac1m0_rgmii_clk
 			&gmac1m0_clkinout
 			&gmac1m0_rgmii_bus>;
+	tx_delay = <0x19>;
+	rx_delay = <0x05>;
 	status = "okay";
 };
 
-- 
2.51.0


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[v2,PATCH 3/5] RK3566 BTT Pi2 - Fix RK808 clock names. Require for a normal shutdown/reboot.

[Andrey Leonchikov]

From: Andrey Leonchikob <andreil499@gmail.com>

This fix require to a normal reboot and shotdown handling.
Driver use a clock names to find it on a shutdown process.
When don't find it - no correct shutdown and some peripheral
don't work without power cycle.
Signed-off-by: Andrey Leonchikov <andreil499@gmail.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
index d31b9bd54162..517c70d15502 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
@@ -338,6 +338,7 @@ rk809: pmic@20 {
 		#clock-cells = <1>;
 		clock-names = "mclk";
 		clocks = <&cru I2S1_MCLKOUT_TX>;
+		clock-output-names = "rk808-clkout1", "rk808-clkout2";
 		pinctrl-names = "default", "pmic-sleep",
 				"pmic-power-off", "pmic-reset";
 		pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
-- 
2.51.0


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[v2,PATCH 4/5] RK3566 BTT Pi2 - Fix default values.

[Andrey Leonchikov]

First fix - setup a default clock speed for a SCMI driver.
Need to avoid a warning.
Second fix - to disable FAN PWM. By default, this peripheral
don't enabled and connected to SBC.
Signed-off-by: Andrey Leonchikov <andreil499@gmail.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-pi2.dts b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-pi2.dts
index 7cd444caa18b..3b04b3f7e923 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-pi2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-pi2.dts
@@ -8,3 +8,12 @@ / {
 	model = "BigTreeTech Pi 2";
 	compatible = "bigtreetech,pi2", "rockchip,rk3566";
 };
+
+&scmi_clk {
+	rockchip,clk-init = <1104000000>;
+};
+
+/* disable all - default state */
+&fan {
+	status = "disabled";
+};
-- 
2.51.0


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[v2,PATCH 5/5] RK356x - Add OTP description.

[Andrey Leonchikov]

OTP mapping, based on RK3568 datasheet and BIQU DTS.
Signed-off-by: Andrey Leonchikov <andreil499@gmail.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
index fd2214b6fad4..f9ab60750465 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
@@ -1057,6 +1058,111 @@ rng: rng@fe388000 {
 		status = "disabled";
 	};
 
+	otp: otp@fe38c000 {
+		compatible = "rockchip,rk3568-otp";
+		reg = <0x00 0xfe38c000 0x00 0x4000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		clocks = <&cru CLK_OTPC_NS_USR>,
+			<&cru CLK_OTPC_NS_SBPI>,
+			<&cru PCLK_OTPC_NS>,
+			<&cru PCLK_OTPPHY>;
+		clock-names = "usr", "sbpi", "apb", "phy";
+		resets = <&cru SRST_OTPPHY>;
+		reset-names = "otp_phy";
+
+		cpu_code: cpu-code@2 {
+			reg = <0x02 0x02>;
+		};
+
+		specification_serial_number: specification-serial-number@7 {
+			reg = <0x07 0x01>;
+			bits = <0x00 0x05>;
+		};
+
+		otp_cpu_version: cpu-version@8 {
+			reg = <0x08 0x01>;
+			bits = <0x03 0x03>;
+		};
+
+		mbist_vmin: mbist-vmin@9 {
+			reg = <0x09 0x01>;
+			bits = <0x00 0x04>;
+		};
+
+		otp_id: id@a {
+			reg = <0x0a 0x10>;
+		};
+
+		cpu_leakage: cpu-leakage@1a {
+			reg = <0x1a 0x01>;
+		};
+
+		log_leakage: log-leakage@1b {
+			reg = <0x1b 0x01>;
+		};
+
+		npu_leakage: npu-leakage@1c {
+			reg = <0x1c 0x01>;
+		};
+
+		gpu_leakage: gpu-leakage@1d {
+			reg = <0x1d 0x01>;
+		};
+
+		core_pvtm: core-pvtm@2a {
+			reg = <0x2a 0x02>;
+		};
+
+		cpu_tsadc_trim_l: cpu-tsadc-trim-l@2e {
+			reg = <0x2e 0x01>;
+		};
+
+		cpu_tsadc_trim_h: cpu-tsadc-trim-h@2f {
+			reg = <0x2f 0x01>;
+			bits = <0x00 0x04>;
+		};
+
+		gpu_tsadc_trim_l: npu-tsadc-trim-l@30 {
+			reg = <0x30 0x01>;
+		};
+
+		gpu_tsadc_trim_h: npu-tsadc-trim-h@31 {
+			reg = <0x31 0x01>;
+			bits = <0x00 0x04>;
+		};
+
+		tsadc_trim_base_frac: tsadc-trim-base-frac@31 {
+			reg = <0x31 0x01>;
+			bits = <0x04 0x04>;
+		};
+
+		tsadc_trim_base: tsadc-trim-base@32 {
+			reg = <0x32 0x01>;
+		};
+
+		cpu_opp_info: cpu-opp-info@36 {
+			reg = <0x36 0x06>;
+		};
+
+		gpu_opp_info: gpu-opp-info@3c {
+			reg = <0x3c 0x06>;
+		};
+
+		npu_opp_info: npu-opp-info@42 {
+			reg = <0x42 0x06>;
+		};
+
+		dmc_opp_info: dmc-opp-info@48 {
+			reg = <0x48 0x06>;
+		};
+
+		remark_spec_serial_number: remark-spec-serial-number@56 {
+			reg = <0x56 1>;
+			bits = <0 5>;
+		};
+	};
+
 	i2s0_8ch: i2s@fe400000 {
 		compatible = "rockchip,rk3568-i2s-tdm";
 		reg = <0x0 0xfe400000 0x0 0x1000>;
-- 
2.51.0


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Re: [v2,PATCH 5/5] RK356x - Add OTP description.

[Dragan Simic]

Hello Andrey,

Thanks for your patch series.  Please note that this patch (i.e. 5/5)
doesn't belong to the series, because it addresses a completely separate
topic, so please resend it as a separate patch and Cc me;  I'll then be
happy to review this patch in detail.

On 2025-09-10 23:54, Andrey Leonchikov wrote:
> OTP mapping, based on RK3568 datasheet and BIQU DTS.

Please note that an empty line is required between the patch description
and the tag(s), which applies to all patches in your series.

> Signed-off-by: Andrey Leonchikov <andreil499@gmail.com>

Next, patch summaries/subjects require a proper prefix, which in this 
case
is "arm64: dts: rockchip:".  You can always have a look at the Git log 
for
the file you're changing, to determine what's the right prefix to use.

You're also missing some of the required recipients in the To and Cc 
lists.
Please, have a look at Documentation/process/submitting-patches.rst and
scripts/get_maintainer.pl in the kernel source for more details.

Finally, both the patch summaries and the patch descriptions in your 
series
require a bit of rewording, to conform to the usual language and to 
provide
more details.  Having a look at the Git log also helps there.

Oh, and where's the v1 of this series?  Am I missing something?


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[v2,PATCH 5/5] RK356x - Add OTP description.

[Andrey Leonchikov]

Hi, Drang.
Ok, I will work on this patches a more and send a v3 soon.
About v1 - I immediatelly archive it - this messages don't have any
descriptions.

-- 
2.51.0


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Re: [v2,PATCH 2/5] RK3566 BTT Pi2 - Fix GMAC default delays.

[Jonas Karlman]

Hi Andrey,

On 9/10/2025 11:54 PM, Andrey Leonchikov wrote:
> Simple patch to avoid a warning on GMAC driver initialization.
> Default values same to a manufacturer DTS.
> Signed-off-by: Andrey Leonchikov <andreil499@gmail.com>
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
> index fdf7d00edf4d..d31b9bd54162 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
> @@ -265,6 +265,8 @@ &gmac1m0_rx_bus2
>  			&gmac1m0_rgmii_clk
>  			&gmac1m0_clkinout
>  			&gmac1m0_rgmii_bus>;
> +	tx_delay = <0x19>;
> +	rx_delay = <0x05>;

This is using phy-mode = rgmii-id, so tx/rx_delay should not be needed.

Please do not add these just to avoid a warning by the driver, the
driver should more likely be fixed not to warn about missing props.

Currently the driver wont apply these delays due to use of rgmii-id,
however in future the driver may be changed to be able to use these
props to apply a small delay on top of the PHY applied delay. I have
patches for these in my local tree that is on my todo to send out.

Please drop this patch to avoid new issues in the future.

Regards,
Jonas

>  	status = "okay";
>  };
>  


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Re: [v2,PATCH 5/5] RK356x - Add OTP description.

[Dragan Simic]

Hello Andrey,

On 2025-09-12 14:49, Andrey Leonchikov wrote:
> Ok, I will work on this patches a more and send a v3 soon.
> About v1 - I immediatelly archive it - this messages don't have any
> descriptions.

I'm sorry, but that's not the way the patch versioning works.
When you send patches to mailing lists, the version numbers refer
to the versions sent to the mailing list, instead of referring
to your internal patch versions.

Thus, the first version sent to a mailing list cannot be v2.

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