* [PATCH 1/3] drm/rockchip: Fix typo in VOP macros argument
2019-01-09 18:56 [PATCH 0/3] Support reflect-x/y on RK3328, RK3368, and RK3399 Ezequiel Garcia
@ 2019-01-09 18:56 ` Ezequiel Garcia
2019-01-09 18:56 ` [PATCH 2/3] drm/rockchip: Separate RK3288 from RK3368 win01 registers Ezequiel Garcia
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Ezequiel Garcia @ 2019-01-09 18:56 UTC (permalink / raw)
To: dri-devel
Cc: Daniele Castagna, Tomasz Figa, linux-rockchip, Sean Paul,
Kristian H . Kristensen, kernel, Ezequiel Garcia
Fix a small typo in the macros VOP argument. The macro argument
is currently wrongly named "x", and then never used. The code
built fine almost by accident, as the macros are always used
in a context where a proper "vop" symbol exists.
This fix is almost cosmetic, as the resulting code shouldn't change.
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 7ad9067b3110..fe800f784c18 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -45,21 +45,21 @@
#include "rockchip_drm_vop.h"
#include "rockchip_rgb.h"
-#define VOP_WIN_SET(x, win, name, v) \
+#define VOP_WIN_SET(vop, win, name, v) \
vop_reg_set(vop, &win->phy->name, win->base, ~0, v, #name)
-#define VOP_SCL_SET(x, win, name, v) \
+#define VOP_SCL_SET(vop, win, name, v) \
vop_reg_set(vop, &win->phy->scl->name, win->base, ~0, v, #name)
-#define VOP_SCL_SET_EXT(x, win, name, v) \
+#define VOP_SCL_SET_EXT(vop, win, name, v) \
vop_reg_set(vop, &win->phy->scl->ext->name, \
win->base, ~0, v, #name)
-#define VOP_WIN_YUV2YUV_SET(x, win_yuv2yuv, name, v) \
+#define VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, name, v) \
do { \
if (win_yuv2yuv && win_yuv2yuv->name.mask) \
vop_reg_set(vop, &win_yuv2yuv->name, 0, ~0, v, #name); \
} while (0)
-#define VOP_WIN_YUV2YUV_COEFFICIENT_SET(x, win_yuv2yuv, name, v) \
+#define VOP_WIN_YUV2YUV_COEFFICIENT_SET(vop, win_yuv2yuv, name, v) \
do { \
if (win_yuv2yuv && win_yuv2yuv->phy->name.mask) \
vop_reg_set(vop, &win_yuv2yuv->phy->name, win_yuv2yuv->base, ~0, v, #name); \
@@ -85,8 +85,8 @@
#define VOP_INTR_GET_TYPE(vop, name, type) \
vop_get_intr_type(vop, &vop->data->intr->name, type)
-#define VOP_WIN_GET(x, win, name) \
- vop_read_reg(x, win->offset, win->phy->name)
+#define VOP_WIN_GET(vop, win, name) \
+ vop_read_reg(vop, win->offset, win->phy->name)
#define VOP_WIN_GET_YRGBADDR(vop, win) \
vop_readl(vop, win->base + win->phy->yrgb_mst.offset)
--
2.20.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 2/3] drm/rockchip: Separate RK3288 from RK3368 win01 registers
2019-01-09 18:56 [PATCH 0/3] Support reflect-x/y on RK3328, RK3368, and RK3399 Ezequiel Garcia
2019-01-09 18:56 ` [PATCH 1/3] drm/rockchip: Fix typo in VOP macros argument Ezequiel Garcia
@ 2019-01-09 18:56 ` Ezequiel Garcia
2019-01-09 18:56 ` [PATCH 3/3] drm/rockchip: Add reflection properties Ezequiel Garcia
2019-01-10 23:55 ` [PATCH 0/3] Support reflect-x/y on RK3328, RK3368, and RK3399 Heiko Stuebner
3 siblings, 0 replies; 5+ messages in thread
From: Ezequiel Garcia @ 2019-01-09 18:56 UTC (permalink / raw)
To: dri-devel
Cc: Daniele Castagna, Tomasz Figa, linux-rockchip, Sean Paul,
Kristian H . Kristensen, kernel, Ezequiel Garcia
This commit splits the registers for RK3288 from those
for RK3328, RK3368 and RK3399. It seems RK3288 does not
support plane x-y-mirroring, and so in order to support this
for the other SoCs, we need to have separate set of registers
for win0 and win1.
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 31 +++++++++++++++++----
1 file changed, 25 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index fe752df4e038..4f7000b5f9ed 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -550,6 +550,25 @@ static const struct vop_intr rk3368_vop_intr = {
.clear = VOP_REG_MASK_SYNC(RK3368_INTR_CLEAR, 0x3fff, 0),
};
+static const struct vop_win_phy rk3368_win01_data = {
+ .scl = &rk3288_win_full_scl,
+ .data_formats = formats_win_full,
+ .nformats = ARRAY_SIZE(formats_win_full),
+ .enable = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 0),
+ .format = VOP_REG(RK3368_WIN0_CTRL0, 0x7, 1),
+ .rb_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 12),
+ .act_info = VOP_REG(RK3368_WIN0_ACT_INFO, 0x1fff1fff, 0),
+ .dsp_info = VOP_REG(RK3368_WIN0_DSP_INFO, 0x0fff0fff, 0),
+ .dsp_st = VOP_REG(RK3368_WIN0_DSP_ST, 0x1fff1fff, 0),
+ .yrgb_mst = VOP_REG(RK3368_WIN0_YRGB_MST, 0xffffffff, 0),
+ .uv_mst = VOP_REG(RK3368_WIN0_CBR_MST, 0xffffffff, 0),
+ .yrgb_vir = VOP_REG(RK3368_WIN0_VIR, 0x3fff, 0),
+ .uv_vir = VOP_REG(RK3368_WIN0_VIR, 0x3fff, 16),
+ .src_alpha_ctl = VOP_REG(RK3368_WIN0_SRC_ALPHA_CTRL, 0xff, 0),
+ .dst_alpha_ctl = VOP_REG(RK3368_WIN0_DST_ALPHA_CTRL, 0xff, 0),
+ .channel = VOP_REG(RK3368_WIN0_CTRL2, 0xff, 0),
+};
+
static const struct vop_win_phy rk3368_win23_data = {
.data_formats = formats_win_lite,
.nformats = ARRAY_SIZE(formats_win_lite),
@@ -566,9 +585,9 @@ static const struct vop_win_phy rk3368_win23_data = {
};
static const struct vop_win_data rk3368_vop_win_data[] = {
- { .base = 0x00, .phy = &rk3288_win01_data,
+ { .base = 0x00, .phy = &rk3368_win01_data,
.type = DRM_PLANE_TYPE_PRIMARY },
- { .base = 0x40, .phy = &rk3288_win01_data,
+ { .base = 0x40, .phy = &rk3368_win01_data,
.type = DRM_PLANE_TYPE_OVERLAY },
{ .base = 0x00, .phy = &rk3368_win23_data,
.type = DRM_PLANE_TYPE_OVERLAY },
@@ -679,7 +698,7 @@ static const struct vop_data rk3399_vop_big = {
};
static const struct vop_win_data rk3399_vop_lit_win_data[] = {
- { .base = 0x00, .phy = &rk3288_win01_data,
+ { .base = 0x00, .phy = &rk3368_win01_data,
.type = DRM_PLANE_TYPE_PRIMARY },
{ .base = 0x00, .phy = &rk3368_win23_data,
.type = DRM_PLANE_TYPE_CURSOR},
@@ -766,11 +785,11 @@ static const struct vop_intr rk3328_vop_intr = {
};
static const struct vop_win_data rk3328_vop_win_data[] = {
- { .base = 0xd0, .phy = &rk3288_win01_data,
+ { .base = 0xd0, .phy = &rk3368_win01_data,
.type = DRM_PLANE_TYPE_PRIMARY },
- { .base = 0x1d0, .phy = &rk3288_win01_data,
+ { .base = 0x1d0, .phy = &rk3368_win01_data,
.type = DRM_PLANE_TYPE_OVERLAY },
- { .base = 0x2d0, .phy = &rk3288_win01_data,
+ { .base = 0x2d0, .phy = &rk3368_win01_data,
.type = DRM_PLANE_TYPE_CURSOR },
};
--
2.20.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 3/3] drm/rockchip: Add reflection properties
2019-01-09 18:56 [PATCH 0/3] Support reflect-x/y on RK3328, RK3368, and RK3399 Ezequiel Garcia
2019-01-09 18:56 ` [PATCH 1/3] drm/rockchip: Fix typo in VOP macros argument Ezequiel Garcia
2019-01-09 18:56 ` [PATCH 2/3] drm/rockchip: Separate RK3288 from RK3368 win01 registers Ezequiel Garcia
@ 2019-01-09 18:56 ` Ezequiel Garcia
2019-01-10 23:55 ` [PATCH 0/3] Support reflect-x/y on RK3328, RK3368, and RK3399 Heiko Stuebner
3 siblings, 0 replies; 5+ messages in thread
From: Ezequiel Garcia @ 2019-01-09 18:56 UTC (permalink / raw)
To: dri-devel
Cc: Daniele Castagna, Tomasz Figa, linux-rockchip, Sean Paul,
Kristian H . Kristensen, kernel, Ezequiel Garcia
From: Daniele Castagna <dcastagna@chromium.org>
Add the KMS plane rotation property to the DRM rockchip driver,
for SoCs RK3328, RK3368 and RK3399.
RK3288 only supports rotation at the display level (i.e. CRTC),
but for now we are only interested in plane rotation.
This commit only adds support for the value of reflect-y
and reflect-x (i.e. mirroring).
Note that y-mirroring is not compatible with YUV.
The following modetest commands would test this feature,
where 30 is the plane ID, and 49 = rotate_0 + relect_y + reflect_x.
X mirror:
modetest -s 43@33:1920x1080@XR24 -w 30:rotation:17
Y mirror:
modetest -s 43@33:1920x1080@XR24 -w 30:rotation:33
XY mirror:
modetest -s 43@33:1920x1080@XR24 -w 30:rotation:49
Signed-off-by: Daniele Castagna <dcastagna@chromium.org>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 33 +++++++++++++++++++++
drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 2 ++
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 3 ++
3 files changed, 38 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index fe800f784c18..5185a31318f5 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -88,6 +88,9 @@
#define VOP_WIN_GET(vop, win, name) \
vop_read_reg(vop, win->offset, win->phy->name)
+#define VOP_WIN_HAS_REG(win, name) \
+ !!(win->phy->name.mask)
+
#define VOP_WIN_GET_YRGBADDR(vop, win) \
vop_readl(vop, win->base + win->phy->yrgb_mst.offset)
@@ -711,6 +714,11 @@ static int vop_plane_atomic_check(struct drm_plane *plane,
return -EINVAL;
}
+ if (fb->format->is_yuv && state->rotation & DRM_MODE_REFLECT_Y) {
+ DRM_ERROR("Invalid Source: Yuv format does not support this rotation\n");
+ return -EINVAL;
+ }
+
return 0;
}
@@ -789,6 +797,13 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
offset += (src->y1 >> 16) * fb->pitches[0];
dma_addr = rk_obj->dma_addr + offset + fb->offsets[0];
+ /*
+ * For y-mirroring we need to move address
+ * to the beginning of the last line.
+ */
+ if (state->rotation & DRM_MODE_REFLECT_Y)
+ dma_addr += (actual_h - 1) * fb->pitches[0];
+
format = vop_convert_format(fb->format->format);
spin_lock(&vop->reg_lock);
@@ -797,6 +812,10 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
VOP_WIN_SET(vop, win, yrgb_vir, DIV_ROUND_UP(fb->pitches[0], 4));
VOP_WIN_SET(vop, win, yrgb_mst, dma_addr);
VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, y2r_en, is_yuv);
+ VOP_WIN_SET(vop, win, y_mir_en,
+ (state->rotation & DRM_MODE_REFLECT_Y) ? 1 : 0);
+ VOP_WIN_SET(vop, win, x_mir_en,
+ (state->rotation & DRM_MODE_REFLECT_X) ? 1 : 0);
if (is_yuv) {
int hsub = drm_format_horz_chroma_subsampling(fb->format->format);
@@ -1311,6 +1330,18 @@ static irqreturn_t vop_isr(int irq, void *data)
return ret;
}
+static void vop_plane_add_properties(struct drm_plane *plane,
+ const struct vop_win_data *win_data)
+{
+ unsigned int flags = 0;
+
+ flags |= VOP_WIN_HAS_REG(win_data, x_mir_en) ? DRM_MODE_REFLECT_X : 0;
+ flags |= VOP_WIN_HAS_REG(win_data, y_mir_en) ? DRM_MODE_REFLECT_Y : 0;
+ if (flags)
+ drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0,
+ DRM_MODE_ROTATE_0 | flags);
+}
+
static int vop_create_crtc(struct vop *vop)
{
const struct vop_data *vop_data = vop->data;
@@ -1348,6 +1379,7 @@ static int vop_create_crtc(struct vop *vop)
plane = &vop_win->base;
drm_plane_helper_add(plane, &plane_helper_funcs);
+ vop_plane_add_properties(plane, win_data);
if (plane->type == DRM_PLANE_TYPE_PRIMARY)
primary = plane;
else if (plane->type == DRM_PLANE_TYPE_CURSOR)
@@ -1385,6 +1417,7 @@ static int vop_create_crtc(struct vop *vop)
goto err_cleanup_crtc;
}
drm_plane_helper_add(&vop_win->base, &plane_helper_funcs);
+ vop_plane_add_properties(&vop_win->base, win_data);
}
port = of_get_child_by_name(dev->of_node, "port");
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index aed467cd81b9..04ed401d2325 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -146,6 +146,8 @@ struct vop_win_phy {
struct vop_reg uv_mst;
struct vop_reg yrgb_vir;
struct vop_reg uv_vir;
+ struct vop_reg y_mir_en;
+ struct vop_reg x_mir_en;
struct vop_reg dst_alpha_ctl;
struct vop_reg src_alpha_ctl;
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index 4f7000b5f9ed..204d861b8f35 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -557,6 +557,8 @@ static const struct vop_win_phy rk3368_win01_data = {
.enable = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 0),
.format = VOP_REG(RK3368_WIN0_CTRL0, 0x7, 1),
.rb_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 12),
+ .x_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 21),
+ .y_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 22),
.act_info = VOP_REG(RK3368_WIN0_ACT_INFO, 0x1fff1fff, 0),
.dsp_info = VOP_REG(RK3368_WIN0_DSP_INFO, 0x0fff0fff, 0),
.dsp_st = VOP_REG(RK3368_WIN0_DSP_ST, 0x1fff1fff, 0),
@@ -576,6 +578,7 @@ static const struct vop_win_phy rk3368_win23_data = {
.enable = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 4),
.format = VOP_REG(RK3368_WIN2_CTRL0, 0x3, 5),
.rb_swap = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 20),
+ .y_mir_en = VOP_REG(RK3368_WIN2_CTRL1, 0x1, 15),
.dsp_info = VOP_REG(RK3368_WIN2_DSP_INFO0, 0x0fff0fff, 0),
.dsp_st = VOP_REG(RK3368_WIN2_DSP_ST0, 0x1fff1fff, 0),
.yrgb_mst = VOP_REG(RK3368_WIN2_MST0, 0xffffffff, 0),
--
2.20.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 0/3] Support reflect-x/y on RK3328, RK3368, and RK3399
2019-01-09 18:56 [PATCH 0/3] Support reflect-x/y on RK3328, RK3368, and RK3399 Ezequiel Garcia
` (2 preceding siblings ...)
2019-01-09 18:56 ` [PATCH 3/3] drm/rockchip: Add reflection properties Ezequiel Garcia
@ 2019-01-10 23:55 ` Heiko Stuebner
3 siblings, 0 replies; 5+ messages in thread
From: Heiko Stuebner @ 2019-01-10 23:55 UTC (permalink / raw)
To: Ezequiel Garcia
Cc: Daniele Castagna, dri-devel, Tomasz Figa, linux-rockchip,
Sean Paul, Kristian H . Kristensen, kernel
Am Mittwoch, 9. Januar 2019, 19:56:36 CET schrieb Ezequiel Garcia:
> Here's a small series supporting plane reflection (aka. mirroring)
> properties on RK3328, RK3368, and RK3399 SoCs.
>
> Note that RK3288 specification doesn't seem to document registers
> for plane mirroring, but instead it only seems to support mirroring
> at the display (CRTC) level.
>
> A small typo cleanup patch is included, in patch 1. Not related
> to the rotation stuff.
>
> In order to support this feature, patch 2 separates the register
> set for win0 and win1.
>
> Once that's done, patch 3 creates the properties, if supported
> by each plane/SoC.
>
> The following modetest commands would test this feature,
> where 30 is the plane ID, and 49 = rotate_0 + relect_y + reflect_x.
>
> X mirror:
> modetest -s 43@33:1920x1080@XR24 -w 30:rotation:17
>
> Y mirror:
> modetest -s 43@33:1920x1080@XR24 -w 30:rotation:33
>
> XY mirror:
> modetest -s 43@33:1920x1080@XR24 -w 30:rotation:49
>
> This work has been originally by Daniele. I just cleaned
> up the implementation a it, and ported the code to upstream.
>
> This series is based on drm-misc-next plus https://patchwork.kernel.org/patch/10752893/.
applied all 3 to drm-misc-next
Thanks a lot for also catching that register issue.
Heiko
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^ permalink raw reply [flat|nested] 5+ messages in thread