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From: Alexander Varnin <fenixk19@mail.ru>
To: linux-samsung-soc@vger.kernel.org
Cc: Alexander Varnin <fenixk19@mail.ru>, Kukjin Kim <kgene.kim@samsung.com>
Subject: [PATCH] ARM: S3C2443: SPI clock channel setup is fixed
Date: Tue, 20 Nov 2012 01:55:10 +0400	[thread overview]
Message-ID: <50AAAABE.8090607@mail.ru> (raw)

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Actually, SPI channel 0 on 2443 is mapped to HS SPI controller,
and to enable s3c2410-spi controller, we should power on channel
1 in PCLKCON. There is no channel 0 SPI on s3c2443, so delete its
clock.

Signed-off-by: Alexander Varnin <fenixk19@mail.ru>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm/mach-s3c24xx/clock-s3c2443.c |    6 ------
 1 files changed, 0 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-s3c24xx/clock-s3c2443.c
b/arch/arm/mach-s3c24xx/clock-s3c2443.c
index 7f689ce..bdaba59 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2443.c
@@ -158,12 +158,6 @@ static struct clk init_clocks_off[] = {
 		.devname	= "s3c2410-spi.0",
 		.parent		= &clk_p,
 		.enable		= s3c2443_clkcon_enable_p,
-		.ctrlbit	= S3C2443_PCLKCON_SPI0,
-	}, {
-		.name		= "spi",
-		.devname	= "s3c2410-spi.1",
-		.parent		= &clk_p,
-		.enable		= s3c2443_clkcon_enable_p,
 		.ctrlbit	= S3C2443_PCLKCON_SPI1,
 	}
 };
-- 
1.7.2.5

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             reply	other threads:[~2012-11-19 21:56 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-11-19 21:55 Alexander Varnin [this message]
2012-11-20 11:46 ` [PATCH] ARM: S3C2443: SPI clock channel setup is fixed Kukjin Kim
2012-11-22  7:57   ` Alexander Varnin
2012-11-22  8:22     ` Kukjin Kim
2012-11-22  8:29       ` Alexander Varnin
  -- strict thread matches above, loose matches on Subject: below --
2012-11-19 14:33 Alexander Varnin
2012-11-19 21:32 ` Heiko Stübner

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