Re: [PATCH 0/5] mpi3mr: Add support for Broadcom SAS5116 IO/RAID controllers

Re: [PATCH 0/5] mpi3mr: Add support for Broadcom SAS5116 IO/RAID controllers

[Sumit Saxena]

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On Thu, Nov 23, 2023 at 9:14 PM Sumit Saxena <sumit.saxena@broadcom.com> wrote:
>
> These patches add support for Broadcom's SAS5116 IO/RAID controllers
> in mpi3mr driver.
>
Please ignore this email. Copy/Paste error leads to sending with the
wrong email id of Martin.
Apologies for the spamming.

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[PATCH 0/5] mpi3mr: Add support for Broadcom SAS5116 IO/RAID controllers

[Sumit Saxena]

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These patches add support for Broadcom's SAS5116 IO/RAID controllers
in mpi3mr driver. 

Sumit Saxena (5):
  mpi3mr: Add support for SAS5116 PCI IDs
  mpi3mr: Add PCI checks where SAS5116 diverges from SAS4116
  mpi3mr: Increase maximum number of PHYs to 64 from 32
  mpi3mr: Add support for status reply descriptor
  mpi3mr: driver version upgrade to 8.5.0.0.50

 drivers/scsi/mpi3mr/mpi/mpi30_ioc.h    |  1 +
 drivers/scsi/mpi3mr/mpi3mr.h           |  6 +++---
 drivers/scsi/mpi3mr/mpi3mr_fw.c        |  6 +++++-
 drivers/scsi/mpi3mr/mpi3mr_os.c        | 13 ++++++++++++-
 drivers/scsi/mpi3mr/mpi3mr_transport.c | 16 ++++++++--------
 5 files changed, 29 insertions(+), 13 deletions(-)

-- 
2.18.1


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[PATCH 0/5] mpi3mr: Add support for Broadcom SAS5116 IO/RAID controllers

[Sumit Saxena]

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These patches add support for Broadcom's SAS5116 IO/RAID controllers
in mpi3mr driver. 

Sumit Saxena (5):
  mpi3mr: Add support for SAS5116 PCI IDs
  mpi3mr: Add PCI checks where SAS5116 diverges from SAS4116
  mpi3mr: Increase maximum number of PHYs to 64 from 32
  mpi3mr: Add support for status reply descriptor
  mpi3mr: driver version upgrade to 8.5.0.0.50

 drivers/scsi/mpi3mr/mpi/mpi30_ioc.h    |  1 +
 drivers/scsi/mpi3mr/mpi3mr.h           |  6 +++---
 drivers/scsi/mpi3mr/mpi3mr_fw.c        |  6 +++++-
 drivers/scsi/mpi3mr/mpi3mr_os.c        | 13 ++++++++++++-
 drivers/scsi/mpi3mr/mpi3mr_transport.c | 16 ++++++++--------
 5 files changed, 29 insertions(+), 13 deletions(-)

-- 
2.18.1


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[PATCH 1/5] mpi3mr: Add support for SAS5116 PCI IDs

[Sumit Saxena]

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Add support for Broadcom's SAS5116 IO/RAID controllers PCI IDs.

Signed-off-by: Sumit Saxena <sumit.saxena@broadcom.com>
---
 drivers/scsi/mpi3mr/mpi3mr_os.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/scsi/mpi3mr/mpi3mr_os.c b/drivers/scsi/mpi3mr/mpi3mr_os.c
index 040031eb0c12..a8d7dbf0159a 100644
--- a/drivers/scsi/mpi3mr/mpi3mr_os.c
+++ b/drivers/scsi/mpi3mr/mpi3mr_os.c
@@ -5430,6 +5430,14 @@ static const struct pci_device_id mpi3mr_pci_id_table[] = {
 		PCI_DEVICE_SUB(MPI3_MFGPAGE_VENDORID_BROADCOM,
 		    MPI3_MFGPAGE_DEVID_SAS4116, PCI_ANY_ID, PCI_ANY_ID)
 	},
+	{
+		PCI_DEVICE_SUB(MPI3_MFGPAGE_VENDORID_BROADCOM,
+		    MPI3_MFGPAGE_DEVID_SAS5116_MPI, PCI_ANY_ID, PCI_ANY_ID)
+	},
+	{
+		PCI_DEVICE_SUB(MPI3_MFGPAGE_VENDORID_BROADCOM,
+		    MPI3_MFGPAGE_DEVID_SAS5116_MPI_MGMT, PCI_ANY_ID, PCI_ANY_ID)
+	},
 	{ 0 }
 };
 MODULE_DEVICE_TABLE(pci, mpi3mr_pci_id_table);
-- 
2.18.1


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[PATCH 2/5] mpi3mr: Add PCI checks where SAS5116 diverges from SAS4116

[Sumit Saxena]

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Added PCI IDs checks for the cases where SAS5116 diverges from
SAS4116 in behavior.

Signed-off-by: Sumit Saxena <sumit.saxena@broadcom.com>
---
 drivers/scsi/mpi3mr/mpi3mr_fw.c | 3 ++-
 drivers/scsi/mpi3mr/mpi3mr_os.c | 5 ++++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/scsi/mpi3mr/mpi3mr_fw.c b/drivers/scsi/mpi3mr/mpi3mr_fw.c
index f039f1d98647..0d148c39ebcc 100644
--- a/drivers/scsi/mpi3mr/mpi3mr_fw.c
+++ b/drivers/scsi/mpi3mr/mpi3mr_fw.c
@@ -1892,7 +1892,8 @@ static int mpi3mr_create_op_reply_q(struct mpi3mr_ioc *mrioc, u16 qidx)
 
 	reply_qid = qidx + 1;
 	op_reply_q->num_replies = MPI3MR_OP_REP_Q_QD;
-	if (!mrioc->pdev->revision)
+	if ((mrioc->pdev->device == MPI3_MFGPAGE_DEVID_SAS4116) &&
+		!mrioc->pdev->revision)
 		op_reply_q->num_replies = MPI3MR_OP_REP_Q_QD4K;
 	op_reply_q->ci = 0;
 	op_reply_q->ephase = 1;
diff --git a/drivers/scsi/mpi3mr/mpi3mr_os.c b/drivers/scsi/mpi3mr/mpi3mr_os.c
index a8d7dbf0159a..91a22e6e5c3f 100644
--- a/drivers/scsi/mpi3mr/mpi3mr_os.c
+++ b/drivers/scsi/mpi3mr/mpi3mr_os.c
@@ -5101,7 +5101,10 @@ mpi3mr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 		mpi3mr_init_drv_cmd(&mrioc->evtack_cmds[i],
 				    MPI3MR_HOSTTAG_EVTACKCMD_MIN + i);
 
-	if (pdev->revision)
+	if ((pdev->device == MPI3_MFGPAGE_DEVID_SAS4116) &&
+		!pdev->revision)
+		mrioc->enable_segqueue = false;
+	else
 		mrioc->enable_segqueue = true;
 
 	init_waitqueue_head(&mrioc->reset_waitq);
-- 
2.18.1


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[PATCH 3/5] mpi3mr: Increase maximum number of PHYs to 64 from 32

[Sumit Saxena]

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SAS5116 controllers supports maximum 48 physical PHYs.
Driver is modified to accommodate up to 64 PHYs(though
current need is to support 48 PHYs).

Signed-off-by: Sumit Saxena <sumit.saxena@broadcom.com>
---
 drivers/scsi/mpi3mr/mpi3mr.h           |  2 +-
 drivers/scsi/mpi3mr/mpi3mr_transport.c | 16 ++++++++--------
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/scsi/mpi3mr/mpi3mr.h b/drivers/scsi/mpi3mr/mpi3mr.h
index ae98d15c30b1..7658e8aaadbe 100644
--- a/drivers/scsi/mpi3mr/mpi3mr.h
+++ b/drivers/scsi/mpi3mr/mpi3mr.h
@@ -506,7 +506,7 @@ struct mpi3mr_sas_port {
 	u8 num_phys;
 	u8 marked_responding;
 	int lowest_phy;
-	u32 phy_mask;
+	u64 phy_mask;
 	struct mpi3mr_hba_port *hba_port;
 	struct sas_identify remote_identify;
 	struct sas_rphy *rphy;
diff --git a/drivers/scsi/mpi3mr/mpi3mr_transport.c b/drivers/scsi/mpi3mr/mpi3mr_transport.c
index 82b55e955730..c0c8ab586957 100644
--- a/drivers/scsi/mpi3mr/mpi3mr_transport.c
+++ b/drivers/scsi/mpi3mr/mpi3mr_transport.c
@@ -1587,7 +1587,7 @@ static void mpi3mr_sas_port_remove(struct mpi3mr_ioc *mrioc, u64 sas_address,
  */
 struct host_port {
 	u64	sas_address;
-	u32	phy_mask;
+	u64	phy_mask;
 	u16	handle;
 	u8	iounit_port_id;
 	u8	used;
@@ -1611,7 +1611,7 @@ mpi3mr_update_mr_sas_port(struct mpi3mr_ioc *mrioc, struct host_port *h_port,
 	struct mpi3mr_sas_port *mr_sas_port)
 {
 	struct mpi3mr_sas_phy *mr_sas_phy;
-	u32 phy_mask_xor;
+	u64 phy_mask_xor;
 	u64 phys_to_be_added, phys_to_be_removed;
 	int i;
 
@@ -1619,7 +1619,7 @@ mpi3mr_update_mr_sas_port(struct mpi3mr_ioc *mrioc, struct host_port *h_port,
 	mr_sas_port->marked_responding = 1;
 
 	dev_info(&mr_sas_port->port->dev,
-	    "sas_address(0x%016llx), old: port_id %d phy_mask 0x%x, new: port_id %d phy_mask:0x%x\n",
+	    "sas_address(0x%016llx), old: port_id %d phy_mask 0x%llx, new: port_id %d phy_mask:0x%llx\n",
 	    mr_sas_port->remote_identify.sas_address,
 	    mr_sas_port->hba_port->port_id, mr_sas_port->phy_mask,
 	    h_port->iounit_port_id, h_port->phy_mask);
@@ -1637,7 +1637,7 @@ mpi3mr_update_mr_sas_port(struct mpi3mr_ioc *mrioc, struct host_port *h_port,
 	 * if these phys are previously registered with another port
 	 * then delete these phys from that port first.
 	 */
-	for_each_set_bit(i, (ulong *) &phys_to_be_added, BITS_PER_TYPE(u32)) {
+	for_each_set_bit(i, (ulong *) &phys_to_be_added, BITS_PER_TYPE(u64)) {
 		mr_sas_phy = &mrioc->sas_hba.phy[i];
 		if (mr_sas_phy->phy_belongs_to_port)
 			mpi3mr_del_phy_from_an_existing_port(mrioc,
@@ -1649,7 +1649,7 @@ mpi3mr_update_mr_sas_port(struct mpi3mr_ioc *mrioc, struct host_port *h_port,
 	}
 
 	/* Delete the phys which are not part of current mr_sas_port's port. */
-	for_each_set_bit(i, (ulong *) &phys_to_be_removed, BITS_PER_TYPE(u32)) {
+	for_each_set_bit(i, (ulong *) &phys_to_be_removed, BITS_PER_TYPE(u64)) {
 		mr_sas_phy = &mrioc->sas_hba.phy[i];
 		if (mr_sas_phy->phy_belongs_to_port)
 			mpi3mr_del_phy_from_an_existing_port(mrioc,
@@ -1671,7 +1671,7 @@ mpi3mr_update_mr_sas_port(struct mpi3mr_ioc *mrioc, struct host_port *h_port,
 void
 mpi3mr_refresh_sas_ports(struct mpi3mr_ioc *mrioc)
 {
-	struct host_port h_port[32];
+	struct host_port h_port[64];
 	int i, j, found, host_port_count = 0, port_idx;
 	u16 sz, attached_handle, ioc_status;
 	struct mpi3_sas_io_unit_page0 *sas_io_unit_pg0 = NULL;
@@ -1742,7 +1742,7 @@ mpi3mr_refresh_sas_ports(struct mpi3mr_ioc *mrioc)
 		list_for_each_entry(mr_sas_port, &mrioc->sas_hba.sas_port_list,
 		    port_list) {
 			ioc_info(mrioc,
-			    "port_id:%d, sas_address:(0x%016llx), phy_mask:(0x%x), lowest phy id:%d\n",
+			    "port_id:%d, sas_address:(0x%016llx), phy_mask:(0x%llx), lowest phy id:%d\n",
 			    mr_sas_port->hba_port->port_id,
 			    mr_sas_port->remote_identify.sas_address,
 			    mr_sas_port->phy_mask, mr_sas_port->lowest_phy);
@@ -1751,7 +1751,7 @@ mpi3mr_refresh_sas_ports(struct mpi3mr_ioc *mrioc)
 		ioc_info(mrioc, "Host port details after reset\n");
 		for (i = 0; i < host_port_count; i++) {
 			ioc_info(mrioc,
-			    "port_id:%d, sas_address:(0x%016llx), phy_mask:(0x%x), lowest phy id:%d\n",
+			    "port_id:%d, sas_address:(0x%016llx), phy_mask:(0x%llx), lowest phy id:%d\n",
 			    h_port[i].iounit_port_id, h_port[i].sas_address,
 			    h_port[i].phy_mask, h_port[i].lowest_phy);
 		}
-- 
2.18.1


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[PATCH 4/5] mpi3mr: Add support for status reply descriptor

[Sumit Saxena]

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Inform controller firmware that driver supports status reply descriptor.

Signed-off-by: Sumit Saxena <sumit.saxena@broadcom.com>
---
 drivers/scsi/mpi3mr/mpi/mpi30_ioc.h | 1 +
 drivers/scsi/mpi3mr/mpi3mr_fw.c     | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/drivers/scsi/mpi3mr/mpi/mpi30_ioc.h b/drivers/scsi/mpi3mr/mpi/mpi30_ioc.h
index 1e4a60fc655f..0cb24fc03620 100644
--- a/drivers/scsi/mpi3mr/mpi/mpi30_ioc.h
+++ b/drivers/scsi/mpi3mr/mpi/mpi30_ioc.h
@@ -28,6 +28,7 @@ struct mpi3_ioc_init_request {
 	__le64                   driver_information_address;
 };
 
+#define MPI3_IOCINIT_MSGFLAGS_SCSIIOSTATUSREPLY_SUPPORTED	(0x04)
 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_MASK          (0x03)
 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_NOT_USED      (0x00)
 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_SEPARATED     (0x01)
diff --git a/drivers/scsi/mpi3mr/mpi3mr_fw.c b/drivers/scsi/mpi3mr/mpi3mr_fw.c
index 0d148c39ebcc..1ad2f88e0528 100644
--- a/drivers/scsi/mpi3mr/mpi3mr_fw.c
+++ b/drivers/scsi/mpi3mr/mpi3mr_fw.c
@@ -3194,6 +3194,9 @@ static int mpi3mr_issue_iocinit(struct mpi3mr_ioc *mrioc)
 	current_time = ktime_get_real();
 	iocinit_req.time_stamp = cpu_to_le64(ktime_to_ms(current_time));
 
+	iocinit_req.msg_flags |=
+	    MPI3_IOCINIT_MSGFLAGS_SCSIIOSTATUSREPLY_SUPPORTED;
+
 	init_completion(&mrioc->init_cmds.done);
 	retval = mpi3mr_admin_request_post(mrioc, &iocinit_req,
 	    sizeof(iocinit_req), 1);
-- 
2.18.1


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[PATCH 5/5] mpi3mr: driver version upgrade to 8.5.0.0.50

[Sumit Saxena]

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Update driver version to 8.5.0.0.50.

Signed-off-by: Sumit Saxena <sumit.saxena@broadcom.com>
---
 drivers/scsi/mpi3mr/mpi3mr.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/scsi/mpi3mr/mpi3mr.h b/drivers/scsi/mpi3mr/mpi3mr.h
index 7658e8aaadbe..4f49f8396309 100644
--- a/drivers/scsi/mpi3mr/mpi3mr.h
+++ b/drivers/scsi/mpi3mr/mpi3mr.h
@@ -55,8 +55,8 @@ extern struct list_head mrioc_list;
 extern int prot_mask;
 extern atomic64_t event_counter;
 
-#define MPI3MR_DRIVER_VERSION	"8.5.0.0.0"
-#define MPI3MR_DRIVER_RELDATE	"24-July-2023"
+#define MPI3MR_DRIVER_VERSION	"8.5.0.0.50"
+#define MPI3MR_DRIVER_RELDATE	"22-November-2023"
 
 #define MPI3MR_DRIVER_NAME	"mpi3mr"
 #define MPI3MR_DRIVER_LICENSE	"GPL"
-- 
2.18.1


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Re: [PATCH 3/5] mpi3mr: Increase maximum number of PHYs to 64 from 32

[kernel test robot]

Hi Sumit,

kernel test robot noticed the following build warnings:

[auto build test WARNING on mkp-scsi/for-next]
[also build test WARNING on jejb-scsi/for-next linus/master v6.7-rc2 next-20231124]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Sumit-Saxena/mpi3mr-Add-support-for-SAS5116-PCI-IDs/20231124-004432
base:   https://git.kernel.org/pub/scm/linux/kernel/git/mkp/scsi.git for-next
patch link:    https://lore.kernel.org/r/20231123160132.4155-4-sumit.saxena%40broadcom.com
patch subject: [PATCH 3/5] mpi3mr: Increase maximum number of PHYs to 64 from 32
config: i386-allmodconfig (https://download.01.org/0day-ci/archive/20231124/202311241311.O66vDF3e-lkp@intel.com/config)
compiler: clang version 16.0.4 (https://github.com/llvm/llvm-project.git ae42196bc493ffe877a7e3dff8be32035dea4d07)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231124/202311241311.O66vDF3e-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202311241311.O66vDF3e-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/scsi/mpi3mr/mpi3mr_transport.c:1672:1: warning: stack frame size (1656) exceeds limit (1024) in 'mpi3mr_refresh_sas_ports' [-Wframe-larger-than]
   mpi3mr_refresh_sas_ports(struct mpi3mr_ioc *mrioc)
   ^
   40/1656 (2.42%) spills, 1616/1656 (97.58%) variables
   1 warning generated.


vim +/mpi3mr_refresh_sas_ports +1672 drivers/scsi/mpi3mr/mpi3mr_transport.c

2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1659  
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1660  /**
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1661   * mpi3mr_refresh_sas_ports - update host's sas ports during reset
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1662   * @mrioc: Adapter instance reference
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1663   *
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1664   * Update the host's sas ports during reset by checking whether
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1665   * sas ports are still intact or not. Add/remove phys if any hba
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1666   * phys are (moved in)/(moved out) of sas port. Also update
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1667   * io_unit_port if it got changed during reset.
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1668   *
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1669   * Return: Nothing.
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1670   */
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1671  void
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04 @1672  mpi3mr_refresh_sas_ports(struct mpi3mr_ioc *mrioc)
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1673  {
6c7de6be82cd88 Sumit Saxena    2023-11-23  1674  	struct host_port h_port[64];
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1675  	int i, j, found, host_port_count = 0, port_idx;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1676  	u16 sz, attached_handle, ioc_status;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1677  	struct mpi3_sas_io_unit_page0 *sas_io_unit_pg0 = NULL;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1678  	struct mpi3_device_page0 dev_pg0;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1679  	struct mpi3_device0_sas_sata_format *sasinf;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1680  	struct mpi3mr_sas_port *mr_sas_port;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1681  
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1682  	sz = offsetof(struct mpi3_sas_io_unit_page0, phy_data) +
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1683  		(mrioc->sas_hba.num_phys *
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1684  		 sizeof(struct mpi3_sas_io_unit0_phy_data));
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1685  	sas_io_unit_pg0 = kzalloc(sz, GFP_KERNEL);
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1686  	if (!sas_io_unit_pg0)
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1687  		return;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1688  	if (mpi3mr_cfg_get_sas_io_unit_pg0(mrioc, sas_io_unit_pg0, sz)) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1689  		ioc_err(mrioc, "failure at %s:%d/%s()!\n",
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1690  		    __FILE__, __LINE__, __func__);
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1691  		goto out;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1692  	}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1693  
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1694  	/* Create a new expander port table */
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1695  	for (i = 0; i < mrioc->sas_hba.num_phys; i++) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1696  		attached_handle = le16_to_cpu(
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1697  		    sas_io_unit_pg0->phy_data[i].attached_dev_handle);
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1698  		if (!attached_handle)
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1699  			continue;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1700  		found = 0;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1701  		for (j = 0; j < host_port_count; j++) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1702  			if (h_port[j].handle == attached_handle) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1703  				h_port[j].phy_mask |= (1 << i);
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1704  				found = 1;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1705  				break;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1706  			}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1707  		}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1708  		if (found)
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1709  			continue;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1710  		if ((mpi3mr_cfg_get_dev_pg0(mrioc, &ioc_status, &dev_pg0,
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1711  		    sizeof(dev_pg0), MPI3_DEVICE_PGAD_FORM_HANDLE,
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1712  		    attached_handle))) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1713  			dprint_reset(mrioc,
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1714  			    "failed to read dev_pg0 for handle(0x%04x) at %s:%d/%s()!\n",
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1715  			    attached_handle, __FILE__, __LINE__, __func__);
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1716  			continue;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1717  		}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1718  		if (ioc_status != MPI3_IOCSTATUS_SUCCESS) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1719  			dprint_reset(mrioc,
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1720  			    "ioc_status(0x%x) while reading dev_pg0 for handle(0x%04x) at %s:%d/%s()!\n",
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1721  			    ioc_status, attached_handle,
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1722  			    __FILE__, __LINE__, __func__);
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1723  			continue;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1724  		}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1725  		sasinf = &dev_pg0.device_specific.sas_sata_format;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1726  
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1727  		port_idx = host_port_count;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1728  		h_port[port_idx].sas_address = le64_to_cpu(sasinf->sas_address);
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1729  		h_port[port_idx].handle = attached_handle;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1730  		h_port[port_idx].phy_mask = (1 << i);
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1731  		h_port[port_idx].iounit_port_id = sas_io_unit_pg0->phy_data[i].io_unit_port;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1732  		h_port[port_idx].lowest_phy = sasinf->phy_num;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1733  		h_port[port_idx].used = 0;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1734  		host_port_count++;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1735  	}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1736  
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1737  	if (!host_port_count)
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1738  		goto out;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1739  
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1740  	if (mrioc->logging_level & MPI3_DEBUG_RESET) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1741  		ioc_info(mrioc, "Host port details before reset\n");
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1742  		list_for_each_entry(mr_sas_port, &mrioc->sas_hba.sas_port_list,
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1743  		    port_list) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1744  			ioc_info(mrioc,
6c7de6be82cd88 Sumit Saxena    2023-11-23  1745  			    "port_id:%d, sas_address:(0x%016llx), phy_mask:(0x%llx), lowest phy id:%d\n",
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1746  			    mr_sas_port->hba_port->port_id,
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1747  			    mr_sas_port->remote_identify.sas_address,
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1748  			    mr_sas_port->phy_mask, mr_sas_port->lowest_phy);
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1749  		}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1750  		mr_sas_port = NULL;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1751  		ioc_info(mrioc, "Host port details after reset\n");
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1752  		for (i = 0; i < host_port_count; i++) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1753  			ioc_info(mrioc,
6c7de6be82cd88 Sumit Saxena    2023-11-23  1754  			    "port_id:%d, sas_address:(0x%016llx), phy_mask:(0x%llx), lowest phy id:%d\n",
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1755  			    h_port[i].iounit_port_id, h_port[i].sas_address,
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1756  			    h_port[i].phy_mask, h_port[i].lowest_phy);
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1757  		}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1758  	}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1759  
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1760  	/* mark all host sas port entries as dirty */
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1761  	list_for_each_entry(mr_sas_port, &mrioc->sas_hba.sas_port_list,
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1762  	    port_list) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1763  		mr_sas_port->marked_responding = 0;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1764  		mr_sas_port->hba_port->flags |= MPI3MR_HBA_PORT_FLAG_DIRTY;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1765  	}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1766  
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1767  	/* First check for matching lowest phy */
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1768  	for (i = 0; i < host_port_count; i++) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1769  		mr_sas_port = NULL;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1770  		list_for_each_entry(mr_sas_port, &mrioc->sas_hba.sas_port_list,
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1771  		    port_list) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1772  			if (mr_sas_port->marked_responding)
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1773  				continue;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1774  			if (h_port[i].sas_address != mr_sas_port->remote_identify.sas_address)
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1775  				continue;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1776  			if (h_port[i].lowest_phy == mr_sas_port->lowest_phy) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1777  				mpi3mr_update_mr_sas_port(mrioc, &h_port[i], mr_sas_port);
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1778  				break;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1779  			}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1780  		}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1781  	}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1782  
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1783  	/* In case if lowest phy is got enabled or disabled during reset */
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1784  	for (i = 0; i < host_port_count; i++) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1785  		if (h_port[i].used)
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1786  			continue;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1787  		mr_sas_port = NULL;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1788  		list_for_each_entry(mr_sas_port, &mrioc->sas_hba.sas_port_list,
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1789  		    port_list) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1790  			if (mr_sas_port->marked_responding)
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1791  				continue;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1792  			if (h_port[i].sas_address != mr_sas_port->remote_identify.sas_address)
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1793  				continue;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1794  			if (h_port[i].phy_mask & mr_sas_port->phy_mask) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1795  				mpi3mr_update_mr_sas_port(mrioc, &h_port[i], mr_sas_port);
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1796  				break;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1797  			}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1798  		}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1799  	}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1800  
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1801  	/* In case if expander cable is removed & connected to another HBA port during reset */
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1802  	for (i = 0; i < host_port_count; i++) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1803  		if (h_port[i].used)
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1804  			continue;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1805  		mr_sas_port = NULL;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1806  		list_for_each_entry(mr_sas_port, &mrioc->sas_hba.sas_port_list,
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1807  		    port_list) {
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1808  			if (mr_sas_port->marked_responding)
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1809  				continue;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1810  			if (h_port[i].sas_address != mr_sas_port->remote_identify.sas_address)
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1811  				continue;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1812  			mpi3mr_update_mr_sas_port(mrioc, &h_port[i], mr_sas_port);
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1813  			break;
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1814  		}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1815  	}
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1816  out:
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1817  	kfree(sas_io_unit_pg0);
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1818  }
2745ce0e6d30e6 Sreekanth Reddy 2022-08-04  1819  

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH 0/5] mpi3mr: Add support for Broadcom SAS5116 IO/RAID controllers

[Martin K. Petersen]

Sumit,

> These patches add support for Broadcom's SAS5116 IO/RAID controllers
> in mpi3mr driver. 

Applied to 6.8/scsi-staging, thanks!

-- 
Martin K. Petersen	Oracle Linux Engineering

Re: [PATCH 0/5] mpi3mr: Add support for Broadcom SAS5116 IO/RAID controllers

[Martin K. Petersen]

On Thu, 23 Nov 2023 21:31:27 +0530, Sumit Saxena wrote:

> These patches add support for Broadcom's SAS5116 IO/RAID controllers
> in mpi3mr driver.
> 
> Sumit Saxena (5):
>   mpi3mr: Add support for SAS5116 PCI IDs
>   mpi3mr: Add PCI checks where SAS5116 diverges from SAS4116
>   mpi3mr: Increase maximum number of PHYs to 64 from 32
>   mpi3mr: Add support for status reply descriptor
>   mpi3mr: driver version upgrade to 8.5.0.0.50
> 
> [...]

Applied to 6.8/scsi-queue, thanks!

[1/5] mpi3mr: Add support for SAS5116 PCI IDs
      https://git.kernel.org/mkp/scsi/c/6fa21eab82be
[2/5] mpi3mr: Add PCI checks where SAS5116 diverges from SAS4116
      https://git.kernel.org/mkp/scsi/c/c9260ff28ee5
[3/5] mpi3mr: Increase maximum number of PHYs to 64 from 32
      https://git.kernel.org/mkp/scsi/c/cb5b60894602
[4/5] mpi3mr: Add support for status reply descriptor
      https://git.kernel.org/mkp/scsi/c/1193a89d2b6d
[5/5] mpi3mr: driver version upgrade to 8.5.0.0.50
      https://git.kernel.org/mkp/scsi/c/b4d94164ff32

-- 
Martin K. Petersen	Oracle Linux Engineering