[PATCH v3 0/8] Support Multi-frequency scale for UFS

[PATCH v3 0/8] Support Multi-frequency scale for UFS

[Ziqi Chen]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=y, Size: 3072 bytes --]

With OPP V2 enabled, devfreq can scale clocks amongst multiple frequency
plans. However, the gear speed is only toggled between min and max during
clock scaling. Enable multi-level gear scaling by mapping clock frequencies
to gear speeds, so that when devfreq scales clock frequencies we can put
the UFS link at the appropraite gear speeds accordingly.

This series has been tested on below platforms -
sm8550 mtp + UFS3.1
SM8650 MTP + UFS3.1
SM8750 MTP + UFS4.0

v1 -> v2:
1. Withdraw old patch 8/8 "ARM: dts: msm: Use Operation Points V2 for UFS on SM8650"
2. Add new patch 8/8 "ABI: sysfs-driver-ufs: Add missing UFS sysfs addributes"
3. Modify commit message for  "scsi: ufs: core: Pass target_freq to clk_scale_notify() vops" and "scsi: ufs: qcom: Pass target_freq to clk scale pre and post change"
4. In "scsi: ufs: qcom: Pass target_freq to clk scale pre and post change", use common Macro HZ_PER_MHZ in function ufs_qcom_set_core_clk_ctrl()
5. In "scsi: ufs: qcom: Implement the freq_to_gear_speed() vops", print out freq and gear info as debugging message
6. In "scsi: ufs: core: Enable multi-level gear scaling", rename the lable "do_pmc" to "config_pwr_mode"
7. In "scsi: ufs: core: Toggle Write Booster during clock", initialize the local variables "wb_en" as "false"

v2 -> v3:
1. Change 'vops' to 'vop' in all commit message
2. keep the indentation consistent for clk_scale_notify() definition.
3. In "scsi: ufs: core: Add a vop to map clock frequency to gear speed", "scsi: ufs: qcom: Implement the freq_to_gear_speed() vop"
   and "scsi: ufs: core: Enable multi-level gear scaling", remove the parameter 'gear' and use it as return result in function freq_to_gear_speed()
4. In "scsi: ufs: qcom: Implement the freq_to_gear_speed(), removed the variable 'ret' in function ufs_qcom_freq_to_gear_speed()
5. In "scsi: ufs: core: Enable multi-level gear scaling", use assignment instead memcpy() in function ufshcd_scale_gear()
6. Improve the grammar of attributes' descriptions in “ABI: sysfs-driver-ufs: Add missing UFS sysfs attributes”
7. Typo fixed for some commit messages.

Can Guo (6):
  scsi: ufs: core: Pass target_freq to clk_scale_notify() vop
  scsi: ufs: qcom: Pass target_freq to clk scale pre and post change
  scsi: ufs: core: Add a vop to map clock frequency to gear speed
  scsi: ufs: qcom: Implement the freq_to_gear_speed() vop
  scsi: ufs: core: Enable multi-level gear scaling
  scsi: ufs: core: Toggle Write Booster during clock scaling base on
    gear speed

Ziqi Chen (2):
  scsi: ufs: core: Check if scaling up is required when disable clkscale
  ABI: sysfs-driver-ufs: Add missing UFS sysfs attributes

 Documentation/ABI/testing/sysfs-driver-ufs | 33 ++++++++++
 drivers/ufs/core/ufshcd-priv.h             | 15 ++++-
 drivers/ufs/core/ufshcd.c                  | 76 +++++++++++++++++-----
 drivers/ufs/host/ufs-mediatek.c            |  1 +
 drivers/ufs/host/ufs-qcom.c                | 62 ++++++++++++++----
 include/ufs/ufshcd.h                       |  9 ++-
 6 files changed, 160 insertions(+), 36 deletions(-)

-- 
2.34.1

[PATCH v3 1/8] scsi: ufs: core: Pass target_freq to clk_scale_notify() vop

[Ziqi Chen]

From: Can Guo <quic_cang@quicinc.com>

Instead of only two frequencies, if OPP V2 is used, the UFS devfreq clock
scaling may scale the clock among multiple frequencies, so just passing
up/down to vop clk_scale_notify() is not enough to cover the intermediate
clock freqs between the min and max freqs. Hence pass the target_freq ,
which will be used in successive commits, to clk_scale_notify() to allow
the vop to perform corresponding configurations with regard to the clock
freqs.

Signed-off-by: Can Guo <quic_cang@quicinc.com>
Co-developed-by: Ziqi Chen <quic_ziqichen@quicinc.com>
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
---

v1 -> v2:
Modify commit message to make it more clear.

v2 -> v3:
1. Change 'vops' to 'vop' in commit message.
2. keep the indentation consistent for clk_scale_notify() definition.
---
 drivers/ufs/core/ufshcd-priv.h  | 7 ++++---
 drivers/ufs/core/ufshcd.c       | 4 ++--
 drivers/ufs/host/ufs-mediatek.c | 1 +
 drivers/ufs/host/ufs-qcom.c     | 5 +++--
 include/ufs/ufshcd.h            | 4 ++--
 5 files changed, 12 insertions(+), 9 deletions(-)

diff --git a/drivers/ufs/core/ufshcd-priv.h b/drivers/ufs/core/ufshcd-priv.h
index 9ffd94ddf8c7..0549b65f71ed 100644
--- a/drivers/ufs/core/ufshcd-priv.h
+++ b/drivers/ufs/core/ufshcd-priv.h
@@ -117,11 +117,12 @@ static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
 	return ufshcd_readl(hba, REG_UFS_VERSION);
 }
 
-static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
-			bool up, enum ufs_notify_change_status status)
+static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba, bool up,
+					       unsigned long target_freq,
+					       enum ufs_notify_change_status status)
 {
 	if (hba->vops && hba->vops->clk_scale_notify)
-		return hba->vops->clk_scale_notify(hba, up, status);
+		return hba->vops->clk_scale_notify(hba, up, target_freq, status);
 	return 0;
 }
 
diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
index acc3607bbd9c..8d295cc827cc 100644
--- a/drivers/ufs/core/ufshcd.c
+++ b/drivers/ufs/core/ufshcd.c
@@ -1157,7 +1157,7 @@ static int ufshcd_scale_clks(struct ufs_hba *hba, unsigned long freq,
 	int ret = 0;
 	ktime_t start = ktime_get();
 
-	ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
+	ret = ufshcd_vops_clk_scale_notify(hba, scale_up, freq, PRE_CHANGE);
 	if (ret)
 		goto out;
 
@@ -1168,7 +1168,7 @@ static int ufshcd_scale_clks(struct ufs_hba *hba, unsigned long freq,
 	if (ret)
 		goto out;
 
-	ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
+	ret = ufshcd_vops_clk_scale_notify(hba, scale_up, freq, POST_CHANGE);
 	if (ret) {
 		if (hba->use_pm_opp)
 			ufshcd_opp_set_rate(hba,
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 135cd78109e2..977dd0caaef6 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1643,6 +1643,7 @@ static void ufs_mtk_clk_scale(struct ufs_hba *hba, bool scale_up)
 }
 
 static int ufs_mtk_clk_scale_notify(struct ufs_hba *hba, bool scale_up,
+				    unsigned long target_freq,
 				    enum ufs_notify_change_status status)
 {
 	if (!ufshcd_is_clkscaling_supported(hba))
diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c
index 68040b2ab5f8..b6eef975dc46 100644
--- a/drivers/ufs/host/ufs-qcom.c
+++ b/drivers/ufs/host/ufs-qcom.c
@@ -1333,8 +1333,9 @@ static int ufs_qcom_clk_scale_down_post_change(struct ufs_hba *hba)
 	return ufs_qcom_set_core_clk_ctrl(hba, false);
 }
 
-static int ufs_qcom_clk_scale_notify(struct ufs_hba *hba,
-		bool scale_up, enum ufs_notify_change_status status)
+static int ufs_qcom_clk_scale_notify(struct ufs_hba *hba, bool scale_up,
+				     unsigned long target_freq,
+				     enum ufs_notify_change_status status)
 {
 	struct ufs_qcom_host *host = ufshcd_get_variant(hba);
 	int err;
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index d7aca9e61684..f51d425696e7 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -344,8 +344,8 @@ struct ufs_hba_variant_ops {
 	void    (*exit)(struct ufs_hba *);
 	u32	(*get_ufs_hci_version)(struct ufs_hba *);
 	int	(*set_dma_mask)(struct ufs_hba *);
-	int	(*clk_scale_notify)(struct ufs_hba *, bool,
-				    enum ufs_notify_change_status);
+	int (*clk_scale_notify)(struct ufs_hba *, bool, unsigned long,
+							enum ufs_notify_change_status);
 	int	(*setup_clocks)(struct ufs_hba *, bool,
 				enum ufs_notify_change_status);
 	int	(*hce_enable_notify)(struct ufs_hba *,
-- 
2.34.1

[PATCH v3 2/8] scsi: ufs: qcom: Pass target_freq to clk scale pre and post change

[Ziqi Chen]

From: Can Guo <quic_cang@quicinc.com>

Instead of only two frequencies, if OPP V2 is used, the UFS devfreq clock
scaling may scale the clock among multiple frequencies. In the case of
scaling up, the devfreq may decide to scale the clock to an intermediate
freq base on load, but the clock scale up pre change operation uses
settings for the max clock freq unconditionally. Fix it by passing the
target_freq to clock scale up pre change so that the correct settings for
the target_freq can be used.

In the case of scaling down, the clock scale down post change operation
is doing fine, because it reads the actual clock rate to tell freq, but to
keep symmetry with clock scale up pre change operation, just use the
target_freq instead of reading clock rate.

Signed-off-by: Can Guo <quic_cang@quicinc.com>
Co-developed-by: Ziqi Chen <quic_ziqichen@quicinc.com>
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
---

v1 -> v2:
1. Modify commit message to make it more clear.
2. Use common Macro HZ_PER_MHZ in function ufs_qcom_set_core_clk_ctrl().

v2 -> v3:
Commit message typo fixed.
---
 drivers/ufs/host/ufs-qcom.c | 26 ++++++++++++++------------
 1 file changed, 14 insertions(+), 12 deletions(-)

diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c
index b6eef975dc46..a1eb3cab45e4 100644
--- a/drivers/ufs/host/ufs-qcom.c
+++ b/drivers/ufs/host/ufs-qcom.c
@@ -15,6 +15,7 @@
 #include <linux/platform_device.h>
 #include <linux/reset-controller.h>
 #include <linux/time.h>
+#include <linux/units.h>
 
 #include <soc/qcom/ice.h>
 
@@ -97,7 +98,7 @@ static const struct __ufs_qcom_bw_table {
 };
 
 static void ufs_qcom_get_default_testbus_cfg(struct ufs_qcom_host *host);
-static int ufs_qcom_set_core_clk_ctrl(struct ufs_hba *hba, bool is_scale_up);
+static int ufs_qcom_set_core_clk_ctrl(struct ufs_hba *hba, unsigned long freq);
 
 static struct ufs_qcom_host *rcdev_to_ufs_host(struct reset_controller_dev *rcd)
 {
@@ -524,7 +525,7 @@ static int ufs_qcom_link_startup_notify(struct ufs_hba *hba,
 			return -EINVAL;
 		}
 
-		err = ufs_qcom_set_core_clk_ctrl(hba, true);
+		err = ufs_qcom_set_core_clk_ctrl(hba, ULONG_MAX);
 		if (err)
 			dev_err(hba->dev, "cfg core clk ctrl failed\n");
 		/*
@@ -1231,7 +1232,7 @@ static int ufs_qcom_set_clk_40ns_cycles(struct ufs_hba *hba,
 	return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_VS_CORE_CLK_40NS_CYCLES), reg);
 }
 
-static int ufs_qcom_set_core_clk_ctrl(struct ufs_hba *hba, bool is_scale_up)
+static int ufs_qcom_set_core_clk_ctrl(struct ufs_hba *hba, unsigned long freq)
 {
 	struct ufs_qcom_host *host = ufshcd_get_variant(hba);
 	struct list_head *head = &hba->clk_list_head;
@@ -1245,10 +1246,11 @@ static int ufs_qcom_set_core_clk_ctrl(struct ufs_hba *hba, bool is_scale_up)
 		    !strcmp(clki->name, "core_clk_unipro")) {
 			if (!clki->max_freq)
 				cycles_in_1us = 150; /* default for backwards compatibility */
-			else if (is_scale_up)
-				cycles_in_1us = ceil(clki->max_freq, (1000 * 1000));
+			else if (freq == ULONG_MAX)
+				cycles_in_1us = ceil(clki->max_freq, HZ_PER_MHZ);
 			else
-				cycles_in_1us = ceil(clk_get_rate(clki->clk), (1000 * 1000));
+				cycles_in_1us = ceil(freq, HZ_PER_MHZ);
+
 			break;
 		}
 	}
@@ -1285,7 +1287,7 @@ static int ufs_qcom_set_core_clk_ctrl(struct ufs_hba *hba, bool is_scale_up)
 	return ufs_qcom_set_clk_40ns_cycles(hba, cycles_in_1us);
 }
 
-static int ufs_qcom_clk_scale_up_pre_change(struct ufs_hba *hba)
+static int ufs_qcom_clk_scale_up_pre_change(struct ufs_hba *hba, unsigned long freq)
 {
 	struct ufs_qcom_host *host = ufshcd_get_variant(hba);
 	struct ufs_pa_layer_attr *attr = &host->dev_req_params;
@@ -1298,7 +1300,7 @@ static int ufs_qcom_clk_scale_up_pre_change(struct ufs_hba *hba)
 		return ret;
 	}
 	/* set unipro core clock attributes and clear clock divider */
-	return ufs_qcom_set_core_clk_ctrl(hba, true);
+	return ufs_qcom_set_core_clk_ctrl(hba, freq);
 }
 
 static int ufs_qcom_clk_scale_up_post_change(struct ufs_hba *hba)
@@ -1327,10 +1329,10 @@ static int ufs_qcom_clk_scale_down_pre_change(struct ufs_hba *hba)
 	return err;
 }
 
-static int ufs_qcom_clk_scale_down_post_change(struct ufs_hba *hba)
+static int ufs_qcom_clk_scale_down_post_change(struct ufs_hba *hba, unsigned long freq)
 {
 	/* set unipro core clock attributes and clear clock divider */
-	return ufs_qcom_set_core_clk_ctrl(hba, false);
+	return ufs_qcom_set_core_clk_ctrl(hba, freq);
 }
 
 static int ufs_qcom_clk_scale_notify(struct ufs_hba *hba, bool scale_up,
@@ -1349,7 +1351,7 @@ static int ufs_qcom_clk_scale_notify(struct ufs_hba *hba, bool scale_up,
 		if (err)
 			return err;
 		if (scale_up)
-			err = ufs_qcom_clk_scale_up_pre_change(hba);
+			err = ufs_qcom_clk_scale_up_pre_change(hba, target_freq);
 		else
 			err = ufs_qcom_clk_scale_down_pre_change(hba);
 
@@ -1361,7 +1363,7 @@ static int ufs_qcom_clk_scale_notify(struct ufs_hba *hba, bool scale_up,
 		if (scale_up)
 			err = ufs_qcom_clk_scale_up_post_change(hba);
 		else
-			err = ufs_qcom_clk_scale_down_post_change(hba);
+			err = ufs_qcom_clk_scale_down_post_change(hba, target_freq);
 
 
 		if (err) {
-- 
2.34.1

[PATCH v3 3/8] scsi: ufs: core: Add a vop to map clock frequency to gear speed

[Ziqi Chen]

From: Can Guo <quic_cang@quicinc.com>

Add a vop to map UFS host controller clock frequencies to the maximum
supported UFS high speed gear speeds. During clock scaling, we can map the
target clock frequency, demanded by devfreq, to the maximum supported gear
speed, so that devfreq can scale the gear to the highest gear speed
supported at the target clock frequency, instead of just scaling up/down
the gear between the min and max gear speeds.

Co-developed-by: Ziqi Chen <quic_ziqichen@quicinc.com>
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
Signed-off-by: Can Guo <quic_cang@quicinc.com>
---
v2 ->v3:
1. Remove the parameter 'gear' and use it as function return result.
2. Change "vops" into "vop" in commit message.
---
 drivers/ufs/core/ufshcd-priv.h | 8 ++++++++
 include/ufs/ufshcd.h           | 2 ++
 2 files changed, 10 insertions(+)

diff --git a/drivers/ufs/core/ufshcd-priv.h b/drivers/ufs/core/ufshcd-priv.h
index 0549b65f71ed..4da3e65c6735 100644
--- a/drivers/ufs/core/ufshcd-priv.h
+++ b/drivers/ufs/core/ufshcd-priv.h
@@ -277,6 +277,14 @@ static inline int ufshcd_mcq_vops_config_esi(struct ufs_hba *hba)
 	return -EOPNOTSUPP;
 }
 
+static inline int ufshcd_vops_freq_to_gear_speed(struct ufs_hba *hba, unsigned long freq)
+{
+	if (hba->vops && hba->vops->freq_to_gear_speed)
+		return hba->vops->freq_to_gear_speed(hba, freq);
+
+	return -EOPNOTSUPP;
+}
+
 extern const struct ufs_pm_lvl_states ufs_pm_lvl_states[];
 
 /**
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index f51d425696e7..cdb853f5b871 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -336,6 +336,7 @@ struct ufs_pwr_mode_info {
  * @get_outstanding_cqs: called to get outstanding completion queues
  * @config_esi: called to config Event Specific Interrupt
  * @config_scsi_dev: called to configure SCSI device parameters
+ * @freq_to_gear_speed: called to map clock frequency to the max supported gear speed
  */
 struct ufs_hba_variant_ops {
 	const char *name;
@@ -387,6 +388,7 @@ struct ufs_hba_variant_ops {
 				       unsigned long *ocqs);
 	int	(*config_esi)(struct ufs_hba *hba);
 	void	(*config_scsi_dev)(struct scsi_device *sdev);
+	int (*freq_to_gear_speed)(struct ufs_hba *hba, unsigned long freq);
 };
 
 /* clock gating state  */
-- 
2.34.1

[PATCH v3 4/8] scsi: ufs: qcom: Implement the freq_to_gear_speed() vop

[Ziqi Chen]

From: Can Guo <quic_cang@quicinc.com>

Implement the freq_to_gear_speed() vop to map the unipro core clock
frequency to the corresponding maximum supported gear speed.

Signed-off-by: Can Guo <quic_cang@quicinc.com>
Co-developed-by: Ziqi Chen <quic_ziqichen@quicinc.com>
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
---

v1 -> v2:
Print out freq and gear info as debugging message.

v2 -> v3:
1. Change "vops" to "vop" in commit message.
2. Removed variable 'ret' in function ufs_qcom_freq_to_gear_speed().
3. Removed parameters '*gear' and use gear value as return value for
   funtion ufs_qcom_freq_to_gear_speed().
---
 drivers/ufs/host/ufs-qcom.c | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c
index a1eb3cab45e4..47c3077705d9 100644
--- a/drivers/ufs/host/ufs-qcom.c
+++ b/drivers/ufs/host/ufs-qcom.c
@@ -1804,6 +1804,36 @@ static int ufs_qcom_config_esi(struct ufs_hba *hba)
 	return ret;
 }
 
+static int ufs_qcom_freq_to_gear_speed(struct ufs_hba *hba, unsigned long freq)
+{
+	int gear = 0;
+
+	switch (freq) {
+	case 403000000:
+		gear = UFS_HS_G5;
+		break;
+	case 300000000:
+		gear = UFS_HS_G4;
+		break;
+	case 201500000:
+		gear = UFS_HS_G3;
+		break;
+	case 150000000:
+	case 100000000:
+		gear = UFS_HS_G2;
+		break;
+	case 75000000:
+	case 37500000:
+		gear = UFS_HS_G1;
+		break;
+	default:
+		dev_err(hba->dev, "%s: Unsupported clock freq : %lu\n", __func__, freq);
+		return -EINVAL;
+	}
+
+	return gear;
+}
+
 /*
  * struct ufs_hba_qcom_vops - UFS QCOM specific variant operations
  *
@@ -1834,6 +1864,7 @@ static const struct ufs_hba_variant_ops ufs_hba_qcom_vops = {
 	.op_runtime_config	= ufs_qcom_op_runtime_config,
 	.get_outstanding_cqs	= ufs_qcom_get_outstanding_cqs,
 	.config_esi		= ufs_qcom_config_esi,
+	.freq_to_gear_speed	= ufs_qcom_freq_to_gear_speed,
 };
 
 /**
-- 
2.34.1

[PATCH v3 5/8] scsi: ufs: core: Enable multi-level gear scaling

[Ziqi Chen]

From: Can Guo <quic_cang@quicinc.com>

With OPP V2 enabled, devfreq can scale clocks amongst multiple frequency
plans. However, the gear speed is only toggled between min and max during
clock scaling. Enable multi-level gear scaling by mapping clock frequencies
to gear speeds, so that when devfreq scales clock frequencies we can put
the UFS link at the appropraite gear speeds accordingly.

Signed-off-by: Can Guo <quic_cang@quicinc.com>
Co-developed-by: Ziqi Chen <quic_ziqichen@quicinc.com>
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
---

v1 -> v2:
Rename the lable "do_pmc" to "config_pwr_mode".

v2 -> v3:
Use assignment instead memcpy() in function ufshcd_scale_gear().
---
 drivers/ufs/core/ufshcd.c | 51 +++++++++++++++++++++++++++++++--------
 1 file changed, 41 insertions(+), 10 deletions(-)

diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
index 8d295cc827cc..ebab897080a6 100644
--- a/drivers/ufs/core/ufshcd.c
+++ b/drivers/ufs/core/ufshcd.c
@@ -1308,16 +1308,26 @@ static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
 /**
  * ufshcd_scale_gear - scale up/down UFS gear
  * @hba: per adapter instance
+ * @target_gear: target gear to scale to
  * @scale_up: True for scaling up gear and false for scaling down
  *
  * Return: 0 for success; -EBUSY if scaling can't happen at this time;
  * non-zero for any other errors.
  */
-static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
+static int ufshcd_scale_gear(struct ufs_hba *hba, u32 target_gear, bool scale_up)
 {
 	int ret = 0;
 	struct ufs_pa_layer_attr new_pwr_info;
 
+	if (target_gear) {
+		new_pwr_info = hba->pwr_info;
+		new_pwr_info.gear_tx = target_gear;
+		new_pwr_info.gear_rx = target_gear;
+
+		goto config_pwr_mode;
+	}
+
+	/* Legacy gear scaling, in case vops_freq_to_gear_speed() is not implemented */
 	if (scale_up) {
 		memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info,
 		       sizeof(struct ufs_pa_layer_attr));
@@ -1338,6 +1348,7 @@ static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
 		}
 	}
 
+config_pwr_mode:
 	/* check if the power mode needs to be changed or not? */
 	ret = ufshcd_config_pwr_mode(hba, &new_pwr_info);
 	if (ret)
@@ -1408,15 +1419,26 @@ static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba, int err, bool sc
 static int ufshcd_devfreq_scale(struct ufs_hba *hba, unsigned long freq,
 				bool scale_up)
 {
+	u32 old_gear = hba->pwr_info.gear_rx;
+	int new_gear = 0;
 	int ret = 0;
 
+	new_gear = ufshcd_vops_freq_to_gear_speed(hba, freq);
+	if (new_gear < 0)
+		/*
+		 * return negative value means that the vops_freq_to_gear_speed() is not
+		 * implemented or didn't find matched gear speed, assign '0' to new_gear
+		 * to switch to legacy gear scaling sequence in ufshcd_scale_gear().
+		 */
+		new_gear = 0;
+
 	ret = ufshcd_clock_scaling_prepare(hba, 1 * USEC_PER_SEC);
 	if (ret)
 		return ret;
 
 	/* scale down the gear before scaling down clocks */
 	if (!scale_up) {
-		ret = ufshcd_scale_gear(hba, false);
+		ret = ufshcd_scale_gear(hba, (u32)new_gear, false);
 		if (ret)
 			goto out_unprepare;
 	}
@@ -1424,13 +1446,13 @@ static int ufshcd_devfreq_scale(struct ufs_hba *hba, unsigned long freq,
 	ret = ufshcd_scale_clks(hba, freq, scale_up);
 	if (ret) {
 		if (!scale_up)
-			ufshcd_scale_gear(hba, true);
+			ufshcd_scale_gear(hba, old_gear, true);
 		goto out_unprepare;
 	}
 
 	/* scale up the gear after scaling up clocks */
 	if (scale_up) {
-		ret = ufshcd_scale_gear(hba, true);
+		ret = ufshcd_scale_gear(hba, (u32)new_gear, true);
 		if (ret) {
 			ufshcd_scale_clks(hba, hba->devfreq->previous_freq,
 					  false);
@@ -1723,6 +1745,8 @@ static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count)
 {
 	struct ufs_hba *hba = dev_get_drvdata(dev);
+	struct ufs_clk_info *clki;
+	unsigned long freq;
 	u32 value;
 	int err = 0;
 
@@ -1746,14 +1770,21 @@ static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
 
 	if (value) {
 		ufshcd_resume_clkscaling(hba);
-	} else {
-		ufshcd_suspend_clkscaling(hba);
-		err = ufshcd_devfreq_scale(hba, ULONG_MAX, true);
-		if (err)
-			dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
-					__func__, err);
+		goto out_rel;
 	}
 
+	clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
+	freq = clki->max_freq;
+
+	ufshcd_suspend_clkscaling(hba);
+	err = ufshcd_devfreq_scale(hba, freq, true);
+	if (err)
+		dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
+				__func__, err);
+	else
+		hba->clk_scaling.target_freq = freq;
+
+out_rel:
 	ufshcd_release(hba);
 	ufshcd_rpm_put_sync(hba);
 out:
-- 
2.34.1

[PATCH v3 6/8] scsi: ufs: core: Check if scaling up is required when disable clkscale

[Ziqi Chen]

When disabling clkscale via the clkscale_enable sysfs entry, UFS driver
shall perform scaling up once regardless. Check if scaling up is required
or not first to avoid repetitive work.

Co-developed-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
---
 drivers/ufs/core/ufshcd.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
index ebab897080a6..bd93119a177d 100644
--- a/drivers/ufs/core/ufshcd.c
+++ b/drivers/ufs/core/ufshcd.c
@@ -1777,6 +1777,10 @@ static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
 	freq = clki->max_freq;
 
 	ufshcd_suspend_clkscaling(hba);
+
+	if (!ufshcd_is_devfreq_scaling_required(hba, freq, true))
+		goto out_rel;
+
 	err = ufshcd_devfreq_scale(hba, freq, true);
 	if (err)
 		dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
-- 
2.34.1

[PATCH v3 7/8] scsi: ufs: core: Toggle Write Booster during clock scaling base on gear speed

[Ziqi Chen]

From: Can Guo <quic_cang@quicinc.com>

During clock scaling, Write Booster is toggled on or off based on
whether the clock is scaled up or down. However, with OPP V2 powered
multi-level gear scaling, the gear can be scaled amongst multiple gear
speeds, e.g., it may scale down from G5 to G4, or from G4 to G2. To provide
flexibilities, add a new field for clock scaling such that during clock
scaling Write Booster can be enabled or disabled based on gear speeds but
not based on scaling up or down.

Signed-off-by: Can Guo <quic_cang@quicinc.com>
Co-developed-by: Ziqi Chen <quic_ziqichen@quicinc.com>
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
---

v1 - > v2:
Initialize the local variables "wb_en" as "false".
---
 drivers/ufs/core/ufshcd.c | 17 ++++++++++++-----
 include/ufs/ufshcd.h      |  3 +++
 2 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
index bd93119a177d..83fd38c78467 100644
--- a/drivers/ufs/core/ufshcd.c
+++ b/drivers/ufs/core/ufshcd.c
@@ -1393,13 +1393,17 @@ static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba, u64 timeout_us)
 	return ret;
 }
 
-static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba, int err, bool scale_up)
+static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba, int err)
 {
 	up_write(&hba->clk_scaling_lock);
 
-	/* Enable Write Booster if we have scaled up else disable it */
-	if (ufshcd_enable_wb_if_scaling_up(hba) && !err)
-		ufshcd_wb_toggle(hba, scale_up);
+	/* Enable Write Booster if current gear requires it else disable it */
+	if (ufshcd_enable_wb_if_scaling_up(hba) && !err) {
+		bool wb_en = false;
+
+		wb_en = hba->pwr_info.gear_rx >= hba->clk_scaling.wb_gear ? true : false;
+		ufshcd_wb_toggle(hba, wb_en);
+	}
 
 	mutex_unlock(&hba->wb_mutex);
 
@@ -1461,7 +1465,7 @@ static int ufshcd_devfreq_scale(struct ufs_hba *hba, unsigned long freq,
 	}
 
 out_unprepare:
-	ufshcd_clock_scaling_unprepare(hba, ret, scale_up);
+	ufshcd_clock_scaling_unprepare(hba, ret);
 	return ret;
 }
 
@@ -1821,6 +1825,9 @@ static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
 	if (!hba->clk_scaling.min_gear)
 		hba->clk_scaling.min_gear = UFS_HS_G1;
 
+	if (!hba->clk_scaling.wb_gear)
+		hba->clk_scaling.wb_gear = UFS_HS_G3;
+
 	INIT_WORK(&hba->clk_scaling.suspend_work,
 		  ufshcd_clk_scaling_suspend_work);
 	INIT_WORK(&hba->clk_scaling.resume_work,
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index cdb853f5b871..efca700d0520 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -447,6 +447,8 @@ struct ufs_clk_gating {
  * @resume_work: worker to resume devfreq
  * @target_freq: frequency requested by devfreq framework
  * @min_gear: lowest HS gear to scale down to
+ * @wb_gear: enable Write Booster when HS gear scales above or equal to it, else
+ *		disable Write Booster
  * @is_enabled: tracks if scaling is currently enabled or not, controlled by
  *		clkscale_enable sysfs node
  * @is_allowed: tracks if scaling is currently allowed or not, used to block
@@ -467,6 +469,7 @@ struct ufs_clk_scaling {
 	struct work_struct resume_work;
 	unsigned long target_freq;
 	u32 min_gear;
+	u32 wb_gear;
 	bool is_enabled;
 	bool is_allowed;
 	bool is_initialized;
-- 
2.34.1

[PATCH v3 8/8] ABI: sysfs-driver-ufs: Add missing UFS sysfs attributes

[Ziqi Chen]

Add UFS driver sysfs attributes clkscale_enable, clkgate_enable and
clkgate_delay_ms to this doucment.

Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
---
v1 -> v2:
It is a new patch be added to this series since v2.

v2 -> v3:
1. Typo fixed for commit message.
2. Improve the grammar of attributes' descriptions.
---
 Documentation/ABI/testing/sysfs-driver-ufs | 33 ++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/Documentation/ABI/testing/sysfs-driver-ufs b/Documentation/ABI/testing/sysfs-driver-ufs
index 5fa6655aee84..9b1e22416346 100644
--- a/Documentation/ABI/testing/sysfs-driver-ufs
+++ b/Documentation/ABI/testing/sysfs-driver-ufs
@@ -1559,3 +1559,36 @@ Description:
 		Symbol - HCMID. This file shows the UFSHCD manufacturer id.
 		The Manufacturer ID is defined by JEDEC in JEDEC-JEP106.
 		The file is read only.
+
+What:		/sys/bus/platform/drivers/ufshcd/*/clkscale_enable
+What:		/sys/bus/platform/devices/*.ufs/clkscale_enable
+Date:		January 2025
+Contact:	Ziqi Chen <quic_ziqichen@quicinc.com>
+Description:
+		This file shows whether the UFS clock scaling is enabled or not.
+		And it can be used to enable/disable the clock scaling by writing
+		1 or 0 to this file.
+
+		The file is read/write.
+
+What:		/sys/bus/platform/drivers/ufshcd/*/clkgate_enable
+What:		/sys/bus/platform/devices/*.ufs/clkgate_enable
+Date:		January 2025
+Contact:	Ziqi Chen <quic_ziqichen@quicinc.com>
+Description:
+		This file shows whether the UFS clock gating is enabled or not.
+		And it can be used to enable/disable the clock gating by writing
+		1 or 0 to this file.
+
+		The file is read/write.
+
+What:		/sys/bus/platform/drivers/ufshcd/*/clkgate_delay_ms
+What:		/sys/bus/platform/devices/*.ufs/clkgate_delay_ms
+Date:		January 2025
+Contact:	Ziqi Chen <quic_ziqichen@quicinc.com>
+Description:
+		This file shows and sets the number of milliseconds of idle time
+		before the UFS driver start to perform clock gating. This can
+		prevent the UFS from frequently performing clock gate/ungate.
+
+		The file is read/write.
-- 
2.34.1

Re: [PATCH v3 1/8] scsi: ufs: core: Pass target_freq to clk_scale_notify() vop

[Bean Huo]

On Mon, 2025-02-03 at 16:11 +0800, Ziqi Chen wrote:
> From: Can Guo <quic_cang@quicinc.com>
> 
> Instead of only two frequencies, if OPP V2 is used, the UFS devfreq
> clock
> scaling may scale the clock among multiple frequencies, so just
> passing
> up/down to vop clk_scale_notify() is not enough to cover the
> intermediate
> clock freqs between the min and max freqs. Hence pass the target_freq
> ,
> which will be used in successive commits, to clk_scale_notify() to
> allow
> the vop to perform corresponding configurations with regard to the
> clock
> freqs.
> 
> Signed-off-by: Can Guo <quic_cang@quicinc.com>
> Co-developed-by: Ziqi Chen <quic_ziqichen@quicinc.com>
> Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>

I have reviewed patches [1/8], [2/8], [3/8], [4/8] in the v2, since you
just changed coding types, and typos , but no logic change in v3. Add
my review tag agaion:

Reviewed-by: Bean Huo <beanhuo@micron.com> 

Re: [PATCH v3 2/8] scsi: ufs: qcom: Pass target_freq to clk scale pre and post change

[Bean Huo]

On Mon, 2025-02-03 at 16:11 +0800, Ziqi Chen wrote:
> From: Can Guo <quic_cang@quicinc.com>
> 
> Instead of only two frequencies, if OPP V2 is used, the UFS devfreq
> clock
> scaling may scale the clock among multiple frequencies. In the case
> of
> scaling up, the devfreq may decide to scale the clock to an
> intermediate
> freq base on load, 
	
       based on load


> but the clock scale up pre change operation uses
> settings for the max clock freq unconditionally. Fix it by passing
> the
> target_freq to clock scale up pre change so that the correct settings
> for
> the target_freq can be used.
> 
> In the case of scaling down, the clock scale down post change
> operation
> is doing fine, because it reads the actual clock rate to tell freq,
> but to
> keep symmetry with clock scale up pre change operation, just use the
> target_freq instead of reading clock rate.
> 
> Signed-off-by: Can Guo <quic_cang@quicinc.com>
> Co-developed-by: Ziqi Chen <quic_ziqichen@quicinc.com>
> Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>


agaion, no logic change, add my review tag:

Reviewed-by: Bean Huo <beanhuo@micron.com>

Re: [PATCH v3 3/8] scsi: ufs: core: Add a vop to map clock frequency to gear speed

[Bean Huo]

On Mon, 2025-02-03 at 16:11 +0800, Ziqi Chen wrote:
> From: Can Guo <quic_cang@quicinc.com>
> 
> Add a vop to map UFS host controller clock frequencies to the maximum
> supported UFS high speed gear speeds. 

From the code, seems it is not "maximum" gear, it is corresponding UFS
Gear.

> During clock scaling, we canmap thetarget clock frequency, demanded
> by devfreq, to the maximum supported gear
> speed, so that devfreq can scale the gear to the highest gear speed
> supported at the target clock frequency, instead of just scaling
> up/down
> the gear between the min and max gear speeds.
> 
> Co-developed-by: Ziqi Chen <quic_ziqichen@quicinc.com>
> Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
> Signed-off-by: Can Guo <quic_cang@quicinc.com>

Reveiwed-by: Bean Huo <beanhuo@micron.com>

Re: [PATCH v3 4/8] scsi: ufs: qcom: Implement the freq_to_gear_speed() vop

[Bean Huo]

On Mon, 2025-02-03 at 16:11 +0800, Ziqi Chen wrote:
> From: Can Guo <quic_cang@quicinc.com>
> 
> Implement the freq_to_gear_speed() vop to map the unipro core clock
> frequency to the corresponding maximum supported gear speed.
> 
> Signed-off-by: Can Guo <quic_cang@quicinc.com>
> Co-developed-by: Ziqi Chen <quic_ziqichen@quicinc.com>
> Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>

Reviewed-by: Bean Huo <beanhuo@micron.com>

Re: [PATCH v3 1/8] scsi: ufs: core: Pass target_freq to clk_scale_notify() vop

[Bart Van Assche]

On 2/3/25 12:11 AM, Ziqi Chen wrote:
> Instead of only two frequencies, if OPP V2 is used, the UFS devfreq clock
> scaling may scale the clock among multiple frequencies, so just passing
> up/down to vop clk_scale_notify() is not enough to cover the intermediate
> clock freqs between the min and max freqs. Hence pass the target_freq ,
> which will be used in successive commits, to clk_scale_notify() to allow
> the vop to perform corresponding configurations with regard to the clock
> freqs.

Reviewed-by: Bart Van Assche <bvanassche@acm.org>

Re: [PATCH v3 3/8] scsi: ufs: core: Add a vop to map clock frequency to gear speed

[Bart Van Assche]

On 2/3/25 12:11 AM, Ziqi Chen wrote:
> Add a vop to map UFS host controller clock frequencies to the maximum
> supported UFS high speed gear speeds. During clock scaling, we can map the
> target clock frequency, demanded by devfreq, to the maximum supported gear
> speed, so that devfreq can scale the gear to the highest gear speed
> supported at the target clock frequency, instead of just scaling up/down
> the gear between the min and max gear speeds.

Reviewed-by: Bart Van Assche <bvanassche@acm.org>

Re: [PATCH v3 5/8] scsi: ufs: core: Enable multi-level gear scaling

[Bart Van Assche]

On 2/3/25 12:11 AM, Ziqi Chen wrote:
> With OPP V2 enabled, devfreq can scale clocks amongst multiple frequency
> plans. However, the gear speed is only toggled between min and max during
> clock scaling. Enable multi-level gear scaling by mapping clock frequencies
> to gear speeds, so that when devfreq scales clock frequencies we can put
> the UFS link at the appropraite gear speeds accordingly.

Reviewed-by: Bart Van Assche <bvanassche@acm.org>

Re: [PATCH v3 6/8] scsi: ufs: core: Check if scaling up is required when disable clkscale

[Bart Van Assche]

On 2/3/25 12:11 AM, Ziqi Chen wrote:
> When disabling clkscale via the clkscale_enable sysfs entry, UFS driver
> shall perform scaling up once regardless. Check if scaling up is required
> or not first to avoid repetitive work.
> 
> Co-developed-by: Can Guo <quic_cang@quicinc.com>
> Signed-off-by: Can Guo <quic_cang@quicinc.com>
> Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
> ---
>   drivers/ufs/core/ufshcd.c | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
> index ebab897080a6..bd93119a177d 100644
> --- a/drivers/ufs/core/ufshcd.c
> +++ b/drivers/ufs/core/ufshcd.c
> @@ -1777,6 +1777,10 @@ static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
>   	freq = clki->max_freq;
>   
>   	ufshcd_suspend_clkscaling(hba);
> +
> +	if (!ufshcd_is_devfreq_scaling_required(hba, freq, true))
> +		goto out_rel;
> +
>   	err = ufshcd_devfreq_scale(hba, freq, true);
>   	if (err)
>   		dev_err(hba->dev, "%s: failed to scale clocks up %d\n",

Reviewed-by: Bart Van Assche <bvanassche@acm.org>

Re: [PATCH v3 7/8] scsi: ufs: core: Toggle Write Booster during clock scaling base on gear speed

[Bart Van Assche]

On 2/3/25 12:11 AM, Ziqi Chen wrote:
> -	/* Enable Write Booster if we have scaled up else disable it */
> -	if (ufshcd_enable_wb_if_scaling_up(hba) && !err)
> -		ufshcd_wb_toggle(hba, scale_up);
> +	/* Enable Write Booster if current gear requires it else disable it */
> +	if (ufshcd_enable_wb_if_scaling_up(hba) && !err) {
> +		bool wb_en = false;
> +
> +		wb_en = hba->pwr_info.gear_rx >= hba->clk_scaling.wb_gear ? true : false;
> +		ufshcd_wb_toggle(hba, wb_en);
> +	}

Both the " = false" initialization and the "? true : false" part are
unnecessary. Please remove the "wb_en" variable entirely, e.g. as follows:

	if (ufshcd_enable_wb_if_scaling_up(hba) && !err)
		ufshcd_wb_toggle(hba, hba->pwr_info.gear_rx >=
				 hba->clk_scaling.wb_gear);

Otherwise this patch looks good to me.

Thanks,

Bart.

Re: [PATCH v3 8/8] ABI: sysfs-driver-ufs: Add missing UFS sysfs attributes

[Bart Van Assche]

On 2/3/25 12:11 AM, Ziqi Chen wrote:

Please change the patch title from "Add missing UFS sysfs attributes" 
into "Add missing UFS sysfs attribute documentation". This patch does 
not add any sysfs attributes - it adds missing documentation.

> +What:		/sys/bus/platform/drivers/ufshcd/*/clkscale_enable
> +What:		/sys/bus/platform/devices/*.ufs/clkscale_enable
> +Date:		January 2025
> +Contact:	Ziqi Chen <quic_ziqichen@quicinc.com>
> +Description:
> +		This file shows whether the UFS clock scaling is enabled or not.
> +		And it can be used to enable/disable the clock scaling by writing
> +		1 or 0 to this file.
> +
> +		The file is read/write.
> +
> +What:		/sys/bus/platform/drivers/ufshcd/*/clkgate_enable
> +What:		/sys/bus/platform/devices/*.ufs/clkgate_enable
> +Date:		January 2025
> +Contact:	Ziqi Chen <quic_ziqichen@quicinc.com>
> +Description:
> +		This file shows whether the UFS clock gating is enabled or not.
> +		And it can be used to enable/disable the clock gating by writing
> +		1 or 0 to this file.
> +
> +		The file is read/write.
> +
> +What:		/sys/bus/platform/drivers/ufshcd/*/clkgate_delay_ms
> +What:		/sys/bus/platform/devices/*.ufs/clkgate_delay_ms
> +Date:		January 2025
> +Contact:	Ziqi Chen <quic_ziqichen@quicinc.com>
> +Description:
> +		This file shows and sets the number of milliseconds of idle time
> +		before the UFS driver start to perform clock gating. This can
                                       ^^^^^
                                       starts
> +		prevent the UFS from frequently performing clock gate/ungate.
                                                                  ^^^^^^^
                                                          gating/ungating
> +
> +		The file is read/write.


Please change the word "file" into "attribute" to make the sysfs 
attribute documentation consistent with the sysfs documentation for
other kernel drivers.

Thanks,

Bart.

Re: [PATCH v3 5/8] scsi: ufs: core: Enable multi-level gear scaling

[Bean Huo]

On Mon, 2025-02-03 at 16:11 +0800, Ziqi Chen wrote:
> From: Can Guo <quic_cang@quicinc.com>
> 
> With OPP V2 enabled, devfreq can scale clocks amongst multiple
> frequency
> plans. However, the gear speed is only toggled between min and max
> during
> clock scaling. Enable multi-level gear scaling by mapping clock
> frequencies
> to gear speeds, so that when devfreq scales clock frequencies we can
> put
> the UFS link at the appropraite gear speeds accordingly.
		       appropraite->appropriate

Reviewed-by: Bean Huo <beanhuo@micron.com>

Re: [PATCH v3 7/8] scsi: ufs: core: Toggle Write Booster during clock scaling base on gear speed

[Bean Huo]

On Mon, 2025-02-03 at 16:11 +0800, Ziqi Chen wrote:
> > +       if (!hba->clk_scaling.wb_gear)
> > +               hba->clk_scaling.wb_gear = UFS_HS_G3;
> > +

Hi Ziqi, 

Initializes wb_gear to UFS_HS_G3, mabye add comments in the commit why.


Reviewed-by: Bean Huo <beanhuo@micron.com>

Re: [PATCH v3 1/8] scsi: ufs: core: Pass target_freq to clk_scale_notify() vop

[Ziqi Chen]

Hi Bean,

Thanks for your review ~

-Ziqi

On 2/3/2025 5:37 PM, Bean Huo wrote:
> On Mon, 2025-02-03 at 16:11 +0800, Ziqi Chen wrote:
>> From: Can Guo <quic_cang@quicinc.com>
>>
>> Instead of only two frequencies, if OPP V2 is used, the UFS devfreq
>> clock
>> scaling may scale the clock among multiple frequencies, so just
>> passing
>> up/down to vop clk_scale_notify() is not enough to cover the
>> intermediate
>> clock freqs between the min and max freqs. Hence pass the target_freq
>> ,
>> which will be used in successive commits, to clk_scale_notify() to
>> allow
>> the vop to perform corresponding configurations with regard to the
>> clock
>> freqs.
>>
>> Signed-off-by: Can Guo <quic_cang@quicinc.com>
>> Co-developed-by: Ziqi Chen <quic_ziqichen@quicinc.com>
>> Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
> 
> I have reviewed patches [1/8], [2/8], [3/8], [4/8] in the v2, since you
> just changed coding types, and typos , but no logic change in v3. Add
> my review tag agaion:
> 
> Reviewed-by: Bean Huo <beanhuo@micron.com>

Re: [PATCH v3 3/8] scsi: ufs: core: Add a vop to map clock frequency to gear speed

[Ziqi Chen]

On 2/3/2025 8:55 PM, Bean Huo wrote:
> On Mon, 2025-02-03 at 16:11 +0800, Ziqi Chen wrote:
>> From: Can Guo <quic_cang@quicinc.com>
>>
>> Add a vop to map UFS host controller clock frequencies to the maximum
>> supported UFS high speed gear speeds.
> 
>  From the code, seems it is not "maximum" gear, it is corresponding UFS
> Gear.
> 

Hi Bean,

Thank you for comment. Let me explain for you that why it is "maximum 
supported" gear.

For example, the freq 201500000 supports G1 G2 G3， this VOP will maps to 
G3 which is the "maximum supported" gear.

Maybe we can change it to "corresponding maximum supported" gear would 
be more make sense.

Let me change it in next version.

-Ziqi

>> During clock scaling, we canmap thetarget clock frequency, demanded
>> by devfreq, to the maximum supported gear
>> speed, so that devfreq can scale the gear to the highest gear speed
>> supported at the target clock frequency, instead of just scaling
>> up/down
>> the gear between the min and max gear speeds.
>>
>> Co-developed-by: Ziqi Chen <quic_ziqichen@quicinc.com>
>> Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
>> Signed-off-by: Can Guo <quic_cang@quicinc.com>
> 
> Reveiwed-by: Bean Huo <beanhuo@micron.com>

Re: [PATCH v3 7/8] scsi: ufs: core: Toggle Write Booster during clock scaling base on gear speed

[Ziqi Chen]

On 2/6/2025 2:09 AM, Bart Van Assche wrote:
> On 2/3/25 12:11 AM, Ziqi Chen wrote:
>> -    /* Enable Write Booster if we have scaled up else disable it */
>> -    if (ufshcd_enable_wb_if_scaling_up(hba) && !err)
>> -        ufshcd_wb_toggle(hba, scale_up);
>> +    /* Enable Write Booster if current gear requires it else disable 
>> it */
>> +    if (ufshcd_enable_wb_if_scaling_up(hba) && !err) {
>> +        bool wb_en = false;
>> +
>> +        wb_en = hba->pwr_info.gear_rx >= hba->clk_scaling.wb_gear ? 
>> true : false;
>> +        ufshcd_wb_toggle(hba, wb_en);
>> +    }
> 
> Both the " = false" initialization and the "? true : false" part are
> unnecessary. Please remove the "wb_en" variable entirely, e.g. as follows:
> 
>      if (ufshcd_enable_wb_if_scaling_up(hba) && !err)
>          ufshcd_wb_toggle(hba, hba->pwr_info.gear_rx >=
>                   hba->clk_scaling.wb_gear);
> 
> Otherwise this patch looks good to me.
> 
> Thanks,
> 
> Bart.

Sure , Bart. Your suggestion looks nice. let me apply it in next 
version, thank you~

-Ziqi

Re: [PATCH v3 8/8] ABI: sysfs-driver-ufs: Add missing UFS sysfs attributes

[Ziqi Chen]

On 2/6/2025 2:12 AM, Bart Van Assche wrote:
> On 2/3/25 12:11 AM, Ziqi Chen wrote:
> 
> Please change the patch title from "Add missing UFS sysfs attributes" 
> into "Add missing UFS sysfs attribute documentation". This patch does 
> not add any sysfs attributes - it adds missing documentation.
> 
>> +What:        /sys/bus/platform/drivers/ufshcd/*/clkscale_enable
>> +What:        /sys/bus/platform/devices/*.ufs/clkscale_enable
>> +Date:        January 2025
>> +Contact:    Ziqi Chen <quic_ziqichen@quicinc.com>
>> +Description:
>> +        This file shows whether the UFS clock scaling is enabled or not.
>> +        And it can be used to enable/disable the clock scaling by 
>> writing
>> +        1 or 0 to this file.
>> +
>> +        The file is read/write.
>> +
>> +What:        /sys/bus/platform/drivers/ufshcd/*/clkgate_enable
>> +What:        /sys/bus/platform/devices/*.ufs/clkgate_enable
>> +Date:        January 2025
>> +Contact:    Ziqi Chen <quic_ziqichen@quicinc.com>
>> +Description:
>> +        This file shows whether the UFS clock gating is enabled or not.
>> +        And it can be used to enable/disable the clock gating by writing
>> +        1 or 0 to this file.
>> +
>> +        The file is read/write.
>> +
>> +What:        /sys/bus/platform/drivers/ufshcd/*/clkgate_delay_ms
>> +What:        /sys/bus/platform/devices/*.ufs/clkgate_delay_ms
>> +Date:        January 2025
>> +Contact:    Ziqi Chen <quic_ziqichen@quicinc.com>
>> +Description:
>> +        This file shows and sets the number of milliseconds of idle time
>> +        before the UFS driver start to perform clock gating. This can
>                                        ^^^^^
>                                        starts
>> +        prevent the UFS from frequently performing clock gate/ungate.
>                                                                   ^^^^^^^
>                                                           gating/ungating
>> +
>> +        The file is read/write.
> 
> 
> Please change the word "file" into "attribute" to make the sysfs 
> attribute documentation consistent with the sysfs documentation for
> other kernel drivers.
> 
> Thanks,
> 
> Bart.

OK , Thanks Bart~

-Ziqi

Re: [PATCH v3 5/8] scsi: ufs: core: Enable multi-level gear scaling

[Ziqi Chen]

On 2/6/2025 4:01 AM, Bean Huo wrote:
> On Mon, 2025-02-03 at 16:11 +0800, Ziqi Chen wrote:
>> From: Can Guo <quic_cang@quicinc.com>
>>
>> With OPP V2 enabled, devfreq can scale clocks amongst multiple
>> frequency
>> plans. However, the gear speed is only toggled between min and max
>> during
>> clock scaling. Enable multi-level gear scaling by mapping clock
>> frequencies
>> to gear speeds, so that when devfreq scales clock frequencies we can
>> put
>> the UFS link at the appropraite gear speeds accordingly.
> 		       appropraite->appropriate
> 
> Reviewed-by: Bean Huo <beanhuo@micron.com>

Thanks Bean~

-Ziqi

Re: [PATCH v3 7/8] scsi: ufs: core: Toggle Write Booster during clock scaling base on gear speed

[Ziqi Chen]

On 2/6/2025 4:03 AM, Bean Huo wrote:
> On Mon, 2025-02-03 at 16:11 +0800, Ziqi Chen wrote:
>>> +       if (!hba->clk_scaling.wb_gear)
>>> +               hba->clk_scaling.wb_gear = UFS_HS_G3;
>>> +
> 
> Hi Ziqi,
> 
> Initializes wb_gear to UFS_HS_G3, mabye add comments in the commit why.
> 
> 
Sure , I will add this comment, thank you~

-Ziqi

> Reviewed-by: Bean Huo <beanhuo@micron.com>

Re: [PATCH v3 0/8] Support Multi-frequency scale for UFS

[neil.armstrong]

On 03/02/2025 09:11, Ziqi Chen wrote:
> With OPP V2 enabled, devfreq can scale clocks amongst multiple frequency
> plans. However, the gear speed is only toggled between min and max during
> clock scaling. Enable multi-level gear scaling by mapping clock frequencies
> to gear speeds, so that when devfreq scales clock frequencies we can put
> the UFS link at the appropraite gear speeds accordingly.
> 
> This series has been tested on below platforms -
> sm8550 mtp + UFS3.1
> SM8650 MTP + UFS3.1
> SM8750 MTP + UFS4.0
> 
> v1 -> v2:
> 1. Withdraw old patch 8/8 "ARM: dts: msm: Use Operation Points V2 for UFS on SM8650"
> 2. Add new patch 8/8 "ABI: sysfs-driver-ufs: Add missing UFS sysfs addributes"
> 3. Modify commit message for  "scsi: ufs: core: Pass target_freq to clk_scale_notify() vops" and "scsi: ufs: qcom: Pass target_freq to clk scale pre and post change"
> 4. In "scsi: ufs: qcom: Pass target_freq to clk scale pre and post change", use common Macro HZ_PER_MHZ in function ufs_qcom_set_core_clk_ctrl()
> 5. In "scsi: ufs: qcom: Implement the freq_to_gear_speed() vops", print out freq and gear info as debugging message
> 6. In "scsi: ufs: core: Enable multi-level gear scaling", rename the lable "do_pmc" to "config_pwr_mode"
> 7. In "scsi: ufs: core: Toggle Write Booster during clock", initialize the local variables "wb_en" as "false"
> 
> v2 -> v3:
> 1. Change 'vops' to 'vop' in all commit message
> 2. keep the indentation consistent for clk_scale_notify() definition.
> 3. In "scsi: ufs: core: Add a vop to map clock frequency to gear speed", "scsi: ufs: qcom: Implement the freq_to_gear_speed() vop"
>     and "scsi: ufs: core: Enable multi-level gear scaling", remove the parameter 'gear' and use it as return result in function freq_to_gear_speed()
> 4. In "scsi: ufs: qcom: Implement the freq_to_gear_speed(), removed the variable 'ret' in function ufs_qcom_freq_to_gear_speed()
> 5. In "scsi: ufs: core: Enable multi-level gear scaling", use assignment instead memcpy() in function ufshcd_scale_gear()
> 6. Improve the grammar of attributes' descriptions in “ABI: sysfs-driver-ufs: Add missing UFS sysfs attributes”
> 7. Typo fixed for some commit messages.
> 
> Can Guo (6):
>    scsi: ufs: core: Pass target_freq to clk_scale_notify() vop
>    scsi: ufs: qcom: Pass target_freq to clk scale pre and post change
>    scsi: ufs: core: Add a vop to map clock frequency to gear speed
>    scsi: ufs: qcom: Implement the freq_to_gear_speed() vop
>    scsi: ufs: core: Enable multi-level gear scaling
>    scsi: ufs: core: Toggle Write Booster during clock scaling base on
>      gear speed
> 
> Ziqi Chen (2):
>    scsi: ufs: core: Check if scaling up is required when disable clkscale
>    ABI: sysfs-driver-ufs: Add missing UFS sysfs attributes
> 
>   Documentation/ABI/testing/sysfs-driver-ufs | 33 ++++++++++
>   drivers/ufs/core/ufshcd-priv.h             | 15 ++++-
>   drivers/ufs/core/ufshcd.c                  | 76 +++++++++++++++++-----
>   drivers/ufs/host/ufs-mediatek.c            |  1 +
>   drivers/ufs/host/ufs-qcom.c                | 62 ++++++++++++++----
>   include/ufs/ufshcd.h                       |  9 ++-
>   6 files changed, 160 insertions(+), 36 deletions(-)
> 

Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-HDK
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-HDK

I added some traces and played with devfreq max_freq while copying data
from the UFS disk, no issues observed.

Neil		

Re: [PATCH v3 0/8] Support Multi-frequency scale for UFS

[Ziqi Chen]

On 2/6/2025 5:53 PM, neil.armstrong@linaro.org wrote:
> On 03/02/2025 09:11, Ziqi Chen wrote:
>> With OPP V2 enabled, devfreq can scale clocks amongst multiple frequency
>> plans. However, the gear speed is only toggled between min and max during
>> clock scaling. Enable multi-level gear scaling by mapping clock 
>> frequencies
>> to gear speeds, so that when devfreq scales clock frequencies we can put
>> the UFS link at the appropraite gear speeds accordingly.
>>
>> This series has been tested on below platforms -
>> sm8550 mtp + UFS3.1
>> SM8650 MTP + UFS3.1
>> SM8750 MTP + UFS4.0
>>
>> v1 -> v2:
>> 1. Withdraw old patch 8/8 "ARM: dts: msm: Use Operation Points V2 for 
>> UFS on SM8650"
>> 2. Add new patch 8/8 "ABI: sysfs-driver-ufs: Add missing UFS sysfs 
>> addributes"
>> 3. Modify commit message for  "scsi: ufs: core: Pass target_freq to 
>> clk_scale_notify() vops" and "scsi: ufs: qcom: Pass target_freq to clk 
>> scale pre and post change"
>> 4. In "scsi: ufs: qcom: Pass target_freq to clk scale pre and post 
>> change", use common Macro HZ_PER_MHZ in function 
>> ufs_qcom_set_core_clk_ctrl()
>> 5. In "scsi: ufs: qcom: Implement the freq_to_gear_speed() vops", 
>> print out freq and gear info as debugging message
>> 6. In "scsi: ufs: core: Enable multi-level gear scaling", rename the 
>> lable "do_pmc" to "config_pwr_mode"
>> 7. In "scsi: ufs: core: Toggle Write Booster during clock", initialize 
>> the local variables "wb_en" as "false"
>>
>> v2 -> v3:
>> 1. Change 'vops' to 'vop' in all commit message
>> 2. keep the indentation consistent for clk_scale_notify() definition.
>> 3. In "scsi: ufs: core: Add a vop to map clock frequency to gear 
>> speed", "scsi: ufs: qcom: Implement the freq_to_gear_speed() vop"
>>     and "scsi: ufs: core: Enable multi-level gear scaling", remove the 
>> parameter 'gear' and use it as return result in function 
>> freq_to_gear_speed()
>> 4. In "scsi: ufs: qcom: Implement the freq_to_gear_speed(), removed 
>> the variable 'ret' in function ufs_qcom_freq_to_gear_speed()
>> 5. In "scsi: ufs: core: Enable multi-level gear scaling", use 
>> assignment instead memcpy() in function ufshcd_scale_gear()
>> 6. Improve the grammar of attributes' descriptions in “ABI: sysfs- 
>> driver-ufs: Add missing UFS sysfs attributes”
>> 7. Typo fixed for some commit messages.
>>
>> Can Guo (6):
>>    scsi: ufs: core: Pass target_freq to clk_scale_notify() vop
>>    scsi: ufs: qcom: Pass target_freq to clk scale pre and post change
>>    scsi: ufs: core: Add a vop to map clock frequency to gear speed
>>    scsi: ufs: qcom: Implement the freq_to_gear_speed() vop
>>    scsi: ufs: core: Enable multi-level gear scaling
>>    scsi: ufs: core: Toggle Write Booster during clock scaling base on
>>      gear speed
>>
>> Ziqi Chen (2):
>>    scsi: ufs: core: Check if scaling up is required when disable clkscale
>>    ABI: sysfs-driver-ufs: Add missing UFS sysfs attributes
>>
>>   Documentation/ABI/testing/sysfs-driver-ufs | 33 ++++++++++
>>   drivers/ufs/core/ufshcd-priv.h             | 15 ++++-
>>   drivers/ufs/core/ufshcd.c                  | 76 +++++++++++++++++-----
>>   drivers/ufs/host/ufs-mediatek.c            |  1 +
>>   drivers/ufs/host/ufs-qcom.c                | 62 ++++++++++++++----
>>   include/ufs/ufshcd.h                       |  9 ++-
>>   6 files changed, 160 insertions(+), 36 deletions(-)
>>
> 
> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-HDK
> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-HDK
> 
> I added some traces and played with devfreq max_freq while copying data
> from the UFS disk, no issues observed.
> 
> Neil

Thank Neil for your test result.

-Ziqi