Re: [PATCH 0/7] ufs: Remove the clock gating code

["Peter Wang (王信友)" <peter.wang@mediatek.com>]

On Thu, 2026-01-22 at 23:00 +0530, Manivannan Sadhasivam wrote:
> 
> 
> Hi Bart,
> 
> Thanks for the work! I did try to get rid of the clock gating feature
> a couple
> of years ago as I also thought that it duplicates the behavior of the
> runtime PM
> framework.
> 

Hi Mani,


	hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
						UFS_SLEEP_PWR_MODE,
						UIC_LINK_HIBERN8_STATE
);

The default RPM level is different from clock gating,
so it should not duplicate the behavior.

RPM also sets the device to sleep mode and powers off unnecessary
voltages,
whereas clock gating only controls the clock on/off state and
hibernation maybe.


> But when I discussed this change with Qcom UFS folks, I was told that
> getting
> rid of clock gating will have a negative impact on the runtime power
> consumption
> on Qcom platforms as most of the power hungry resources are gated by
> the clock
> and there will be added latency with going through the runtime PM
> framework.
> 
> Nitin is working on measuring the power impact of this series on Qcom
> platforms to verify whether the above concern is really valid or not.
> So I'd
> request to hold off this series until he gets back with the analysis,
> since this
> series is very critical for us.
> 
> It'd be good if other vendors like Mediatek and Samsung also carry
> out the power
> impact analysis on their platforms.
> 
> - Mani
> 


Many years ago, Mediatek tested the clock gating delay time and found
that
if the delay was too long, it would affect power consumption. In the
end, 
we set the delay at 10 ms. Removing it entirely would definitely impact
power.

There’s also another situation regarding whether auto-hibern8 is
enabled. 
If auto-hibern8 is not enabled, manual hibern8 will be triggered along 
with clock gating. If the clock gating removed, the impact should be 
even greater.

Thanks
Peter