From: Greg KH <gregkh@linuxfoundation.org>
To: Shenwei Wang <shenwei.wang@nxp.com>
Cc: "linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>
Subject: Re: [EXT] Re: [PATCH V1 1/1] serial: fsl_lpuart: zero out parity bit in CS7 mode
Date: Thu, 14 Jul 2022 17:56:30 +0200 [thread overview]
Message-ID: <YtA8rrxydTUek15M@kroah.com> (raw)
In-Reply-To: <AM9PR04MB827436A558C5B9D920DD5A1589889@AM9PR04MB8274.eurprd04.prod.outlook.com>
On Thu, Jul 14, 2022 at 03:50:24PM +0000, Shenwei Wang wrote:
>
>
> > -----Original Message-----
> > From: Greg KH <gregkh@linuxfoundation.org>
> > Sent: Thursday, July 14, 2022 10:31 AM
> > To: Shenwei Wang <shenwei.wang@nxp.com>
> > Cc: linux-serial@vger.kernel.org
> > Subject: Re: [EXT] Re: [PATCH V1 1/1] serial: fsl_lpuart: zero out parity bit in CS7
> > mode
> >
> > Caution: EXT Email
> >
> > On Thu, Jul 14, 2022 at 03:26:30PM +0000, Shenwei Wang wrote:
> > >
> > >
> > > > -----Original Message-----
> > > > From: Greg KH <gregkh@linuxfoundation.org>
> > > > Sent: Thursday, July 14, 2022 10:24 AM
> > > > To: Shenwei Wang <shenwei.wang@nxp.com>
> > > > Cc: linux-serial@vger.kernel.org
> > > > Subject: Re: [EXT] Re: [PATCH V1 1/1] serial: fsl_lpuart: zero out
> > > > parity bit in CS7 mode
> > > >
> > > > Caution: EXT Email
> > > >
> > > > On Thu, Jul 14, 2022 at 03:11:35PM +0000, Shenwei Wang wrote:
> > > > >
> > > > >
> > > > > > -----Original Message-----
> > > > > > From: Greg KH <gregkh@linuxfoundation.org>
> > > > > > Sent: Thursday, July 14, 2022 9:31 AM
> > > > > > To: Shenwei Wang <shenwei.wang@nxp.com>
> > > > > > Cc: linux-serial@vger.kernel.org
> > > > > > Subject: [EXT] Re: [PATCH V1 1/1] serial: fsl_lpuart: zero out
> > > > > > parity bit in CS7 mode
> > > > > >
> > > > > > Caution: EXT Email
> > > > > >
> > > > > > On Fri, Jul 08, 2022 at 02:58:00PM -0500, shenwei.wang@nxp.com wrote:
> > > > > > > The LPUART hardware doesn't zero out the parity bit on the
> > > > > > > received characters. This behavior won't impact the use cases
> > > > > > > of
> > > > > > > CS8 because the parity bit is the 9th bit which is not
> > > > > > > currently used by
> > > > software.
> > > > > > > But the parity bit for CS7 must be zeroed out by software in
> > > > > > > order to get the correct raw data.
> > > > > > >
> > > > > > > Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
> > > > > >
> > > > > > What commit id does this fix?
> > > > >
> > > > > The issue should have been there since the driver was written. As
> > > > > the CS7
> > > > mode was rarely used, we didn't notice the problem in the driver before.
> > > >
> > > > So should this be backported to older stable kernels?
> > > >
> > >
> > > Yes, that would be great.
> >
> > Great, properly label it as such when you resend this.
>
> This is my first time to handle this kind of label. Can you let me know how to label it for older stable kernels?
Please read:
https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html
It should explain it fully, if not, please let me know.
thanks,
greg k-h
next prev parent reply other threads:[~2022-07-14 15:56 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-08 19:58 [PATCH V1 1/1] serial: fsl_lpuart: zero out parity bit in CS7 mode shenwei.wang
2022-07-14 14:31 ` Greg KH
2022-07-14 14:53 ` [EXT] " Shenwei Wang
2022-07-14 14:31 ` Greg KH
2022-07-14 15:11 ` [EXT] " Shenwei Wang
2022-07-14 15:24 ` Greg KH
2022-07-14 15:26 ` Shenwei Wang
2022-07-14 15:30 ` Greg KH
2022-07-14 15:50 ` Shenwei Wang
2022-07-14 15:56 ` Greg KH [this message]
2022-07-14 14:32 ` Greg KH
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