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From: Greg KH <gregkh@linuxfoundation.org>
To: shenwei.wang@nxp.com
Cc: linux-serial@vger.kernel.org
Subject: Re: [PATCH V1 1/1] serial: fsl_lpuart: zero out parity bit in CS7 mode
Date: Thu, 14 Jul 2022 16:31:10 +0200	[thread overview]
Message-ID: <YtAorn/GVtoTRkdO@kroah.com> (raw)
In-Reply-To: <20220708195800.325933-1-shenwei.wang@nxp.com>

On Fri, Jul 08, 2022 at 02:58:00PM -0500, shenwei.wang@nxp.com wrote:
> The LPUART hardware doesn't zero out the parity bit on the received
> characters. This behavior won't impact the use cases of CS8 because
> the parity bit is the 9th bit which is not currently used by software.
> But the parity bit for CS7 must be zeroed out by software in order to
> get the correct raw data.
> 
> Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
> ---
> changes in v1
> - fix the code indent and whitespace issue;

Normal patches start numbering at v1 :)

>  drivers/tty/serial/fsl_lpuart.c | 26 ++++++++++++++++++++++++--
>  1 file changed, 24 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
> index 8fe0494d4057b..a8f59fb27c825 100644
> --- a/drivers/tty/serial/fsl_lpuart.c
> +++ b/drivers/tty/serial/fsl_lpuart.c
> @@ -274,6 +274,8 @@ struct lpuart_port {
>  	int			rx_dma_rng_buf_len;
>  	unsigned int		dma_tx_nents;
>  	wait_queue_head_t	dma_wait;
> +	bool			is_cs7; /* Set to true when character size is 7 */
> +					/* and the parity is enabled		*/
>  };
> 
>  struct lpuart_soc_data {
> @@ -1022,6 +1024,9 @@ static void lpuart32_rxint(struct lpuart_port *sport)
>  				flg = TTY_OVERRUN;
>  		}
> 
> +		if (sport->is_cs7)
> +			rx &= 0x7F;
> +
>  		if (tty_insert_flip_char(port, rx, flg) == 0)
>  			sport->port.icount.buf_overrun++;
>  	}
> @@ -1107,6 +1112,17 @@ static void lpuart_handle_sysrq(struct lpuart_port *sport)
>  	}
>  }
> 
> +static inline int lpuart_tty_insert_flip_string(struct tty_port *port,
> +	unsigned char *chars, size_t size, bool is_cs7)

Why inline?  Don't do that unless it is measurable with and without it,
good compilers will guess this correctly.

thanks,

greg k-h

  reply	other threads:[~2022-07-14 14:31 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-08 19:58 [PATCH V1 1/1] serial: fsl_lpuart: zero out parity bit in CS7 mode shenwei.wang
2022-07-14 14:31 ` Greg KH [this message]
2022-07-14 14:53   ` [EXT] " Shenwei Wang
2022-07-14 14:31 ` Greg KH
2022-07-14 15:11   ` [EXT] " Shenwei Wang
2022-07-14 15:24     ` Greg KH
2022-07-14 15:26       ` Shenwei Wang
2022-07-14 15:30         ` Greg KH
2022-07-14 15:50           ` Shenwei Wang
2022-07-14 15:56             ` Greg KH
2022-07-14 14:32 ` Greg KH

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