* [PATCH v3] tty: serial: msm_serial: avoid system lockup condition
From: Jorge Ramirez-Ortiz @ 2019-06-10 17:23 UTC (permalink / raw)
To: jorge.ramirez-ortiz, gregkh, agross, david.brown, jslaby
Cc: linux-arm-msm, linux-serial, linux-kernel, khasim.mohammed,
bjorn.andersson
The function msm_wait_for_xmitr can be taken with interrupts
disabled. In order to avoid a potential system lockup - demonstrated
under stress testing conditions on SoC QCS404/5 - make sure we wait
for a bounded amount of time.
Tested on SoC QCS404.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
---
v2: fix exit condition (timeout --> !timeout)
v3: add these clarification messages
drivers/tty/serial/msm_serial.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c
index 23833ad952ba..3657a24913fc 100644
--- a/drivers/tty/serial/msm_serial.c
+++ b/drivers/tty/serial/msm_serial.c
@@ -383,10 +383,14 @@ static void msm_request_rx_dma(struct msm_port *msm_port, resource_size_t base)
static inline void msm_wait_for_xmitr(struct uart_port *port)
{
+ unsigned int timeout = 500000;
+
while (!(msm_read(port, UART_SR) & UART_SR_TX_EMPTY)) {
if (msm_read(port, UART_ISR) & UART_ISR_TX_READY)
break;
udelay(1);
+ if (!timeout--)
+ break;
}
msm_write(port, UART_CR_CMD_RESET_TX_READY, UART_CR);
}
--
2.21.0
^ permalink raw reply related
* Re: [PATCH 2/2] serial: uartps: Use the same dynamin major number for all ports
From: Greg KH @ 2019-06-10 17:13 UTC (permalink / raw)
To: Michal Simek
Cc: linux-kernel, monstr, johan, Shubhrajyoti Datta, Jiri Slaby,
linux-serial, linux-arm-kernel
In-Reply-To: <381ea608440345a4424d24296666b2451b1a20ee.1560156294.git.michal.simek@xilinx.com>
On Mon, Jun 10, 2019 at 10:44:56AM +0200, Michal Simek wrote:
> From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
>
> Let kernel to find out major number dynamically for the first device and
> then reuse it for other instances.
> This fixes the issue that each uart is registered with a
> different major number.
>
> After the patch:
> crw------- 1 root root 253, 0 Jun 10 08:31 /dev/ttyPS0
> crw--w---- 1 root root 253, 1 Jan 1 1970 /dev/ttyPS1
>
> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
> drivers/tty/serial/xilinx_uartps.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
Does not apply without patch 1/2, so dropping it from my queue.
Which is ALWAYS a good reason why you should submit bug fixes or other
things before code cleanup patches.
thanks,
greg k-h
^ permalink raw reply
* Re: [PATCH v2] tty: serial: msm_serial: avoid system lockup condition
From: Greg KH @ 2019-06-10 17:05 UTC (permalink / raw)
To: Jorge Ramirez-Ortiz
Cc: agross, david.brown, jslaby, linux-arm-msm, linux-serial,
linux-kernel, khasim.mohammed, bjorn.andersson
In-Reply-To: <20190610075554.24979-1-jorge.ramirez-ortiz@linaro.org>
On Mon, Jun 10, 2019 at 09:55:54AM +0200, Jorge Ramirez-Ortiz wrote:
> The function msm_wait_for_xmitr can be taken with interrupts
> disabled. In order to avoid a potential system lockup - demonstrated
> under stress testing conditions on SoC QCS404/5 - make sure we wait
> for a bounded amount of time.
>
> Tested on SoC QCS404.
>
> Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
> ---
> drivers/tty/serial/msm_serial.c | 4 ++++
> 1 file changed, 4 insertions(+)
What changed from v1? Always put that below the --- line.
v3 please.
thanks,
greg k-h
^ permalink raw reply
* Re: [PATCH] serial: Fix an invalid comparing statement
From: Greg Kroah-Hartman @ 2019-06-10 16:56 UTC (permalink / raw)
To: Sugaya Taichi
Cc: Jiri Slaby, Takao Orito, Kazuhiro Kasai, Shinji Kanematsu,
Jassi Brar, Masami Hiramatsu, linux-kernel, linux-serial
In-Reply-To: <1558933288-30023-1-git-send-email-sugaya.taichi@socionext.com>
On Mon, May 27, 2019 at 02:01:27PM +0900, Sugaya Taichi wrote:
> Drop the if-statement which refers to 8th bit field of u8 variable.
> The bit field is no longer used.
>
> Fixes: ba44dc043004 ("serial: Add Milbeaut serial control")
> Reported-by: Colin Ian King <colin.king@canonical.com>
> Signed-off-by: Sugaya Taichi <sugaya.taichi@socionext.com>
> ---
> drivers/tty/serial/milbeaut_usio.c | 15 +++++----------
> 1 file changed, 5 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/tty/serial/milbeaut_usio.c b/drivers/tty/serial/milbeaut_usio.c
> index 949ab7e..d7207ab 100644
> --- a/drivers/tty/serial/milbeaut_usio.c
> +++ b/drivers/tty/serial/milbeaut_usio.c
> @@ -56,7 +56,6 @@
> #define MLB_USIO_SSR_FRE BIT(4)
> #define MLB_USIO_SSR_PE BIT(5)
> #define MLB_USIO_SSR_REC BIT(7)
> -#define MLB_USIO_SSR_BRK BIT(8)
> #define MLB_USIO_FCR_FE1 BIT(0)
> #define MLB_USIO_FCR_FE2 BIT(1)
> #define MLB_USIO_FCR_FCL1 BIT(2)
> @@ -180,18 +179,14 @@ static void mlb_usio_rx_chars(struct uart_port *port)
> if (status & MLB_USIO_SSR_ORE)
> port->icount.overrun++;
> status &= port->read_status_mask;
> - if (status & MLB_USIO_SSR_BRK) {
> - flag = TTY_BREAK;
> + if (status & MLB_USIO_SSR_PE) {
> + flag = TTY_PARITY;
> ch = 0;
> } else
> - if (status & MLB_USIO_SSR_PE) {
> - flag = TTY_PARITY;
> + if (status & MLB_USIO_SSR_FRE) {
> + flag = TTY_FRAME;
> ch = 0;
> - } else
> - if (status & MLB_USIO_SSR_FRE) {
> - flag = TTY_FRAME;
> - ch = 0;
> - }
> + }
> if (flag)
> uart_insert_char(port, status, MLB_USIO_SSR_ORE,
> ch, flag);
While the code never actually supported Break, you are explicitly
removing that logic now. So shouldn't you instead _fix_ break handling?
The code before and after your change does not work any differently, so
this patch isn't really needed at this point.
thanks,
greg k-h
^ permalink raw reply
* Re: [patch 1/5] AST2500 DMA UART driver
From: Greg KH @ 2019-06-10 16:50 UTC (permalink / raw)
To: sudheer.v
Cc: mark.rutland, devicetree, sudheer.veliseti, linux-aspeed, andrew,
benh, shivahshankar.shankarnarayanrao, robh+dt, joel,
linux-serial, jslaby, mchehab+samsung, linux-arm-kernel,
sudheer Kumar veliseti
In-Reply-To: <1559737395-28542-2-git-send-email-open.sudheer@gmail.com>
On Wed, Jun 05, 2019 at 05:53:11PM +0530, sudheer.v wrote:
> +
> +#define CONFIG_UART_DMA_DEBUG
> +
> +#ifdef CONFIG_UART_DMA_DEBUG
> +#define UART_DBG(fmt, args...) pr_debug("%s() " fmt, __func__, ## args)
> +#else
> +#define UART_DBG(fmt, args...)
> +#endif
> +
> +#define CONFIG_UART_TX_DMA_DEBUG 1
> +
> +#ifdef CONFIG_UART_TX_DMA_DEBUG
> +#define UART_TX_DBG(fmt, args...) pr_debug("%s()"fmt, __func__, ## args)
> +#else
> +#define UART_TX_DBG(fmt, args...)
> +#endif
Why have you left debugging on here?
Why does your tiny driver have custom debug macros? Please always use
the in-kernel standard ones so you can dynamically enable/disable them
as needed without having to rebuild the code.
I stopped reading here, sorry.
greg k-h
^ permalink raw reply
* Re: [patch 1/5] AST2500 DMA UART driver
From: Greg KH @ 2019-06-10 16:49 UTC (permalink / raw)
To: sudheer.v
Cc: mark.rutland, devicetree, sudheer.veliseti, linux-aspeed, andrew,
benh, shivahshankar.shankarnarayanrao, robh+dt, joel,
linux-serial, jslaby, mchehab+samsung, linux-arm-kernel,
sudheer Kumar veliseti
In-Reply-To: <1559737395-28542-2-git-send-email-open.sudheer@gmail.com>
On Wed, Jun 05, 2019 at 05:53:11PM +0530, sudheer.v wrote:
> From: sudheer Kumar veliseti <sudheer.open@gmail.com>
>
> Signed-off-by: sudheer veliseti <sudheer.open@gmail.com>
> ---
I can not take a patch without any changelog text at all, especially for
one that is 1928 lines long :(
Please provide a proper changelog and I will be glad to review it.
thanks,
greg k-h
^ permalink raw reply
* Re: [PATCH 04/10] serial: stm32: add pm_runtime support
From: Greg Kroah-Hartman @ 2019-06-10 16:48 UTC (permalink / raw)
To: Erwan Le Ray
Cc: Jiri Slaby, Maxime Coquelin, Alexandre Torgue, Rob Herring,
Mark Rutland, linux-serial, linux-stm32, linux-arm-kernel,
linux-kernel, devicetree, Fabrice Gasnier, Bich Hemon
In-Reply-To: <1559638519-6128-5-git-send-email-erwan.leray@st.com>
On Tue, Jun 04, 2019 at 10:55:13AM +0200, Erwan Le Ray wrote:
> Use pm_runtime for clock management.
>
> Signed-off-by: Bich Hemon <bich.hemon@st.com>
> Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Does not apply to my tree :(
^ permalink raw reply
* Re: [PATCH 00/10] STM32 usart power improvements
From: Alexandre Torgue @ 2019-06-10 16:00 UTC (permalink / raw)
To: Erwan Le Ray, Greg Kroah-Hartman, Jiri Slaby, Maxime Coquelin,
Rob Herring, Mark Rutland
Cc: linux-serial, linux-stm32, linux-arm-kernel, linux-kernel,
devicetree, Fabrice Gasnier
In-Reply-To: <1559638519-6128-1-git-send-email-erwan.leray@st.com>
Hi Erwan,
On 6/4/19 10:55 AM, Erwan Le Ray wrote:
> This series delivers power improvements for stm32-usart driver.
>
> Bich Hemon (4):
> dt-bindings: serial: add optional pinctrl states
> serial: stm32: select pinctrl state in each suspend/resume function
> ARM: dts: stm32: Update pin states for uart4 on stm32mp157c-ed1
> ARM: dts: stm32: Update UART4 pin states on stm32mp157a-dk1
>
> Erwan Le Ray (6):
> dt-bindings: serial: stm32: add wakeup option
> serial: stm32: add pm_runtime support
> serial: stm32: Use __maybe_unused instead of #if CONFIG_PM_SLEEP
> serial: stm32: add support for no_console_suspend
> ARM: dts: stm32: update uart4 pin configurations for low power
> ARM: dts: stm32: add wakeup capability on each usart/uart on
> stm32mp157c
>
> .../devicetree/bindings/serial/st,stm32-usart.txt | 19 ++++-
> arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 17 +++++
> arch/arm/boot/dts/stm32mp157a-dk1.dts | 5 +-
> arch/arm/boot/dts/stm32mp157c-ed1.dts | 5 +-
> arch/arm/boot/dts/stm32mp157c.dtsi | 40 ++++++++--
> drivers/tty/serial/stm32-usart.c | 88 ++++++++++++++++++++--
> drivers/tty/serial/stm32-usart.h | 1 +
> 7 files changed, 155 insertions(+), 20 deletions(-)
>
I'll merge device tree part into stm32-next branch when binding part
will be accepted.
regards
Alex
^ permalink raw reply
* Re: [PATCH 1/2] serial: xilinx_uartps: Fix warnings in the driver
From: Greg KH @ 2019-06-10 15:12 UTC (permalink / raw)
To: Michal Simek
Cc: linux-kernel, monstr, johan, Nava kishore Manne, Jiri Slaby,
linux-serial, linux-arm-kernel
In-Reply-To: <888c7d0a-28dc-978c-662a-e96ee3863c41@xilinx.com>
On Mon, Jun 10, 2019 at 05:06:57PM +0200, Michal Simek wrote:
> On 10. 06. 19 16:44, Greg KH wrote:
> > On Mon, Jun 10, 2019 at 10:44:55AM +0200, Michal Simek wrote:
> >> From: Nava kishore Manne <nava.manne@xilinx.com>
> >>
> >> This patch fixes the below warning
> >>
> >> -->Symbolic permissions 'S_IRUGO' are not preferred.
> >> Consider using octal permissions '0444'.
> >> -->macros should not use a trailing semicolon.
> >> -->line over 80 characters.
> >> -->void function return statements are not generally useful.
> >> -->Prefer 'unsigned int' to bare use of 'unsigned'.
> >>
> >> Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> >> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> >> ---
> >>
> >> Happy to split it if needed.
> >
> > Please split. Do not do more than one "logical thing" per patch.
> >
> > And the subject is not correct, there are no general "warnings", these
> > are all checkpatch warnings, not a build issue.
>
> ok. Will do. Any issue with second patch?
It will change your user/kernel api but hey, it's your call, it looks
like a nice fix to me :)
thanks,
greg k-h
^ permalink raw reply
* Re: [PATCH 1/2] serial: xilinx_uartps: Fix warnings in the driver
From: Michal Simek @ 2019-06-10 15:06 UTC (permalink / raw)
To: Greg KH, Michal Simek
Cc: linux-kernel, monstr, johan, Nava kishore Manne, Jiri Slaby,
linux-serial, linux-arm-kernel
In-Reply-To: <20190610144425.GC31086@kroah.com>
On 10. 06. 19 16:44, Greg KH wrote:
> On Mon, Jun 10, 2019 at 10:44:55AM +0200, Michal Simek wrote:
>> From: Nava kishore Manne <nava.manne@xilinx.com>
>>
>> This patch fixes the below warning
>>
>> -->Symbolic permissions 'S_IRUGO' are not preferred.
>> Consider using octal permissions '0444'.
>> -->macros should not use a trailing semicolon.
>> -->line over 80 characters.
>> -->void function return statements are not generally useful.
>> -->Prefer 'unsigned int' to bare use of 'unsigned'.
>>
>> Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>> ---
>>
>> Happy to split it if needed.
>
> Please split. Do not do more than one "logical thing" per patch.
>
> And the subject is not correct, there are no general "warnings", these
> are all checkpatch warnings, not a build issue.
ok. Will do. Any issue with second patch?
Thanks,
Michal
^ permalink raw reply
* Re: [PATCH 1/2] serial: xilinx_uartps: Fix warnings in the driver
From: Greg KH @ 2019-06-10 14:44 UTC (permalink / raw)
To: Michal Simek
Cc: linux-kernel, monstr, johan, Nava kishore Manne, Jiri Slaby,
linux-serial, linux-arm-kernel
In-Reply-To: <c6753260caf8b20cc002b15fcbf22b759c91d760.1560156294.git.michal.simek@xilinx.com>
On Mon, Jun 10, 2019 at 10:44:55AM +0200, Michal Simek wrote:
> From: Nava kishore Manne <nava.manne@xilinx.com>
>
> This patch fixes the below warning
>
> -->Symbolic permissions 'S_IRUGO' are not preferred.
> Consider using octal permissions '0444'.
> -->macros should not use a trailing semicolon.
> -->line over 80 characters.
> -->void function return statements are not generally useful.
> -->Prefer 'unsigned int' to bare use of 'unsigned'.
>
> Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
> Happy to split it if needed.
Please split. Do not do more than one "logical thing" per patch.
And the subject is not correct, there are no general "warnings", these
are all checkpatch warnings, not a build issue.
thanks,
greg k-h
^ permalink raw reply
* Re: [PATCH] serial: Fix an invalid comparing statement
From: Sugaya, Taichi @ 2019-06-10 11:31 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Colin Ian King
Cc: Takao Orito, Kazuhiro Kasai, Shinji Kanematsu, Jassi Brar,
Masami Hiramatsu, linux-kernel, linux-serial
In-Reply-To: <1558933288-30023-1-git-send-email-sugaya.taichi@socionext.com>
Hi
Does anyone have comments?
On 2019/05/27 14:01, Sugaya Taichi wrote:
> Drop the if-statement which refers to 8th bit field of u8 variable.
> The bit field is no longer used.
>
> Fixes: ba44dc043004 ("serial: Add Milbeaut serial control")
> Reported-by: Colin Ian King <colin.king@canonical.com>
> Signed-off-by: Sugaya Taichi <sugaya.taichi@socionext.com>
> ---
> drivers/tty/serial/milbeaut_usio.c | 15 +++++----------
> 1 file changed, 5 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/tty/serial/milbeaut_usio.c b/drivers/tty/serial/milbeaut_usio.c
> index 949ab7e..d7207ab 100644
> --- a/drivers/tty/serial/milbeaut_usio.c
> +++ b/drivers/tty/serial/milbeaut_usio.c
> @@ -56,7 +56,6 @@
> #define MLB_USIO_SSR_FRE BIT(4)
> #define MLB_USIO_SSR_PE BIT(5)
> #define MLB_USIO_SSR_REC BIT(7)
> -#define MLB_USIO_SSR_BRK BIT(8)
> #define MLB_USIO_FCR_FE1 BIT(0)
> #define MLB_USIO_FCR_FE2 BIT(1)
> #define MLB_USIO_FCR_FCL1 BIT(2)
> @@ -180,18 +179,14 @@ static void mlb_usio_rx_chars(struct uart_port *port)
> if (status & MLB_USIO_SSR_ORE)
> port->icount.overrun++;
> status &= port->read_status_mask;
> - if (status & MLB_USIO_SSR_BRK) {
> - flag = TTY_BREAK;
> + if (status & MLB_USIO_SSR_PE) {
> + flag = TTY_PARITY;
> ch = 0;
> } else
> - if (status & MLB_USIO_SSR_PE) {
> - flag = TTY_PARITY;
> + if (status & MLB_USIO_SSR_FRE) {
> + flag = TTY_FRAME;
> ch = 0;
> - } else
> - if (status & MLB_USIO_SSR_FRE) {
> - flag = TTY_FRAME;
> - ch = 0;
> - }
> + }
> if (flag)
> uart_insert_char(port, status, MLB_USIO_SSR_ORE,
> ch, flag);
>
^ permalink raw reply
* [PATCH 2/2] serial: uartps: Use the same dynamin major number for all ports
From: Michal Simek @ 2019-06-10 8:44 UTC (permalink / raw)
To: linux-kernel, monstr, michal.simek, johan, gregkh
Cc: Shubhrajyoti Datta, Jiri Slaby, linux-serial, linux-arm-kernel
In-Reply-To: <c6753260caf8b20cc002b15fcbf22b759c91d760.1560156294.git.michal.simek@xilinx.com>
From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Let kernel to find out major number dynamically for the first device and
then reuse it for other instances.
This fixes the issue that each uart is registered with a
different major number.
After the patch:
crw------- 1 root root 253, 0 Jun 10 08:31 /dev/ttyPS0
crw--w---- 1 root root 253, 1 Jan 1 1970 /dev/ttyPS1
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/tty/serial/xilinx_uartps.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
index 6af2886f5ba7..a0b51c60faeb 100644
--- a/drivers/tty/serial/xilinx_uartps.c
+++ b/drivers/tty/serial/xilinx_uartps.c
@@ -29,12 +29,12 @@
#define CDNS_UART_TTY_NAME "ttyPS"
#define CDNS_UART_NAME "xuartps"
-#define CDNS_UART_MAJOR 0 /* use dynamic node allocation */
#define CDNS_UART_FIFO_SIZE 64 /* FIFO size */
#define CDNS_UART_REGISTER_SPACE 0x1000
/* Rx Trigger level */
static int rx_trigger_level = 56;
+static int uartps_major;
module_param(rx_trigger_level, uint, 0444);
MODULE_PARM_DESC(rx_trigger_level, "Rx trigger level, 1-63 bytes");
@@ -1516,7 +1516,7 @@ static int cdns_uart_probe(struct platform_device *pdev)
cdns_uart_uart_driver->owner = THIS_MODULE;
cdns_uart_uart_driver->driver_name = driver_name;
cdns_uart_uart_driver->dev_name = CDNS_UART_TTY_NAME;
- cdns_uart_uart_driver->major = CDNS_UART_MAJOR;
+ cdns_uart_uart_driver->major = uartps_major;
cdns_uart_uart_driver->minor = cdns_uart_data->id;
cdns_uart_uart_driver->nr = 1;
@@ -1545,6 +1545,7 @@ static int cdns_uart_probe(struct platform_device *pdev)
goto err_out_id;
}
+ uartps_major = cdns_uart_uart_driver->tty_driver->major;
cdns_uart_data->cdns_uart_driver = cdns_uart_uart_driver;
/*
--
2.17.1
^ permalink raw reply related
* [PATCH 1/2] serial: xilinx_uartps: Fix warnings in the driver
From: Michal Simek @ 2019-06-10 8:44 UTC (permalink / raw)
To: linux-kernel, monstr, michal.simek, johan, gregkh
Cc: Nava kishore Manne, Jiri Slaby, linux-serial, linux-arm-kernel
From: Nava kishore Manne <nava.manne@xilinx.com>
This patch fixes the below warning
-->Symbolic permissions 'S_IRUGO' are not preferred.
Consider using octal permissions '0444'.
-->macros should not use a trailing semicolon.
-->line over 80 characters.
-->void function return statements are not generally useful.
-->Prefer 'unsigned int' to bare use of 'unsigned'.
Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Happy to split it if needed.
---
drivers/tty/serial/xilinx_uartps.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
index 605354fd60b1..6af2886f5ba7 100644
--- a/drivers/tty/serial/xilinx_uartps.c
+++ b/drivers/tty/serial/xilinx_uartps.c
@@ -35,12 +35,12 @@
/* Rx Trigger level */
static int rx_trigger_level = 56;
-module_param(rx_trigger_level, uint, S_IRUGO);
+module_param(rx_trigger_level, uint, 0444);
MODULE_PARM_DESC(rx_trigger_level, "Rx trigger level, 1-63 bytes");
/* Rx Timeout */
static int rx_timeout = 10;
-module_param(rx_timeout, uint, S_IRUGO);
+module_param(rx_timeout, uint, 0444);
MODULE_PARM_DESC(rx_timeout, "Rx timeout, 1-255");
/* Register offsets for the UART. */
@@ -199,7 +199,7 @@ struct cdns_platform_data {
u32 quirks;
};
#define to_cdns_uart(_nb) container_of(_nb, struct cdns_uart, \
- clk_rate_change_nb);
+ clk_rate_change_nb)
/**
* cdns_uart_handle_rx - Handle the received bytes along with Rx errors.
@@ -312,7 +312,8 @@ static void cdns_uart_handle_tx(void *dev_id)
} else {
numbytes = port->fifosize;
while (numbytes && !uart_circ_empty(&port->state->xmit) &&
- !(readl(port->membase + CDNS_UART_SR) & CDNS_UART_SR_TXFULL)) {
+ !(readl(port->membase + CDNS_UART_SR) &
+ CDNS_UART_SR_TXFULL)) {
/*
* Get the data from the UART circular buffer
* and write it to the cdns_uart's TX_FIFO
@@ -1073,8 +1074,6 @@ static void cdns_uart_poll_put_char(struct uart_port *port, unsigned char c)
cpu_relax();
spin_unlock_irqrestore(&port->lock, flags);
-
- return;
}
#endif
--
2.17.1
^ permalink raw reply related
* [PATCH v2] tty: serial: msm_serial: avoid system lockup condition
From: Jorge Ramirez-Ortiz @ 2019-06-10 7:55 UTC (permalink / raw)
To: jorge.ramirez-ortiz, agross, david.brown, gregkh, jslaby
Cc: linux-arm-msm, linux-serial, linux-kernel, khasim.mohammed,
bjorn.andersson
The function msm_wait_for_xmitr can be taken with interrupts
disabled. In order to avoid a potential system lockup - demonstrated
under stress testing conditions on SoC QCS404/5 - make sure we wait
for a bounded amount of time.
Tested on SoC QCS404.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
---
drivers/tty/serial/msm_serial.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c
index 23833ad952ba..3657a24913fc 100644
--- a/drivers/tty/serial/msm_serial.c
+++ b/drivers/tty/serial/msm_serial.c
@@ -383,10 +383,14 @@ static void msm_request_rx_dma(struct msm_port *msm_port, resource_size_t base)
static inline void msm_wait_for_xmitr(struct uart_port *port)
{
+ unsigned int timeout = 500000;
+
while (!(msm_read(port, UART_SR) & UART_SR_TX_EMPTY)) {
if (msm_read(port, UART_ISR) & UART_ISR_TX_READY)
break;
udelay(1);
+ if (!timeout--)
+ break;
}
msm_write(port, UART_CR_CMD_RESET_TX_READY, UART_CR);
}
--
2.21.0
^ permalink raw reply related
* [PATCH] tty: serial: msm_serial: avoid system lockup condition
From: Jorge Ramirez-Ortiz @ 2019-06-10 7:37 UTC (permalink / raw)
To: jorge.ramirez-ortiz, agross, david.brown, gregkh, jslaby
Cc: linux-arm-msm, linux-serial, linux-kernel, khasim.mohammed,
bjorn.andersson
The function msm_wait_for_xmitr can be taken with interrupts
disabled. In order to avoid a potential system lockup - demonstrated
under stress testing conditions on SoC QCS404/5 - make sure we wait
for a bounded amount of time.
Tested on SoC QCS404.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
---
drivers/tty/serial/msm_serial.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c
index 23833ad952ba..0d4f1fe2b3a2 100644
--- a/drivers/tty/serial/msm_serial.c
+++ b/drivers/tty/serial/msm_serial.c
@@ -383,10 +383,14 @@ static void msm_request_rx_dma(struct msm_port *msm_port, resource_size_t base)
static inline void msm_wait_for_xmitr(struct uart_port *port)
{
+ unsigned int timeout = 500000;
+
while (!(msm_read(port, UART_SR) & UART_SR_TX_EMPTY)) {
if (msm_read(port, UART_ISR) & UART_ISR_TX_READY)
break;
udelay(1);
+ if (timeout--)
+ break;
}
msm_write(port, UART_CR_CMD_RESET_TX_READY, UART_CR);
}
--
2.21.0
^ permalink raw reply related
* Re: [PATCH 3/6] arm64: dts: ti: Add Support for J721E SoC
From: Suman Anna @ 2019-06-07 20:58 UTC (permalink / raw)
To: Nishanth Menon, Arnd Bergmann, Olof Johansson, Santosh Shilimkar,
Will Deacon, Catalin Marinas, Greg Kroah-Hartman, Mark Rutland,
Rob Herring
Cc: linux-serial, linux-kernel, devicetree, linux-arm-kernel,
Tony Lindgren, Russell King, Tero Kristo
In-Reply-To: <20190522161921.20750-4-nm@ti.com>
Hi Nishanth, Tero,
On 5/22/19 11:19 AM, Nishanth Menon wrote:
> The J721E SoC belongs to the K3 Multicore SoC architecture platform,
> providing advanced system integration to enable lower system costs
> of automotive applications such as infotainment, cluster, premium
> Audio, Gateway, industrial and a range of broad market applications.
> This SoC is designed around reducing the system cost by eliminating
> the need of an external system MCU and is targeted towards ASIL-B/C
> certification/requirements in addition to allowing complex software
> and system use-cases.
>
> Some highlights of this SoC are:
> * Dual Cortex-A72s in a single cluster, three clusters of lockstep
> capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA),
> C7x floating point Vector DSP, Two C66x floating point DSPs.
> * 3D GPU PowerVR Rogue 8XE GE8430
> * Vision Processing Accelerator (VPAC) with image signal processor and Depth
> and Motion Processing Accelerator (DMPAC)
> * Two Gigabit Industrial Communication Subsystems (ICSSG), each with dual
> PRUs and dual RTUs
> * Two CSI2.0 4L RX plus one CSI2.0 4L TX, one eDP/DP, One DSI Tx, and
> up to two DPI interfaces.
> * Integrated Ethernet switch supporting up to a total of 8 external ports in
> addition to legacy Ethernet switch of up to 2 ports.
> * System MMU (SMMU) Version 3.0 and advanced virtualisation
> capabilities.
> * Upto 4 PCIe-GEN3 controllers, 2 USB3.0 Dual-role device subsystems,
> 16 MCANs, 12 McASP, eMMC and SD, UFS, OSPI/HyperBus memory controller, QSPI,
> I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals.
> * Two hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
> management.
> * Configurable L3 Cache and IO-coherent architecture with high data throughput
> capable distributed DMA architecture under NAVSS
> * Centralized System Controller for Security, Power, and Resource
> Management (DMSC)
>
> See J721E Technical Reference Manual (SPRUIL1, May 2019)
> for further details: http://www.ti.com/lit/pdf/spruil1
>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 202 ++++++++++++++++++
> .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 72 +++++++
> arch/arm64/boot/dts/ti/k3-j721e.dtsi | 176 +++++++++++++++
> 3 files changed, 450 insertions(+)
> create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-j721e.dtsi
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> new file mode 100644
> index 000000000000..d42912044a5d
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> @@ -0,0 +1,202 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for J721E SoC Family Main Domain peripherals
> + *
> + * Copyright (C) 2016-2019 Texas Instruments Incorporated - http://www.ti.com/
> + */
> +
> +&cbass_main {
> + msmc_ram: sram@70000000 {
> + compatible = "mmio-sram";
> + reg = <0x0 0x70000000 0x0 0x800000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x0 0x70000000 0x800000>;
> +
> + atf-sram@0 {
> + reg = <0x0 0x20000>;
> + };
> + };
> +
> + gic500: interrupt-controller@1800000 {
> + compatible = "arm,gic-v3";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> + #interrupt-cells = <3>;
> + interrupt-controller;
> + reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
> + <0x00 0x01900000 0x00 0x100000>; /* GICR */
> +
> + /* vcpumntirq: virtual CPU interface maintenance interrupt */
> + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> +
> + gic_its: gic-its@18200000 {
> + compatible = "arm,gic-v3-its";
> + reg = <0x00 0x01820000 0x00 0x10000>;
> + socionext,synquacer-pre-its = <0x1000000 0x400000>;
> + msi-controller;
> + #msi-cells = <1>;
> + };
> + };
> +
> + smmu0: smmu@36600000 {
> + compatible = "arm,smmu-v3";
> + reg = <0x0 0x36600000 0x0 0x100000>;
> + interrupt-parent = <&gic500>;
> + interrupts = <GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "eventq", "gerror";
> + #iommu-cells = <1>;
> + };
> +
> + secure_proxy_main: mailbox@32c00000 {
> + compatible = "ti,am654-secure-proxy";
> + #mbox-cells = <1>;
> + reg-names = "target_data", "rt", "scfg";
> + reg = <0x00 0x32c00000 0x00 0x100000>,
> + <0x00 0x32400000 0x00 0x100000>,
> + <0x00 0x32800000 0x00 0x100000>;
> + interrupt-names = "rx_011";
> + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + main_pmx0: pinmux@11c000 {
> + compatible = "pinctrl-single";
> + /* Proxy 0 addressing */
> + reg = <0x0 0x11c000 0x0 0x2b4>;
> + #pinctrl-cells = <1>;
> + pinctrl-single,register-width = <32>;
> + pinctrl-single,function-mask = <0xffffffff>;
> + };
> +
> + main_uart0: serial@2800000 {
> + compatible = "ti,j721e-uart", "ti,am654-uart";
> + reg = <0x00 0x02800000 0x00 0x100>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <48000000>;
> + current-speed = <115200>;
> + power-domains = <&k3_pds 146>;
> + clocks = <&k3_clks 146 0>;
> + clock-names = "fclk";
> + };
> +
> + main_uart1: serial@2810000 {
> + compatible = "ti,j721e-uart", "ti,am654-uart";
> + reg = <0x00 0x02810000 0x00 0x100>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <48000000>;
> + current-speed = <115200>;
> + power-domains = <&k3_pds 278>;
> + clocks = <&k3_clks 278 0>;
> + clock-names = "fclk";
> + };
> +
> + main_uart2: serial@2820000 {
> + compatible = "ti,j721e-uart", "ti,am654-uart";
> + reg = <0x00 0x02820000 0x00 0x100>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <48000000>;
> + current-speed = <115200>;
> + power-domains = <&k3_pds 279>;
> + clocks = <&k3_clks 279 0>;
> + clock-names = "fclk";
> + };
> +
> + main_uart3: serial@2830000 {
> + compatible = "ti,j721e-uart", "ti,am654-uart";
> + reg = <0x00 0x02830000 0x00 0x100>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <48000000>;
> + current-speed = <115200>;
> + power-domains = <&k3_pds 280>;
> + clocks = <&k3_clks 280 0>;
> + clock-names = "fclk";
> + };
> +
> + main_uart4: serial@2840000 {
> + compatible = "ti,j721e-uart", "ti,am654-uart";
> + reg = <0x00 0x02840000 0x00 0x100>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <48000000>;
> + current-speed = <115200>;
> + power-domains = <&k3_pds 281>;
> + clocks = <&k3_clks 281 0>;
> + clock-names = "fclk";
> + };
> +
> + main_uart5: serial@2850000 {
> + compatible = "ti,j721e-uart", "ti,am654-uart";
> + reg = <0x00 0x02850000 0x00 0x100>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <48000000>;
> + current-speed = <115200>;
> + power-domains = <&k3_pds 282>;
> + clocks = <&k3_clks 282 0>;
> + clock-names = "fclk";
> + };
> +
> + main_uart6: serial@2860000 {
> + compatible = "ti,j721e-uart", "ti,am654-uart";
> + reg = <0x00 0x02860000 0x00 0x100>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <48000000>;
> + current-speed = <115200>;
> + power-domains = <&k3_pds 283>;
> + clocks = <&k3_clks 283 0>;
> + clock-names = "fclk";
> + };
> +
> + main_uart7: serial@2870000 {
> + compatible = "ti,j721e-uart", "ti,am654-uart";
> + reg = <0x00 0x02870000 0x00 0x100>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <48000000>;
> + current-speed = <115200>;
> + power-domains = <&k3_pds 284>;
> + clocks = <&k3_clks 284 0>;
> + clock-names = "fclk";
> + };
> +
> + main_uart8: serial@2880000 {
> + compatible = "ti,j721e-uart", "ti,am654-uart";
> + reg = <0x00 0x02880000 0x00 0x100>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <48000000>;
> + current-speed = <115200>;
> + power-domains = <&k3_pds 285>;
> + clocks = <&k3_clks 285 0>;
> + clock-names = "fclk";
> + };
> +
> + main_uart9: serial@2890000 {
> + compatible = "ti,j721e-uart", "ti,am654-uart";
> + reg = <0x00 0x02890000 0x00 0x100>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <48000000>;
> + current-speed = <115200>;
> + power-domains = <&k3_pds 286>;
> + clocks = <&k3_clks 286 0>;
> + clock-names = "fclk";
> + };
> +};
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
> new file mode 100644
> index 000000000000..b72e033fa159
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
> @@ -0,0 +1,72 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for J721E SoC Family MCU/WAKEUP Domain peripherals
> + *
> + * Copyright (C) 2016-2019 Texas Instruments Incorporated - http://www.ti.com/
> + */
> +
> +&cbass_mcu_wakeup {
> + dmsc: dmsc@44083000 {
> + compatible = "ti,k2g-sci";
> + ti,host-id = <12>;
> +
> + mbox-names = "rx", "tx";
> +
> + mboxes= <&secure_proxy_main 11>,
> + <&secure_proxy_main 13>;
> +
> + reg-names = "debug_messages";
> + reg = <0x00 0x44083000 0x0 0x1000>;
> +
> + k3_pds: power-controller {
> + compatible = "ti,sci-pm-domain";
> + #power-domain-cells = <1>;
> + };
> +
> + k3_clks: clocks {
> + compatible = "ti,k2g-sci-clk";
> + #clock-cells = <2>;
> + ti,scan-clocks-from-dt;
> + };
> +
> + k3_reset: reset-controller {
> + compatible = "ti,sci-reset";
> + #reset-cells = <2>;
> + };
> + };
> +
> + wkup_pmx0: pinmux@4301c000 {
> + compatible = "pinctrl-single";
> + /* Proxy 0 addressing */
> + reg = <0x00 0x4301c000 0x00 0x178>;
> + #pinctrl-cells = <1>;
> + pinctrl-single,register-width = <32>;
> + pinctrl-single,function-mask = <0xffffffff>;
> + };
> +
> + wkup_uart0: serial@42300000 {
> + compatible = "ti,j721e-uart", "ti,am654-uart";
> + reg = <0x00 0x42300000 0x00 0x100>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <48000000>;
> + current-speed = <115200>;
> + power-domains = <&k3_pds 287>;
> + clocks = <&k3_clks 287 0>;
> + clock-names = "fclk";
> + };
> +
> + mcu_uart0: serial@40a00000 {
> + compatible = "ti,j721e-uart", "ti,am654-uart";
> + reg = <0x00 0x40a00000 0x00 0x100>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + interrupts = <GIC_SPI 846 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <96000000>;
> + current-speed = <115200>;
> + power-domains = <&k3_pds 149>;
> + clocks = <&k3_clks 149 0>;
> + clock-names = "fclk";
> + };
> +};
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi
> new file mode 100644
> index 000000000000..e7c366c98ce1
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi
> @@ -0,0 +1,176 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for J721E SoC Family
> + *
> + * Copyright (C) 2016-2019 Texas Instruments Incorporated - http://www.ti.com/
> + */
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/pinctrl/k3.h>
> +
> +/ {
> + model = "Texas Instruments K3 J721E SoC";
> + compatible = "ti,j721e";
> + interrupt-parent = <&gic500>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + aliases {
> + serial0 = &wkup_uart0;
> + serial1 = &mcu_uart0;
> + serial2 = &main_uart0;
> + serial3 = &main_uart1;
> + serial4 = &main_uart2;
> + serial5 = &main_uart3;
> + serial6 = &main_uart4;
> + serial7 = &main_uart5;
> + serial8 = &main_uart6;
> + serial9 = &main_uart7;
> + serial10 = &main_uart8;
> + serial11 = &main_uart9;
> + };
> +
> + chosen { };
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + cpu-map {
> + cluster0: cluster0 {
> + core0 {
> + cpu = <&cpu0>;
> + };
> +
> + core1 {
> + cpu = <&cpu1>;
> + };
> + };
> +
> + };
> +
> + cpu0: cpu@0 {
> + compatible = "arm,cortex-a72";
> + reg = <0x000>;
> + device_type = "cpu";
> + enable-method = "psci";
> + i-cache-size = <0xC000>;
> + i-cache-line-size = <64>;
> + i-cache-sets = <256>;
> + d-cache-size = <0x8000>;
> + d-cache-line-size = <64>;
> + d-cache-sets = <128>;
> + next-level-cache = <&L2_0>;
> + };
> +
> + cpu1: cpu@1 {
> + compatible = "arm,cortex-a72";
> + reg = <0x001>;
> + device_type = "cpu";
> + enable-method = "psci";
> + i-cache-size = <0xC000>;
> + i-cache-line-size = <64>;
> + i-cache-sets = <256>;
> + d-cache-size = <0x8000>;
> + d-cache-line-size = <64>;
> + d-cache-sets = <128>;
> + next-level-cache = <&L2_0>;
> + };
> + };
> +
> + L2_0: l2-cache0 {
> + compatible = "cache";
> + cache-level = <2>;
> + cache-size = <0x100000>;
> + cache-line-size = <64>;
> + cache-sets = <2048>;
> + next-level-cache = <&msmc_l3>;
> + };
> +
> + msmc_l3: l3-cache0 {
> + compatible = "cache";
> + cache-level = <3>;
> + };
> +
> + firmware {
> + optee {
> + compatible = "linaro,optee-tz";
> + method = "smc";
> + };
> +
> + psci: psci {
> + compatible = "arm,psci-1.0";
> + method = "smc";
> + };
> + };
> +
> + a72_timer0: timer-cl0-cpu0 {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* cntpsirq */
> + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, /* cntpnsirq */
> + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, /* cntvirq */
> + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; /* cnthpirq */
> + };
> +
> + pmu: pmu {
> + compatible = "arm,armv8-pmuv3";
> + /* Recommendation from GIC500 TRM Table A.3 */
> + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + cbass_main: interconnect@100000 {
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
> + <0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */
> + <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
> + <0x00 0x00A40000 0x00 0x00A40000 0x00 0x00000800>, /* timesync router */
> + <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
> + <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
> + <0x00 0x0d000000 0x00 0x0d000000 0x00 0x01000000>, /* PCIe Core*/
> + <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
> + <0x00 0x64800000 0x00 0x64800000 0x00 0x00800000>, /* C71 */
> + <0x4d 0x80800000 0x4d 0x80800000 0x00 0x00800000>, /* C66_0 */
> + <0x4d 0x81800000 0x4d 0x81800000 0x00 0x00800000>, /* C66_1 */
> + <0x4e 0x20000000 0x4e 0x20000000 0x00 0x00080000>, /* GPU */
> + /* MCUSS_WKUP Range */
> + <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
> + <0x00 0x40200000 0x00 0x40200000 0x00 0x00998400>,
> + <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>,
> + <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>,
> + <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>,
> + <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00100000>,
> + <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>,
> + <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>,
> + <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>,
> + <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>,
> + <0x00 0x50000000 0x00 0x50000000 0x00 0x10000000>,
> + <0x00 0x70000000 0x00 0x70000000 0x00 0x00800000>,
minor nit, can we have this MSMC RAM range line moved to before the
MCUSS_WKUP comment since it doesn't belong to the MCUSS range. Perhaps
can be fixed up while applying the patch.
Other than that, everything looks good.
Reviewed-by: Suman Anna <s-anna@ti.com>
regards
Suman
> + <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>,
> + <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>;
> +
> + cbass_mcu_wakeup: interconnect@28380000 {
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>, /* MCU NAVSS*/
> + <0x00 0x40200000 0x00 0x40200000 0x00 0x00998400>, /* First peripheral window */
> + <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, /* CTRL_MMR0 */
> + <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, /* MCU R5F Core0 */
> + <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>, /* MCU R5F Core1 */
> + <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00100000>, /* MCU SRAM */
> + <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>, /* WKUP peripheral window */
> + <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, /* MMRs, remaining NAVSS */
> + <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>, /* CPSW */
> + <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, /* OSPI register space */
> + <0x00 0x50000000 0x00 0x50000000 0x00 0x10000000>, /* FSS OSPI0/1 data region 0 */
> + <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, /* FSS OSPI0 data region 3 */
> + <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>; /* FSS OSPI1 data region 3*/
> + };
> + };
> +};
> +
> +/* Now include the peripherals for each bus segments */
> +#include "k3-j721e-main.dtsi"
> +#include "k3-j721e-mcu-wakeup.dtsi"
>
^ permalink raw reply
* [PATCH v4] serial: stm32: fix a recursive locking in stm32_config_rs485
From: Borut Seljak @ 2019-06-07 10:53 UTC (permalink / raw)
To: erwan.leray
Cc: borut.seljak, Greg Kroah-Hartman, Jiri Slaby, Maxime Coquelin,
Alexandre Torgue, linux-serial, linux-stm32, linux-arm-kernel,
linux-kernel
In-Reply-To: <e0f8d4b2-a622-3758-473b-b78bd8949323@st.com>
Remove spin_lock_irqsave in stm32_config_rs485, it cause recursive locking.
Already locked in uart_set_rs485_config.
Fixes: 1bcda09d291081 ("serial: stm32: add support for RS485 hardware control mode")
Signed-off-by: Borut Seljak <borut.seljak@t-2.net>
---
drivers/tty/serial/stm32-usart.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index e8d7a7bb4339..5d072ec61071 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -105,9 +105,7 @@ static int stm32_config_rs485(struct uart_port *port,
struct stm32_usart_config *cfg = &stm32_port->info->cfg;
u32 usartdiv, baud, cr1, cr3;
bool over8;
- unsigned long flags;
- spin_lock_irqsave(&port->lock, flags);
stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
port->rs485 = *rs485conf;
@@ -147,7 +145,6 @@ static int stm32_config_rs485(struct uart_port *port,
}
stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
- spin_unlock_irqrestore(&port->lock, flags);
return 0;
}
--
2.17.1
^ permalink raw reply related
* Re: [PATCH v3] serial: stm32: fix a recursive locking in stm32_config_rs485
From: Erwan LE RAY @ 2019-06-06 15:48 UTC (permalink / raw)
To: Borut Seljak
Cc: Maxime Coquelin, Alexandre TORGUE, Greg Kroah-Hartman,
linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
Jiri Slaby, linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <20190606101901.31151-1-borut.seljak@t-2.net>
On 6/6/19 12:19 PM, Borut Seljak wrote:
> Remove spin_lock_irqsave in stm32_config_rs485, it cause recursive locking.
> Already locked in uart_set_rs485_config.
>
> fixes: 1bcda09d291081 ("serial: stm32: add support for RS485 hardware control mode")
>
> Signed-off-by: Borut Seljak <borut.seljak@t-2.net>
Hi Borut,
Thanks for your patch.
Acked-by: Erwan Le Ray <erwan.leray@st.com>
Please correct a typo in commit message: "Fixes" instead "fixes"
Erwan.
> ---
> drivers/tty/serial/stm32-usart.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
> index e8d7a7bb4339..5d072ec61071 100644
> --- a/drivers/tty/serial/stm32-usart.c
> +++ b/drivers/tty/serial/stm32-usart.c
> @@ -105,9 +105,7 @@ static int stm32_config_rs485(struct uart_port *port,
> struct stm32_usart_config *cfg = &stm32_port->info->cfg;
> u32 usartdiv, baud, cr1, cr3;
> bool over8;
> - unsigned long flags;
>
> - spin_lock_irqsave(&port->lock, flags);
> stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
>
> port->rs485 = *rs485conf;
> @@ -147,7 +145,6 @@ static int stm32_config_rs485(struct uart_port *port,
> }
>
> stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
> - spin_unlock_irqrestore(&port->lock, flags);
>
> return 0;
> }
^ permalink raw reply
* [PATCH v3] serial: stm32: fix a recursive locking in stm32_config_rs485
From: Borut Seljak @ 2019-06-06 10:19 UTC (permalink / raw)
To: erwan.leray
Cc: borut.seljak, Greg Kroah-Hartman, Jiri Slaby, Maxime Coquelin,
Alexandre Torgue, linux-serial, linux-stm32, linux-arm-kernel,
linux-kernel
Remove spin_lock_irqsave in stm32_config_rs485, it cause recursive locking.
Already locked in uart_set_rs485_config.
fixes: 1bcda09d291081 ("serial: stm32: add support for RS485 hardware control mode")
Signed-off-by: Borut Seljak <borut.seljak@t-2.net>
---
drivers/tty/serial/stm32-usart.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index e8d7a7bb4339..5d072ec61071 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -105,9 +105,7 @@ static int stm32_config_rs485(struct uart_port *port,
struct stm32_usart_config *cfg = &stm32_port->info->cfg;
u32 usartdiv, baud, cr1, cr3;
bool over8;
- unsigned long flags;
- spin_lock_irqsave(&port->lock, flags);
stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
port->rs485 = *rs485conf;
@@ -147,7 +145,6 @@ static int stm32_config_rs485(struct uart_port *port,
}
stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
- spin_unlock_irqrestore(&port->lock, flags);
return 0;
}
--
2.17.1
^ permalink raw reply related
* Re: Fwd: [PATCH] serial: stm32: fix a recursive locking in stm32_config_rs485
From: Erwan LE RAY @ 2019-06-06 7:42 UTC (permalink / raw)
To: Borut Seljak
Cc: Maxime Coquelin, Alexandre TORGUE, Greg Kroah-Hartman,
linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
Jiri Slaby, linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <33271a7e-644b-70e3-f84c-d019b394ce77@st.com>
Hi Borut,
Please remove unused "flags" variable declaration.
Erwan.
On 6/4/19 3:55 PM, Erwan LE RAY wrote:
>
>> Hi Borut,
>>
>> Please add the following line in the commit message (before your
>> sign-off) in a V2 of your patch:
>>
>> Fixes: 1bcda09d291081 ("serial: stm32: add support for RS485 hardware
>> control mode")
>>
>> I'm OK with the patch itself.
>>
>> Erwan.
>>
>>
>> Subject: [PATCH] serial: stm32: fix a recursive locking in
>>> stm32_config_rs485
>>> Date: Tue, 4 Jun 2019 11:54:51 +0200
>>> From: Borut Seljak <borut.seljak@t-2.net>
>>> CC: Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue
>>> <alexandre.torgue@st.com>, Greg Kroah-Hartman
>>> <gregkh@linuxfoundation.org>, linux-kernel@vger.kernel.org,
>>> borut.seljak@t-2.net, linux-serial@vger.kernel.org, Jiri Slaby
>>> <jslaby@suse.com>, linux-stm32@st-md-mailman.stormreply.com,
>>> linux-arm-kernel@lists.infradead.org
>>>
>>> Remove spin_lock_irqsave in stm32_config_rs485, it cause recursive
>>> locking.
>>> Already locked in uart_set_rs485_config.
>>>
>>> Signed-off-by: Borut Seljak <borut.seljak@t-2.net>
>>> ---
>>> drivers/tty/serial/stm32-usart.c | 2 --
>>> 1 file changed, 2 deletions(-)
>>>
>>> diff --git a/drivers/tty/serial/stm32-usart.c
>>> b/drivers/tty/serial/stm32-usart.c
>>> index e8d7a7bb4339..da373a465f51 100644
>>> --- a/drivers/tty/serial/stm32-usart.c
>>> +++ b/drivers/tty/serial/stm32-usart.c
>>> @@ -107,7 +107,6 @@ static int stm32_config_rs485(struct uart_port
>>> *port,
>>> bool over8;
>>> unsigned long flags;
- unsigned long flags;
>>> - spin_lock_irqsave(&port->lock, flags);
>>> stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
>>> port->rs485 = *rs485conf;
>>> @@ -147,7 +146,6 @@ static int stm32_config_rs485(struct uart_port
>>> *port,
>>> }
>>> stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
>>> - spin_unlock_irqrestore(&port->lock, flags);
>>> return 0;
>>> }
^ permalink raw reply
* [patch 5/5] Documentation: DT bindings AST2500 DMA UART driver
From: sudheer.v @ 2019-06-05 12:23 UTC (permalink / raw)
To: gregkh, mchehab+samsung, jslaby, joel, andrew, benh, robh+dt,
mark.rutland, shivahshankar.shankarnarayanrao, sudheer.veliseti
Cc: devicetree, linux-aspeed, linux-serial, linux-arm-kernel,
sudheer Kumar veliseti
In-Reply-To: <1559737395-28542-1-git-send-email-open.sudheer@gmail.com>
From: sudheer Kumar veliseti <sudheer.open@gmail.com>
Signed-off-by: sudheer veliseti <sudheer.open@gmail.com>
---
.../bindings/serial/ast2500-dma-uart.txt | 40 +++++++++++++++++++
1 file changed, 40 insertions(+)
create mode 100644 Documentation/devicetree/bindings/serial/ast2500-dma-uart.txt
diff --git a/Documentation/devicetree/bindings/serial/ast2500-dma-uart.txt b/Documentation/devicetree/bindings/serial/ast2500-dma-uart.txt
new file mode 100644
index 000000000000..ff9bb6146bd6
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/ast2500-dma-uart.txt
@@ -0,0 +1,40 @@
+
+node for DMA controller:
+ ast_uart_sdma: uart_sdma@1e79e000 {
+ compatible = "aspeed,ast-uart-sdma";
+ reg = <0x1e79e000 0x400>;
+ interrupts = <50>;
+ status = "disabled";
+ };
+this node doesn't binds with any driver.
+DMA controller is handled as a separate SW layer,and is included in the same driver.
+This DMA controller node is included in DT just for Register and interrupt details
+
+
+
+node for DMA-UART :
+
+
+Required properties:
+
+- compatible: "aspeed,ast-sdma-uart"
+- reg: The base address of the UART register bank
+- interrupts: should contain interrupt specifier.
+- clocks: Clock driving the hardware;
+- pinctrl-0 : list of pinconfigurations
+- dma-channel: channel of DMA-controller which is used
+
+Example:
+
+ dma_uart1: dma_uart1@1e783000{
+ compatible = "aspeed,ast-sdma-uart";
+ reg = <0x1e783000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <9>;
+ clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
+ dma-channel = <0>;
+ no-loopback-test;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>;
+ status = "disabled";
+ };
--
2.17.1
^ permalink raw reply related
* [patch 4/5] defconfig and MAINTAINERS updated for AST2500 DMA UART driver
From: sudheer.v @ 2019-06-05 12:23 UTC (permalink / raw)
To: gregkh, mchehab+samsung, jslaby, joel, andrew, benh, robh+dt,
mark.rutland, shivahshankar.shankarnarayanrao, sudheer.veliseti
Cc: devicetree, linux-aspeed, linux-serial, linux-arm-kernel,
sudheer Kumar veliseti
In-Reply-To: <1559737395-28542-1-git-send-email-open.sudheer@gmail.com>
From: sudheer Kumar veliseti <sudheer.open@gmail.com>
Signed-off-by: sudheer veliseti <sudheer.open@gmail.com>
---
MAINTAINERS | 13 +++++++++++++
arch/arm/configs/aspeed_g5_defconfig | 1 +
2 files changed, 14 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 997e27ab492f..c9a9790b97f6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1347,6 +1347,19 @@ F: drivers/crypto/axis
F: drivers/pinctrl/pinctrl-artpec*
F: Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt
+ARM/ASPEED DMA UART DRIVER
+M: sudheer v <sudheer.open@gmail.com>
+M: ShivahShankar <shivahshankar.shankarnarayanrao@aspeedtech.com>
+R: Joel Stanley <joel@jms.id.au>
+R: Andrew Jeffery <andrew@aj.id.au>
+R: Vinod Koul <vkoul@kernel.org>
+L: dmaengine@vger.kernel.org
+L: openbmc@lists.ozlabs.org
+L: linux-aspeed@lists.ozlabs.org
+S: Maintained
+F: drivers/tty/serial/8250/8250_aspeed_uart_dma.c
+F: Documentation/devicetree/bindings/serial/ast-sdma-uart.txt
+
ARM/ASPEED I2C DRIVER
M: Brendan Higgins <brendanhiggins@google.com>
R: Benjamin Herrenschmidt <benh@kernel.crashing.org>
diff --git a/arch/arm/configs/aspeed_g5_defconfig b/arch/arm/configs/aspeed_g5_defconfig
index 1849cbc161b4..25bf26630939 100644
--- a/arch/arm/configs/aspeed_g5_defconfig
+++ b/arch/arm/configs/aspeed_g5_defconfig
@@ -144,6 +144,7 @@ CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=6
CONFIG_SERIAL_8250_RUNTIME_UARTS=6
+CONFIG_AST_SERIAL_DMA_UART=y
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_ASPEED_VUART=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
--
2.17.1
^ permalink raw reply related
* [patch 3/5] DT nodes for AST2500 DMA UART driver
From: sudheer.v @ 2019-06-05 12:23 UTC (permalink / raw)
To: gregkh, mchehab+samsung, jslaby, joel, andrew, benh, robh+dt,
mark.rutland, shivahshankar.shankarnarayanrao, sudheer.veliseti
Cc: devicetree, linux-aspeed, linux-serial, linux-arm-kernel,
sudheer Kumar veliseti
In-Reply-To: <1559737395-28542-1-git-send-email-open.sudheer@gmail.com>
From: sudheer Kumar veliseti <sudheer.open@gmail.com>
Signed-off-by: sudheer veliseti <sudheer.open@gmail.com>
---
arch/arm/boot/dts/aspeed-ast2500-evb.dts | 21 +++++++
arch/arm/boot/dts/aspeed-g5.dtsi | 71 ++++++++++++++++++++++--
2 files changed, 88 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
index 5dbb33c10c4f..4da09fbe94df 100644
--- a/arch/arm/boot/dts/aspeed-ast2500-evb.dts
+++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
@@ -64,6 +64,27 @@
status = "okay";
};
+&ast_uart_sdma {
+ status = "okay";
+};
+
+&dma_uart1 {
+ status = "okay";
+};
+
+&dma_uart2 {
+ status = "okay";
+};
+
+&dma_uart3 {
+ status = "okay";
+};
+
+&dma_uart4 {
+ status = "okay";
+};
+
+
&mac0 {
status = "okay";
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 674746513031..fb7b3ed463de 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -23,10 +23,10 @@
i2c11 = &i2c11;
i2c12 = &i2c12;
i2c13 = &i2c13;
- serial0 = &uart1;
- serial1 = &uart2;
- serial2 = &uart3;
- serial3 = &uart4;
+ serial0 = &dma_uart1;
+ serial1 = &dma_uart2;
+ serial2 = &dma_uart3;
+ serial3 = &dma_uart4;
serial4 = &uart5;
serial5 = &vuart;
peci0 = &peci0;
@@ -497,6 +497,69 @@
status = "disabled";
};
+ ast_uart_sdma: uart_sdma@1e79e000 {
+ compatible = "aspeed,ast-uart-sdma";
+ reg = <0x1e79e000 0x400>;
+ interrupts = <50>;
+ status = "disabled";
+ };
+
+ dma_uart1: dma_uart1@1e783000{
+ compatible = "aspeed,ast-sdma-uart";
+ reg = <0x1e783000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <9>;
+ clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
+ dma-channel = <0>;
+ no-loopback-test;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd1_default
+ &pinctrl_rxd1_default>;
+ status = "disabled";
+ };
+
+ dma_uart2: dma_uart2@1e78d000{
+ compatible = "aspeed,ast-sdma-uart";
+ reg = <0x1e78d000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <32>;
+ clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
+ dma-channel = <1>;
+ no-loopback-test;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd2_default
+ &pinctrl_rxd2_default>;
+ status = "disabled";
+ };
+
+ dma_uart3: dma_uart3@1e78e000{
+ compatible = "aspeed,ast-sdma-uart";
+ reg = <0x1e78e000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <33>;
+ clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
+ dma-channel = <2>;
+ no-loopback-test;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd3_default
+ &pinctrl_rxd3_default>;
+ status = "disabled";
+ };
+
+ dma_uart4: dma_uart4@1e78f000{
+ compatible = "aspeed,ast-sdma-uart";
+ reg = <0x1e78f000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <34>;
+ clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
+ dma-channel = <3>;
+ no-loopback-test;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd4_default
+ &pinctrl_rxd4_default>;
+ status = "disabled";
+ };
+
i2c: bus@1e78a000 {
compatible = "simple-bus";
#address-cells = <1>;
--
2.17.1
^ permalink raw reply related
* [patch 2/5] build configuration for AST2500 DMA UART driver
From: sudheer.v @ 2019-06-05 12:23 UTC (permalink / raw)
To: gregkh, mchehab+samsung, jslaby, joel, andrew, benh, robh+dt,
mark.rutland, shivahshankar.shankarnarayanrao, sudheer.veliseti
Cc: devicetree, linux-aspeed, linux-serial, linux-arm-kernel,
sudheer Kumar veliseti
In-Reply-To: <1559737395-28542-1-git-send-email-open.sudheer@gmail.com>
From: sudheer Kumar veliseti <sudheer.open@gmail.com>
Signed-off-by: sudheer veliseti <sudheer.open@gmail.com>
---
drivers/tty/serial/8250/Kconfig | 35 +++++++++++++++++++++++++++++++-
drivers/tty/serial/8250/Makefile | 1 +
2 files changed, 35 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig
index 15c2c5463835..c793466a1c47 100644
--- a/drivers/tty/serial/8250/Kconfig
+++ b/drivers/tty/serial/8250/Kconfig
@@ -45,7 +45,7 @@ config SERIAL_8250_DEPRECATED_OPTIONS
keep the 8250_core.* options around until they revert the changes
they already did.
- If 8250 is built as a module, this adds 8250_core alias instead.
+ If 8250 is built as a module, this adds 8250_core alias instead.
If you did not notice yet and/or you have userspace from pre-3.7, it
is safe (and recommended) to say N here.
@@ -189,6 +189,39 @@ config SERIAL_8250_RUNTIME_UARTS
with the module parameter "nr_uarts", or boot-time parameter
8250.nr_uarts
+config AST_SERIAL_DMA_UART
+ tristate "AST UART driver with DMA"
+ select SERIAL_CORE
+ help
+ UART driver with DMA support for Aspeed BMC AST25XX.
+ this driver supports UARTs in AST2500,AST2600. It uses
+ DMA channel of DMA engines present in these chips.
+ since this dma engine is used only by UARTs it is not
+ added as a separate DMA driver instead added as a layer
+ within UART driver.
+
+
+config AST_NR_DMA_UARTS
+ int "Maximum number of uart dma serial ports"
+ depends on AST_SERIAL_DMA_UART
+ default "4"
+ help
+ Set this to the number of serial ports you want the driver
+ to support. This includes any ports discovered via ACPI or
+ PCI enumeration and any ports that may be added at run-time
+ via hot-plug, or any ISA multi-port serial cards.
+
+config AST_RUNTIME_DMA_UARTS
+ int "Number of uart dma serial ports to register at runtime"
+ depends on AST_SERIAL_DMA_UART
+ range 0 AST_NR_DMA_UARTS
+ default "4"
+ help
+ Set this to the maximum number of serial ports you want
+ the kernel to register at boot time. This can be overridden
+ with the module parameter "nr_uarts", or boot-time parameter
+ 8250.nr_uarts
+
config SERIAL_8250_EXTENDED
bool "Extended 8250/16550 serial driver options"
depends on SERIAL_8250
diff --git a/drivers/tty/serial/8250/Makefile b/drivers/tty/serial/8250/Makefile
index 18751bc63a84..54d40e5c6e2a 100644
--- a/drivers/tty/serial/8250/Makefile
+++ b/drivers/tty/serial/8250/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_SERIAL_8250_LPSS) += 8250_lpss.o
obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o
obj-$(CONFIG_SERIAL_8250_MOXA) += 8250_moxa.o
obj-$(CONFIG_SERIAL_8250_PXA) += 8250_pxa.o
+obj-$(CONFIG_AST_SERIAL_DMA_UART) += 8250_ast2500_uart_dma.o
obj-$(CONFIG_SERIAL_OF_PLATFORM) += 8250_of.o
CFLAGS_8250_ingenic.o += -I$(srctree)/scripts/dtc/libfdt
--
2.17.1
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox