[PATCH v1 0/3] ASoC: qcom: lpass: Switch VA/WSA macros to PM clock framework

[PATCH v1 0/3] ASoC: qcom: lpass: Switch VA/WSA macros to PM clock framework

[Ajay Kumar Nandam]

This series switches Qualcomm LPASS VA and WSA macro codecs to use the
generic PM clock framework for runtime power management.

The drivers previously managed clocks explicitly. This update adopts
devm_pm_clk_create() and of_pm_clk_add_clks(), allowing the core PM
framework to handle clock enable/disable during runtime suspend and
resume, reducing manual clock handling and aligning with upstream PM
usage. No functional changes intended beyond improved PM/clock handling.


Ajay Kumar Nandam (3):
  ASoC: codecs: lpass-wsa-macro: Switch to PM clock framework for
    runtime PM
  ASoC: codecs: lpass-va-macro: Switch to PM clock framework for runtime
    PM
  ASoC: codecs: lpass-wsa-macro: Guard optional NPL clock rate
    programming

 sound/soc/codecs/lpass-va-macro.c  | 120 +++++++++++++---------------
 sound/soc/codecs/lpass-wsa-macro.c | 121 ++++++++++-------------------
 2 files changed, 93 insertions(+), 148 deletions(-)


base-commit: 66672af7a095d89f082c5327f3b15bc2f93d558e
-- 
2.34.1

[PATCH v1 1/3] ASoC: codecs: lpass-wsa-macro: Switch to PM clock framework for runtime PM

[Ajay Kumar Nandam]

Convert the LPASS WSA macro codec driver to use the PM clock framework
for runtime power management.

The driver now relies on pm_clk helpers and runtime PM instead of
manually enabling and disabling macro, dcodec, mclk, npl, and fsgen
clocks. Runtime suspend and resume handling is delegated to the PM
core via pm_clk_suspend() and pm_clk_resume(), while existing runtime
PM callbacks continue to manage regcache state.

This ensures clocks are enabled only when the WSA macro is active,
improves power efficiency on LPASS platforms supporting LPI/island
modes, and aligns the driver with common ASoC runtime PM patterns used
across Qualcomm LPASS codec drivers.

Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>
---
 sound/soc/codecs/lpass-wsa-macro.c | 118 +++++++++--------------------
 1 file changed, 37 insertions(+), 81 deletions(-)

diff --git a/sound/soc/codecs/lpass-wsa-macro.c b/sound/soc/codecs/lpass-wsa-macro.c
index 5ad0448af..6aa6c4d95 100644
--- a/sound/soc/codecs/lpass-wsa-macro.c
+++ b/sound/soc/codecs/lpass-wsa-macro.c
@@ -14,6 +14,7 @@
 #include <sound/soc-dapm.h>
 #include <linux/pm_runtime.h>
 #include <linux/of_platform.h>
+#include <linux/pm_clock.h>
 #include <sound/tlv.h>
 
 #include "lpass-macro-common.h"
@@ -2529,15 +2530,15 @@ static const struct snd_soc_dapm_route wsa_audio_map[] = {
 static int wsa_swrm_clock(struct wsa_macro *wsa, bool enable)
 {
 	struct regmap *regmap = wsa->regmap;
+	int ret;
 
-	if (enable) {
-		int ret;
+	ret = pm_runtime_get_sync(wsa->dev);
+	if (ret < 0) {
+		pm_runtime_put_noidle(wsa->dev);
+		return ret;
+	}
 
-		ret = clk_prepare_enable(wsa->mclk);
-		if (ret) {
-			dev_err(wsa->dev, "failed to enable mclk\n");
-			return ret;
-		}
+	if (enable) {
 		wsa_macro_mclk_enable(wsa, true);
 
 		regmap_update_bits(regmap, CDC_WSA_CLK_RST_CTRL_SWR_CONTROL,
@@ -2548,9 +2549,10 @@ static int wsa_swrm_clock(struct wsa_macro *wsa, bool enable)
 		regmap_update_bits(regmap, CDC_WSA_CLK_RST_CTRL_SWR_CONTROL,
 				   CDC_WSA_SWR_CLK_EN_MASK, 0);
 		wsa_macro_mclk_enable(wsa, false);
-		clk_disable_unprepare(wsa->mclk);
 	}
 
+	pm_runtime_mark_last_busy(wsa->dev);
+	pm_runtime_put_autosuspend(wsa->dev);
 	return 0;
 }
 
@@ -2774,25 +2776,23 @@ static int wsa_macro_probe(struct platform_device *pdev)
 	clk_set_rate(wsa->mclk, WSA_MACRO_MCLK_FREQ);
 	clk_set_rate(wsa->npl, WSA_MACRO_MCLK_FREQ);
 
-	ret = clk_prepare_enable(wsa->macro);
+	ret = devm_pm_clk_create(dev);
 	if (ret)
-		goto err;
+		return ret;
 
-	ret = clk_prepare_enable(wsa->dcodec);
-	if (ret)
-		goto err_dcodec;
+	ret = of_pm_clk_add_clks(dev);
+	if (ret < 0)
+		return ret;
 
-	ret = clk_prepare_enable(wsa->mclk);
-	if (ret)
-		goto err_mclk;
+	pm_runtime_set_autosuspend_delay(dev, 3000);
+	pm_runtime_use_autosuspend(dev);
+	pm_runtime_enable(dev);
 
-	ret = clk_prepare_enable(wsa->npl);
-	if (ret)
-		goto err_npl;
 
-	ret = clk_prepare_enable(wsa->fsgen);
-	if (ret)
-		goto err_fsgen;
+	ret = pm_runtime_resume_and_get(dev);
+	if (ret < 0) {
+		goto err_rpm_disable;
+	}
 
 	/* reset swr ip */
 	regmap_update_bits(wsa->regmap, CDC_WSA_CLK_RST_CTRL_SWR_CONTROL,
@@ -2809,44 +2809,26 @@ static int wsa_macro_probe(struct platform_device *pdev)
 					      wsa_macro_dai,
 					      ARRAY_SIZE(wsa_macro_dai));
 	if (ret)
-		goto err_clkout;
-
-	pm_runtime_set_autosuspend_delay(dev, 3000);
-	pm_runtime_use_autosuspend(dev);
-	pm_runtime_mark_last_busy(dev);
-	pm_runtime_set_active(dev);
-	pm_runtime_enable(dev);
+		goto err_rpm_put;
 
 	ret = wsa_macro_register_mclk_output(wsa);
 	if (ret)
-		goto err_clkout;
+		goto err_rpm_put;
 
-	return 0;
+	pm_runtime_mark_last_busy(dev);
+	pm_runtime_put_autosuspend(dev);
 
-err_clkout:
-	clk_disable_unprepare(wsa->fsgen);
-err_fsgen:
-	clk_disable_unprepare(wsa->npl);
-err_npl:
-	clk_disable_unprepare(wsa->mclk);
-err_mclk:
-	clk_disable_unprepare(wsa->dcodec);
-err_dcodec:
-	clk_disable_unprepare(wsa->macro);
-err:
+	return 0;
+err_rpm_put:
+	pm_runtime_put_noidle(dev);
+err_rpm_disable:
+	pm_runtime_disable(dev);
 	return ret;
-
 }
 
 static void wsa_macro_remove(struct platform_device *pdev)
 {
-	struct wsa_macro *wsa = dev_get_drvdata(&pdev->dev);
-
-	clk_disable_unprepare(wsa->macro);
-	clk_disable_unprepare(wsa->dcodec);
-	clk_disable_unprepare(wsa->mclk);
-	clk_disable_unprepare(wsa->npl);
-	clk_disable_unprepare(wsa->fsgen);
+	pm_runtime_disable(&pdev->dev);
 }
 
 static int wsa_macro_runtime_suspend(struct device *dev)
@@ -2856,11 +2838,7 @@ static int wsa_macro_runtime_suspend(struct device *dev)
 	regcache_cache_only(wsa->regmap, true);
 	regcache_mark_dirty(wsa->regmap);
 
-	clk_disable_unprepare(wsa->fsgen);
-	clk_disable_unprepare(wsa->npl);
-	clk_disable_unprepare(wsa->mclk);
-
-	return 0;
+	return pm_clk_suspend(dev);
 }
 
 static int wsa_macro_runtime_resume(struct device *dev)
@@ -2868,34 +2846,12 @@ static int wsa_macro_runtime_resume(struct device *dev)
 	struct wsa_macro *wsa = dev_get_drvdata(dev);
 	int ret;
 
-	ret = clk_prepare_enable(wsa->mclk);
-	if (ret) {
-		dev_err(dev, "unable to prepare mclk\n");
-		return ret;
-	}
-
-	ret = clk_prepare_enable(wsa->npl);
-	if (ret) {
-		dev_err(dev, "unable to prepare mclkx2\n");
-		goto err_npl;
-	}
-
-	ret = clk_prepare_enable(wsa->fsgen);
-	if (ret) {
-		dev_err(dev, "unable to prepare fsgen\n");
-		goto err_fsgen;
-	}
-
 	regcache_cache_only(wsa->regmap, false);
-	regcache_sync(wsa->regmap);
-
-	return 0;
-err_fsgen:
-	clk_disable_unprepare(wsa->npl);
-err_npl:
-	clk_disable_unprepare(wsa->mclk);
+	ret = pm_clk_resume(dev);
+	if (ret)
+		return ret;
 
-	return ret;
+	return regcache_sync(wsa->regmap);
 }
 
 static const struct dev_pm_ops wsa_macro_pm_ops = {
-- 
2.34.1

Re: [PATCH v1 1/3] ASoC: codecs: lpass-wsa-macro: Switch to PM clock framework for runtime PM

[Konrad Dybcio]

On 4/13/26 2:18 PM, Ajay Kumar Nandam wrote:
> Convert the LPASS WSA macro codec driver to use the PM clock framework
> for runtime power management.
> 
> The driver now relies on pm_clk helpers and runtime PM instead of
> manually enabling and disabling macro, dcodec, mclk, npl, and fsgen
> clocks. Runtime suspend and resume handling is delegated to the PM
> core via pm_clk_suspend() and pm_clk_resume(), while existing runtime
> PM callbacks continue to manage regcache state.
> 
> This ensures clocks are enabled only when the WSA macro is active,
> improves power efficiency on LPASS platforms supporting LPI/island
> modes, and aligns the driver with common ASoC runtime PM patterns used
> across Qualcomm LPASS codec drivers.
> 
> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>
> ---

[...]

> +	pm_runtime_set_autosuspend_delay(dev, 3000);

FWIW I have mostly the same comments as on your other series

Notably, msm-5.10 uses 50 ms of autosuspend delay for the macros
(100 for VA for $reasons)

Konrad

Re: [PATCH v1 1/3] ASoC: codecs: lpass-wsa-macro: Switch to PM clock framework for runtime PM

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 354 bytes --]

On Mon, Apr 13, 2026 at 05:48:22PM +0530, Ajay Kumar Nandam wrote:

> @@ -2868,34 +2846,12 @@ static int wsa_macro_runtime_resume(struct device *dev)

> +	ret = pm_clk_resume(dev);
> +	if (ret)
> +		return ret;
>  
> -	return ret;
> +	return regcache_sync(wsa->regmap);
>  }

This doesn't unwind the clock resume of the regcache sync fails.

[-- Attachment #2: signature.asc --]
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Re: [PATCH v1 1/3] ASoC: codecs: lpass-wsa-macro: Switch to PM clock framework for runtime PM

[Ajay Kumar Nandam]

On 4/14/2026 5:32 PM, Mark Brown wrote:
> On Mon, Apr 13, 2026 at 05:48:22PM +0530, Ajay Kumar Nandam wrote:
> 
>> @@ -2868,34 +2846,12 @@ static int wsa_macro_runtime_resume(struct device *dev)
> 
>> +	ret = pm_clk_resume(dev);
>> +	if (ret)
>> +		return ret;
>>   
>> -	return ret;
>> +	return regcache_sync(wsa->regmap);
>>   }
> 
> This doesn't unwind the clock resume of the regcache sync fails.

ACK, will correct on the next version.

Thanks
Ajay Kumar Nandam

[PATCH v1 2/3] ASoC: codecs: lpass-va-macro: Switch to PM clock framework for runtime PM

[Ajay Kumar Nandam]

Convert the LPASS VA macro codec driver to use the PM clock framework
for runtime power management.

The driver now relies on pm_clk helpers and runtime PM instead of
manually enabling and disabling macro, dcodec, mclk, and npl clocks.
All clock control during runtime suspend and resume is delegated to
the PM core via pm_clk_suspend() and pm_clk_resume().

This change ensures clocks are only enabled when the VA macro is
active, improves power efficiency on LPASS platforms supporting
LPI/island modes, and aligns the driver with common ASoC runtime PM
patterns used across Qualcomm LPASS codec drivers.

Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>
---
 sound/soc/codecs/lpass-va-macro.c | 120 ++++++++++++++----------------
 1 file changed, 54 insertions(+), 66 deletions(-)

diff --git a/sound/soc/codecs/lpass-va-macro.c b/sound/soc/codecs/lpass-va-macro.c
index 528d5b167..b909f8bef 100644
--- a/sound/soc/codecs/lpass-va-macro.c
+++ b/sound/soc/codecs/lpass-va-macro.c
@@ -11,6 +11,7 @@
 #include <linux/of_platform.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
+#include <linux/pm_clock.h>
 #include <linux/regmap.h>
 #include <linux/regulator/consumer.h>
 #include <sound/soc.h>
@@ -1348,18 +1349,22 @@ static int fsgen_gate_enable(struct clk_hw *hw)
 	struct regmap *regmap = va->regmap;
 	int ret;
 
-	if (va->has_swr_master) {
-		ret = clk_prepare_enable(va->mclk);
-		if (ret)
-			return ret;
+	ret = pm_runtime_get_sync(va->dev);
+	if (ret < 0) {
+		pm_runtime_put_noidle(va->dev);
+		return ret;
 	}
 
 	ret = va_macro_mclk_enable(va, true);
+	if (ret) {
+		pm_runtime_put_noidle(va->dev);
+		return ret;
+	}
 	if (va->has_swr_master)
 		regmap_update_bits(regmap, CDC_VA_CLK_RST_CTRL_SWR_CONTROL,
 				   CDC_VA_SWR_CLK_EN_MASK, CDC_VA_SWR_CLK_ENABLE);
 
-	return ret;
+	return 0;
 }
 
 static void fsgen_gate_disable(struct clk_hw *hw)
@@ -1372,8 +1377,24 @@ static void fsgen_gate_disable(struct clk_hw *hw)
 			   CDC_VA_SWR_CLK_EN_MASK, 0x0);
 
 	va_macro_mclk_enable(va, false);
-	if (va->has_swr_master)
-		clk_disable_unprepare(va->mclk);
+
+	pm_runtime_mark_last_busy(va->dev);
+	pm_runtime_put_autosuspend(va->dev);
+}
+
+static int va_macro_setup_pm_clocks(struct device *dev, struct va_macro *va)
+{
+	int ret;
+
+	ret = devm_pm_clk_create(dev);
+	if (ret)
+		return ret;
+
+	ret = of_pm_clk_add_clks(dev);
+	if (ret < 0)
+		return ret;
+
+	return 0;
 }
 
 static int fsgen_gate_is_enabled(struct clk_hw *hw)
@@ -1534,6 +1555,7 @@ static int va_macro_probe(struct platform_device *pdev)
 	void __iomem *base;
 	u32 sample_rate = 0;
 	int ret;
+	int rpm_ret;
 
 	va = devm_kzalloc(dev, sizeof(*va), GFP_KERNEL);
 	if (!va)
@@ -1601,22 +1623,18 @@ static int va_macro_probe(struct platform_device *pdev)
 		clk_set_rate(va->npl, 2 * VA_MACRO_MCLK_FREQ);
 	}
 
-	ret = clk_prepare_enable(va->macro);
-	if (ret)
-		goto err;
-
-	ret = clk_prepare_enable(va->dcodec);
+	ret = va_macro_setup_pm_clocks(dev, va);
 	if (ret)
-		goto err_dcodec;
+		goto err_rpm_disable;
 
-	ret = clk_prepare_enable(va->mclk);
-	if (ret)
-		goto err_mclk;
+	pm_runtime_set_autosuspend_delay(dev, 3000);
+	pm_runtime_use_autosuspend(dev);
+	pm_runtime_enable(dev);
 
-	if (va->has_npl_clk) {
-		ret = clk_prepare_enable(va->npl);
-		if (ret)
-			goto err_npl;
+	rpm_ret = pm_runtime_resume_and_get(dev);
+	if (rpm_ret < 0) {
+		ret = rpm_ret;
+		goto err_rpm_disable;
 	}
 
 	/**
@@ -1629,7 +1647,7 @@ static int va_macro_probe(struct platform_device *pdev)
 		/* read version from register */
 		ret = va_macro_set_lpass_codec_version(va);
 		if (ret)
-			goto err_clkout;
+			goto err_rpm_put;
 	}
 
 	if (va->has_swr_master) {
@@ -1659,35 +1677,27 @@ static int va_macro_probe(struct platform_device *pdev)
 					      va_macro_dais,
 					      ARRAY_SIZE(va_macro_dais));
 	if (ret)
-		goto err_clkout;
-
-	pm_runtime_set_autosuspend_delay(dev, 3000);
-	pm_runtime_use_autosuspend(dev);
-	pm_runtime_mark_last_busy(dev);
-	pm_runtime_set_active(dev);
-	pm_runtime_enable(dev);
+		goto err_rpm_put;
 
 	ret = va_macro_register_fsgen_output(va);
 	if (ret)
-		goto err_clkout;
+		goto err_rpm_put;
 
 	va->fsgen = devm_clk_hw_get_clk(dev, &va->hw, "fsgen");
 	if (IS_ERR(va->fsgen)) {
 		ret = PTR_ERR(va->fsgen);
-		goto err_clkout;
+		goto err_rpm_put;
 	}
 
+	pm_runtime_mark_last_busy(dev);
+	pm_runtime_put_autosuspend(dev);
+
 	return 0;
 
-err_clkout:
-	if (va->has_npl_clk)
-		clk_disable_unprepare(va->npl);
-err_npl:
-	clk_disable_unprepare(va->mclk);
-err_mclk:
-	clk_disable_unprepare(va->dcodec);
-err_dcodec:
-	clk_disable_unprepare(va->macro);
+err_rpm_put:
+	pm_runtime_put_noidle(dev);
+err_rpm_disable:
+	 pm_runtime_disable(dev);
 err:
 	lpass_macro_pds_exit(va->pds);
 
@@ -1698,12 +1708,7 @@ static void va_macro_remove(struct platform_device *pdev)
 {
 	struct va_macro *va = dev_get_drvdata(&pdev->dev);
 
-	if (va->has_npl_clk)
-		clk_disable_unprepare(va->npl);
-
-	clk_disable_unprepare(va->mclk);
-	clk_disable_unprepare(va->dcodec);
-	clk_disable_unprepare(va->macro);
+	pm_runtime_disable(&pdev->dev);
 
 	lpass_macro_pds_exit(va->pds);
 }
@@ -1715,12 +1720,7 @@ static int va_macro_runtime_suspend(struct device *dev)
 	regcache_cache_only(va->regmap, true);
 	regcache_mark_dirty(va->regmap);
 
-	if (va->has_npl_clk)
-		clk_disable_unprepare(va->npl);
-
-	clk_disable_unprepare(va->mclk);
-
-	return 0;
+	return pm_clk_suspend(dev);
 }
 
 static int va_macro_runtime_resume(struct device *dev)
@@ -1728,25 +1728,13 @@ static int va_macro_runtime_resume(struct device *dev)
 	struct va_macro *va = dev_get_drvdata(dev);
 	int ret;
 
-	ret = clk_prepare_enable(va->mclk);
-	if (ret) {
-		dev_err(va->dev, "unable to prepare mclk\n");
+	ret = pm_clk_resume(dev);
+	if (ret)
 		return ret;
-	}
-
-	if (va->has_npl_clk) {
-		ret = clk_prepare_enable(va->npl);
-		if (ret) {
-			clk_disable_unprepare(va->mclk);
-			dev_err(va->dev, "unable to prepare npl\n");
-			return ret;
-		}
-	}
 
 	regcache_cache_only(va->regmap, false);
-	regcache_sync(va->regmap);
 
-	return 0;
+	return regcache_sync(va->regmap);
 }
 
 
-- 
2.34.1

Re: [PATCH v1 2/3] ASoC: codecs: lpass-va-macro: Switch to PM clock framework for runtime PM

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 598 bytes --]

On Mon, Apr 13, 2026 at 05:48:23PM +0530, Ajay Kumar Nandam wrote:

>  	struct va_macro *va = dev_get_drvdata(dev);
>  	int ret;
>  
> -	ret = clk_prepare_enable(va->mclk);
> -	if (ret) {
> -		dev_err(va->dev, "unable to prepare mclk\n");
> +	ret = pm_clk_resume(dev);
> +	if (ret)
>  		return ret;
> -	}
> -
>  
>  	regcache_cache_only(va->regmap, false);
> -	regcache_sync(va->regmap);
>  
> -	return 0;
> +	return regcache_sync(va->regmap);

Same issue here (and the cache only mode needs to be reenabled), and
likely also in the third patch thouh I didn't check that yet.

[-- Attachment #2: signature.asc --]
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Re: [PATCH v1 2/3] ASoC: codecs: lpass-va-macro: Switch to PM clock framework for runtime PM

[Ajay Kumar Nandam]

On 4/14/2026 5:34 PM, Mark Brown wrote:
> On Mon, Apr 13, 2026 at 05:48:23PM +0530, Ajay Kumar Nandam wrote:
> 
>>   	struct va_macro *va = dev_get_drvdata(dev);
>>   	int ret;
>>   
>> -	ret = clk_prepare_enable(va->mclk);
>> -	if (ret) {
>> -		dev_err(va->dev, "unable to prepare mclk\n");
>> +	ret = pm_clk_resume(dev);
>> +	if (ret)
>>   		return ret;
>> -	}
>> -
>>   
>>   	regcache_cache_only(va->regmap, false);
>> -	regcache_sync(va->regmap);
>>   
>> -	return 0;
>> +	return regcache_sync(va->regmap);
> 
> Same issue here (and the cache only mode needs to be reenabled), and
> likely also in the third patch thouh I didn't check that yet.

ACK, will correct in the next version

Thanks
Ajay Kumar Nandam

[PATCH v1 3/3] ASoC: codecs: lpass-wsa-macro: Guard optional NPL clock rate programming

[Ajay Kumar Nandam]

The NPL clock is only present on some platforms.  When it is absent,
wsa->npl remains NULL, but the driver unconditionally programs its rate.

Guard clk_set_rate() for the NPL clock so platforms without NPL do not
attempt to access it.

No functional change on platforms that provide the NPL clock.

Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>
---
 sound/soc/codecs/lpass-wsa-macro.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/sound/soc/codecs/lpass-wsa-macro.c b/sound/soc/codecs/lpass-wsa-macro.c
index 6aa6c4d95..8c8c50a63 100644
--- a/sound/soc/codecs/lpass-wsa-macro.c
+++ b/sound/soc/codecs/lpass-wsa-macro.c
@@ -2774,7 +2774,8 @@ static int wsa_macro_probe(struct platform_device *pdev)
 
 	/* set MCLK and NPL rates */
 	clk_set_rate(wsa->mclk, WSA_MACRO_MCLK_FREQ);
-	clk_set_rate(wsa->npl, WSA_MACRO_MCLK_FREQ);
+	if (wsa->npl)
+		clk_set_rate(wsa->npl, WSA_MACRO_MCLK_FREQ);
 
 	ret = devm_pm_clk_create(dev);
 	if (ret)
-- 
2.34.1

Re: [PATCH v1 3/3] ASoC: codecs: lpass-wsa-macro: Guard optional NPL clock rate programming

[Konrad Dybcio]

On 4/13/26 2:18 PM, Ajay Kumar Nandam wrote:
> The NPL clock is only present on some platforms.  When it is absent,
> wsa->npl remains NULL, but the driver unconditionally programs its rate.
> 
> Guard clk_set_rate() for the NPL clock so platforms without NPL do not
> attempt to access it.
> 
> No functional change on platforms that provide the NPL clock.
> 
> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>
> ---

If you dig into the definition of the function..

--- drivers/clk/clk.c ---

int clk_set_rate(struct clk *clk, unsigned long rate)
{
        int ret;

        if (!clk)
                return 0;

So let's drop this patch

Konrad

Re: [PATCH v1 3/3] ASoC: codecs: lpass-wsa-macro: Guard optional NPL clock rate programming

[Ajay Kumar Nandam]

On 4/14/2026 2:17 PM, Konrad Dybcio wrote:
> On 4/13/26 2:18 PM, Ajay Kumar Nandam wrote:
>> The NPL clock is only present on some platforms.  When it is absent,
>> wsa->npl remains NULL, but the driver unconditionally programs its rate.
>>
>> Guard clk_set_rate() for the NPL clock so platforms without NPL do not
>> attempt to access it.
>>
>> No functional change on platforms that provide the NPL clock.
>>
>> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>
>> ---
> 
> If you dig into the definition of the function..
> 
> --- drivers/clk/clk.c ---
> 
> int clk_set_rate(struct clk *clk, unsigned long rate)
> {
>          int ret;
> 
>          if (!clk)
>                  return 0;
> 
> So let's drop this patch

ACK, will drop in next series.

Thanks
Ajay Kumar Nandam

> 
> Konrad