[PATCH] ASoC: cs42l43: Fix headphone volume control overflow at 100%

[PATCH] ASoC: cs42l43: Fix headphone volume control overflow at 100%

[Cole Leavitt]

The headphone digital volume control is defined with:
  SOC_DOUBLE_SX_TLV(..., 0x11B, 229, ...)

Where 0x11B (283) is the minimum register value and 229 is the number of
steps. This means the maximum register value is 283 + 229 = 512 (0x200).

However, the register field is only 9 bits wide (mask 0x1FF, max 511).
When the volume is set to 100%, the computed register value of 512
overflows and wraps to 0, causing the volume to suddenly drop to minimum.

Fix by changing the minimum from 0x11B (283) to 0x11A (282), so that:
  282 + 229 = 511 (0x1FF)

This allows 100% volume to work correctly while maintaining the full
229-step range for the -114.50dB to 0dB TLV scale.

Fixes: fc918cbe874e ("ASoC: cs42l43: Add support for the cs42l43")
Signed-off-by: Cole Leavitt <cole@unwrap.rs>
---
 sound/soc/codecs/cs42l43.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/codecs/cs42l43.c b/sound/soc/codecs/cs42l43.c
index fd02d8a57e0f..d0c3589d8e1d 100644
--- a/sound/soc/codecs/cs42l43.c
+++ b/sound/soc/codecs/cs42l43.c
@@ -1231,7 +1231,7 @@ static const struct snd_kcontrol_new cs42l43_controls[] = {
 
 	SOC_DOUBLE_SX_TLV("Headphone Digital Volume", CS42L43_HPPATHVOL,
 			  CS42L43_AMP3_PATH_VOL_SHIFT, CS42L43_AMP4_PATH_VOL_SHIFT,
-			  0x11B, 229, cs42l43_headphone_tlv),
+			  0x11A, 229, cs42l43_headphone_tlv),
 
 	SOC_DOUBLE("Headphone Invert Switch", CS42L43_DACCNFG1,
 		   CS42L43_AMP3_INV_SHIFT, CS42L43_AMP4_INV_SHIFT, 1, 0),
-- 
2.52.0

Re: [PATCH] ASoC: cs42l43: Fix headphone volume control overflow at 100%

[Charles Keepax]

On Wed, Jan 14, 2026 at 02:38:29PM -0700, Cole Leavitt wrote:
> The headphone digital volume control is defined with:
>   SOC_DOUBLE_SX_TLV(..., 0x11B, 229, ...)
> 
> Where 0x11B (283) is the minimum register value and 229 is the number of
> steps. This means the maximum register value is 283 + 229 = 512 (0x200).
> 
> However, the register field is only 9 bits wide (mask 0x1FF, max 511).
> When the volume is set to 100%, the computed register value of 512
> overflows and wraps to 0, causing the volume to suddenly drop to minimum.

Is this actually based off real world testing?

Thanks,
Charles