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From: "Christian A. Ehrhardt" <lk@c--e.de>
To: "Uwe Kleine-König (The Capable Hub)"
	<u.kleine-koenig@baylibre.com>,
	"Clemens Ladisch" <clemens@ladisch.de>,
	"Jaroslav Kysela" <perex@perex.cz>,
	"Takashi Iwai" <tiwai@suse.com>,
	"Christian A. Ehrhardt" <christian.ehrhardt@codasip.com>,
	linux1394-devel@lists.sourceforge.net,
	linux-sound@vger.kernel.org,
	"Wolfram Sang" <wsa+renesas@sang-engineering.com>,
	"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>
Subject: Re: [PATCH v1 0/2] firewire: Simplify storing pointers in device id struct
Date: Tue, 21 Apr 2026 18:20:53 +0200	[thread overview]
Message-ID: <aeej5YjQ9RvB0aWz@cae.in-ulm.de> (raw)
In-Reply-To: <20260421125357.GA46532@sakamocchi.jp>


Hi,

this is getting off topic but....

On Tue, Apr 21, 2026 at 09:53:57PM +0900, Takashi Sakamoto wrote:
> > Fixing unsigned long vs. uintptr_t issues helps a lot with this
> > because it reduces the diff. But it is also a general cleanup.
> 
> Thsnks for the references. It looks like there is not much to consider
> outside of mm subsystem. But I have some concerns if supporting
> ARM/RISC-V adoptation of CHERI extension in Linux FireWire subsystem.
> 
> Any structures in UAPI header of this subsystem are defined with
> an assumption that the size of pointer in the existing System V
> architectures is up to 64 bits at most. We can see many usage of
> '__u64' type member for pointers (e.g. 'rom' in fw_cdev_get_info
> structure). I imagine to need defining specific structures for this kind
> of 'fat' pointer. (The same assumption lays on compat ioctl.)

As far as in-memory syscall arguments are concerned a full support
for CHERI will essentially require a new UABI and also a new variant
of compat support to run standard non-CHERI aware 64-bit binaries.
This is the main reason for the size of the patchset.

> As another concern is that the padding in structure. As long as I know,
> any 64 bit architecture for System V ABI has 8 bit alignment rule, and
> any structure in UAPI header of this subsystem are carefully defined not
> to have different sizes between x86/32bit/64bit architectures, except for
> 'fw_cdev_event_response' structure (see 'drivers/firewire/uapi-test.c').
> As a quick glance, the size of pointer in ARM CHERI extension seems to be
> 129 bit. In this case, what size of alignment rule is applied? Is there
> 7 bit padding after pointer member in any aggregates?

The in-memory representation of the fat pointer is 128-bit on a 64-bit
system. The 129-th bit (called the "tag bit") is not directly accessible
but managed out-of-band by the memory controller or some similar entity.
It is set on valid pointers only and is implicitly cleared when memory
is accessed with non-pointer instructions.

Best regards,
Christian


  parent reply	other threads:[~2026-04-21 16:20 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-19  6:42 [PATCH v1 0/2] firewire: Simplify storing pointers in device id struct Uwe Kleine-König (The Capable Hub)
2026-04-19  6:42 ` [PATCH v1 1/2] " Uwe Kleine-König (The Capable Hub)
2026-04-19  6:42 ` [PATCH v1 2/2] ALSA: firewire: Make use of ieee1394's .driver_data_ptr Uwe Kleine-König (The Capable Hub)
2026-04-20  8:48   ` Andy Shevchenko
2026-04-20  9:08 ` [PATCH v1 0/2] firewire: Simplify storing pointers in device id struct Takashi Sakamoto
2026-04-20 17:39   ` Christian A. Ehrhardt
2026-04-21 12:53     ` Takashi Sakamoto
2026-04-21 14:07       ` Uwe Kleine-König (The Capable Hub)
2026-04-22  7:19         ` Andy Shevchenko
2026-04-22  8:30           ` Uwe Kleine-König (The Capable Hub)
2026-04-22  8:40             ` Uwe Kleine-König (The Capable Hub)
2026-04-22  9:40               ` Andy Shevchenko
2026-04-22 10:10                 ` Uwe Kleine-König (The Capable Hub)
2026-04-21 16:20       ` Christian A. Ehrhardt [this message]
2026-04-23 14:19 ` Takashi Sakamoto
2026-04-23 16:53   ` Uwe Kleine-König (The Capable Hub)
2026-04-27  6:37     ` Takashi Sakamoto
2026-04-27  8:07       ` Uwe Kleine-König (The Capable Hub)

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