From: Jaime Liao <jaimeliao.tw@gmail.com>
To: linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org,
tudor.ambarus@linaro.org, pratyush@kernel.org, mwalle@kernel.org,
miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
broonie@kernel.org
Cc: leoyu@mxic.com.tw, jaimeliao@mxic.com.tw
Subject: [PATCH v8 9/9] mtd: spi-nor: add support for Macronix Octal flash MX66 series
Date: Thu, 1 Feb 2024 17:43:53 +0800 [thread overview]
Message-ID: <20240201094353.33281-10-jaimeliao.tw@gmail.com> (raw)
In-Reply-To: <20240201094353.33281-1-jaimeliao.tw@gmail.com>
From: JaimeLiao <jaimeliao@mxic.com.tw>
Adding Macronix Octal flash for Octal DTR support.
Adding Manufacture ID 0xC2 in last of ID table because of
Octal Flash need manufacturer fixup for enabling/disabling
Octal DTR mode.
The octaflash series can be divided into the following types:
MX66 series : Serial NOR Flash with stacked die.(Size larger than 1Gb)
LM/UM series : Up to 250MHz clock frequency with both DTR/STR operation.
LW/UW series : Support simultaneous Read-while-Write operation in multiple
bank architecture. Read-while-write feature which means read
data one bank while another bank is programing or erasing.
MX66LW : 3.0V Octal I/O with Read-while-Write and stack die
MX66UW : 1.8V Octal I/O with Read-while-Write and stack die
MX66LM : 3.0V Octal I/O with stacked die
Link: https://www.mxic.com.tw/Lists/Datasheet/Attachments/8748/MX66LM1G45G,%203V,%201Gb,%20v1.1.pdf
MX66UM : 1.8V Octal I/O with stacked die
Link: https://www.mxic.com.tw/Lists/Datasheet/Attachments/8711/MX66UM1G45G,%201.8V,%201Gb,%20v1.1.pdf
Those flash have been tested on Xilinx Zynq-picozed board using
MXIC SPI controller.
As below are debugfs data, the SFDP table and result of mtd-utils
tests dump.
---
zynq> cat jedec_id
c2803b
zynq> cat manufacturer
macronix
zynq> cat partname
mx66um1g45g
zynq> xxd -p sfdp
53464450080104fd00070114400000ff8701011c900000ff0a0001080001
00ff05000105200100ff84000102340100ff0000000000000000ffffffff
ffffffffe5208affffffff3f00ff00ff00ff00ffeeffffffffff00ffffff
00ff0c2010d800ff00ff897901008d1200e2cc02674430b030b0f4bdd55c
000000ff101000200000000000007ca34800000000008888000000000000
00400fd1fff30fd1fff300050090000500b1002b0095002b0096727103b8
727103b80000000090a3188200c069960000000000000000727100987271
00b8727100990000000072710098727100f872710099727100f900000000
00000000011501d0727106d8000086500000060100000000020001030002
00000000060100000000000072060002000000eec0697272717100d8f7f6
000a000014359c8043060f0021dcffff
zynq> md5sum sfdp
eea09d64679e64f627402b39a177e356 sfdp
zynq> cat /sys/kernel/debug/spi-nor/spi0.0/capabilities
Supported read modes by the flash
1S-1S-1S
opcode 0x13
mode cycles 0
dummy cycles 0
8D-8D-8D
opcode 0xee
mode cycles 0
dummy cycles 20
Supported page program modes by the flash
1S-1S-1S
opcode 0x12
8D-8D-8D
opcode 0x12
zynq>
zynq> cat /sys/kernel/debug/spi-nor/spi0.0/params
name (null)
id c2 80 3b c2 80 3b
size 128 MiB
write size 1
page size 256
address nbytes 4
flags 4B_OPCODES | HAS_4BAIT | HAS_16BIT_SR | IO_MODE_EN_VOLATILE | SOFT_RESET | 1<<17
opcodes
read 0xee
dummy cycles 20
erase 0x21
program 0x12
8D extension invert
protocols
read 8D-8D-8D
write 8D-8D-8D
register 8D-8D-8D
erase commands
21 (4.00 KiB) [2]
dc (64.0 KiB) [3]
c7 (128 MiB)
sector map
region (in hex) | erase mask | flags
------------------+------------+----------
00000000-07ffffff | [ 23] |
zynq>
zynq> dd if=/dev/urandom of=./spi_test bs=1M count=2
2+0 records in
2+0 records out
2097152 bytes (2.0MB) copied, 0.099845 seconds, 20.0MB/s
zynq> mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash
zynq> mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
zynq> hexdump spi_read
0000000 ffff ffff ffff ffff ffff ffff ffff ffff
*
0200000
zynq> sha256sum spi_read
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read
zynq> mtd_debug write /dev/mtd0 0 2097152 spi_test
Copied 2097152 bytes from spi_test to address 0x00000000 in flash
zynq> mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
zynq> sha256sum spi_*
7f7b735ea26eb74d77203c82347a06b51e1ef1f5b9a0fda956ffc4087caa2ed8 spi_read
7f7b735ea26eb74d77203c82347a06b51e1ef1f5b9a0fda956ffc4087caa2ed8 spi_test
zynq> mtd_debug info /dev/mtd0
mtd.type = MTD_NORFLASH
mtd.flags = MTD_CAP_NORFLASH
mtd.size = 134217728 (128M)
mtd.erasesize = 4096 (4K)
mtd.writesize = 1
mtd.oobsize = 0
regions = 0
zynq> cat jedec_id
c2853b
zynq> cat manufacturer
macronix
zynq> cat partname
mx66lm1g45g
zynq> xxd -p sfdp
53464450080104fd00070114400000ff8701011c900000ff0a0001080001
00ff05000105200100ff84000102340100ff0000000000000000ffffffff
ffffffffe5208affffffff3f00ff00ff00ff00ffeeffffffffff00ffffff
00ff0c2010d800ff00ff87690100821200e2cc02673830b030b0f4bdd55c
000000ff101000200000000000007ca34800000000006666000000000000
00400fd1fff30fd1fff300050090000500b1002b0095002b0096727103b8
727103b80000000090a3188200c069960000000000000000727100987271
00b8727100990000000072710098727100f872710099727100f900000000
00000000011501d0727106d8000086500000060100000000020001030002
00000000060100000000000072060002000000eec0697272717100d8f7f6
0000000014351c0043060f0021dcffff
zynq> md5sum sfdp
7b46113b529d58a6335531a10f14a76e sfdp
zynq> cat /sys/kernel/debug/spi-nor/spi0.0/capabilities
Supported read modes by the flash
1S-1S-1S
opcode 0x13
mode cycles 0
dummy cycles 0
8D-8D-8D
opcode 0xee
mode cycles 0
dummy cycles 14
Supported page program modes by the flash
1S-1S-1S
opcode 0x12
8D-8D-8D
opcode 0x12
zynq>
zynq> cat /sys/kernel/debug/spi-nor/spi0.0/params
name (null)
id c2 85 3b c2 85 3b
size 128 MiB
write size 1
page size 256
address nbytes 4
flags 4B_OPCODES | HAS_4BAIT | HAS_16BIT_SR | IO_MODE_EN_VOLATILE | SOFT_RESET | 1<<17
opcodes
read 0xee
dummy cycles 14
erase 0x21
program 0x12
8D extension invert
protocols
read 8D-8D-8D
write 8D-8D-8D
register 8D-8D-8D
erase commands
21 (4.00 KiB) [2]
dc (64.0 KiB) [3]
c7 (128 MiB)
sector map
region (in hex) | erase mask | flags
------------------+------------+----------
00000000-07ffffff | [ 23] |
zynq>
zynq> dd if=/dev/urandom of=./spi_test bs=1M count=2
2+0 records in
2+0 records out
2097152 bytes (2.0MB) copied, 0.100305 seconds, 19.9MB/s
zynq> mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash
zynq> mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
zynq> hexdump spi_read
0000000 ffff ffff ffff ffff ffff ffff ffff ffff
*
0200000
zynq> sha256sum spi_read
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read
zynq> mtd_debug write /dev/mtd0 0 2097152 spi_test
Copied 2097152 bytes from spi_test to address 0x00000000 in flash
zynq> mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
zynq> sha256sum spi_*
5607ddcf8d16b481e78fc4e90b21795c19d1f9a7eb77182a20536cab82eb55a2 spi_read
5607ddcf8d16b481e78fc4e90b21795c19d1f9a7eb77182a20536cab82eb55a2 spi_test
zynq> mtd_debug info /dev/mtd0
mtd.type = MTD_NORFLASH
mtd.flags = MTD_CAP_NORFLASH
mtd.size = 134217728 (128M)
mtd.erasesize = 4096 (4K)
mtd.writesize = 1
mtd.oobsize = 0
regions = 0
Signed-off-by: JaimeLiao <jaimeliao@mxic.com.tw>
---
drivers/mtd/spi-nor/macronix.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
index 42b1e2fec4f2..ba729007a92e 100644
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -262,6 +262,13 @@ static const struct flash_info macronix_nor_parts[] = {
.id = SNOR_ID(0xc2, 0x80, 0x3a),
}, {
.id = SNOR_ID(0xc2, 0x85, 0x3a),
+ }, {
+ .id = SNOR_ID(0xc2, 0x80, 0x3b),
+ }, {
+ .id = SNOR_ID(0xc2, 0x85, 0x3b),
+ }, {
+ /* Need the manufacturer fixups. Keep this last */
+ .id = SNOR_ID(0xc2),
}
};
--
2.25.1
next prev parent reply other threads:[~2024-02-01 9:44 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-01 9:43 [PATCH v8 0/9] Add octal DTR support for Macronix flash Jaime Liao
2024-02-01 9:43 ` [PATCH v8 1/9] mtd: spi-nor: add Octal " Jaime Liao
2024-02-01 9:43 ` [PATCH v8 2/9] spi: spi-mem: Allow specifying the byte order in Octal DTR mode Jaime Liao
2024-02-01 12:04 ` Mark Brown
2024-02-01 15:18 ` Michael Walle
2024-02-01 9:43 ` [PATCH v8 3/9] mtd: spi-nor: core: " Jaime Liao
2024-02-01 15:28 ` Michael Walle
2024-02-01 9:43 ` [PATCH v8 4/9] mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT Jaime Liao
2024-02-01 9:43 ` [PATCH v8 5/9] spi: mxic: Add support for swapping byte Jaime Liao
2024-02-01 12:05 ` Mark Brown
2024-02-01 15:39 ` Michael Walle
2024-02-01 9:43 ` [PATCH v8 6/9] mtd: spi-nor: add support for Macronix Octal flash MX25 series with RWW feature Jaime Liao
2024-02-01 15:48 ` Michael Walle
2024-02-01 9:43 ` [PATCH v8 7/9] mtd: spi-nor: add support for Macronix Octal flash MX66 " Jaime Liao
2024-02-01 9:43 ` [PATCH v8 8/9] mtd: spi-nor: add support for Macronix Octal flash MX25 series Jaime Liao
2024-02-01 9:43 ` Jaime Liao [this message]
2024-02-01 15:52 ` [PATCH v8 9/9] mtd: spi-nor: add support for Macronix Octal flash MX66 series Michael Walle
2024-02-22 9:32 ` [PATCH v8 0/9] Add octal DTR support for Macronix flash Tudor Ambarus
2024-02-22 9:55 ` liao jaime
2024-02-26 2:02 ` Alvin Zhou
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