* [PATCH RFC/RFT 1/2] dt-bindings: net: sun8i-emac: Add A733 GMAC210 compatible
2026-07-31 16:30 [PATCH RFC/RFT 0/2] net: stmmac: Add support for Allwinner A733 GMAC210 Jerome Brunet
@ 2026-07-31 16:30 ` Jerome Brunet
2026-07-31 16:30 ` [PATCH RFC/RFT 2/2] net: stmmac: Add support for Allwinner A733 GMAC210 Jerome Brunet
1 sibling, 0 replies; 5+ messages in thread
From: Jerome Brunet @ 2026-07-31 16:30 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen-Yu Tsai, Jernej Skrabec, Samuel Holland, Richard Cochran,
Maxime Ripard, Maxime Coquelin, Alexandre Torgue, Philipp Zabel
Cc: netdev, devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
linux-stm32, Jerome Brunet
The A733 GMAC210 is a DesignWare MAC 5.20 close to the A523 GMAC200, with
the following differences:
* The glue configuration registers are a dedicated MMIO region of the
controller instead of a syscon register, so a second reg entry replaces
the syscon phandle.
* The DMA channels and the LPI event have their own interrupt lines.
* A PTP reference clock and an AHB reset are needed.
* Unlike the A523, the controller does not appear to belong to a power
domain.
* The TX clock delay field is 5 bits wide, allowing up to 3100ps.
Add the new compatible and describe those differences.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
.../bindings/net/allwinner,sun8i-a83t-emac.yaml | 130 ++++++++++++++++++---
1 file changed, 115 insertions(+), 15 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
index 323a669fa982..fec42f46378a 100644
--- a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
+++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
@@ -22,6 +22,7 @@ select:
- allwinner,sun8i-v3s-emac
- allwinner,sun50i-a64-emac
- allwinner,sun55i-a523-gmac200
+ - allwinner,sun60i-a733-gmac210
required:
- compatible
@@ -44,25 +45,38 @@ properties:
- items:
- const: allwinner,sun55i-a523-gmac200
- const: snps,dwmac-4.20a
+ - items:
+ - const: allwinner,sun60i-a733-gmac210
+ - const: snps,dwmac-5.20
reg:
- maxItems: 1
+ minItems: 1
+ items:
+ - description: MAC controller registers
+ - description: Glue configuration registers
interrupts:
- maxItems: 1
+ minItems: 1
+ maxItems: 4
interrupt-names:
- const: macirq
+ minItems: 1
+ items:
+ - const: macirq
+ - const: eth_lpi
+ - const: tx-queue-0
+ - const: rx-queue-0
clocks:
minItems: 1
- maxItems: 2
+ maxItems: 3
clock-names:
minItems: 1
items:
- const: stmmaceth
- const: mbus
+ - const: ptp_ref
phy-supply:
description: PHY regulator
@@ -87,7 +101,6 @@ required:
- reset-names
- phy-handle
- phy-mode
- - syscon
allOf:
- $ref: snps,dwmac.yaml#
@@ -219,36 +232,94 @@ allOf:
properties:
compatible:
contains:
- const: allwinner,sun55i-a523-gmac200
+ enum:
+ - allwinner,sun55i-a523-gmac200
+ - allwinner,sun60i-a733-gmac210
then:
properties:
- clocks:
- minItems: 2
- clock-names:
- minItems: 2
tx-internal-delay-ps:
default: 0
minimum: 0
- maximum: 700
multipleOf: 100
description:
- External RGMII PHY TX clock delay chain value in ps.
+ Internal RGMII PHY TX clock delay chain value in ps.
rx-internal-delay-ps:
default: 0
minimum: 0
maximum: 3100
multipleOf: 100
description:
- External RGMII PHY TX clock delay chain value in ps.
- required:
- - power-domains
+ Internal RGMII PHY RX clock delay chain value in ps.
else:
properties:
+ reg:
+ maxItems: 1
+ interrupts:
+ maxItems: 1
+ interrupt-names:
+ maxItems: 1
clocks:
maxItems: 1
clock-names:
maxItems: 1
power-domains: false
+ required:
+ - syscon
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: allwinner,sun55i-a523-gmac200
+ then:
+ properties:
+ reg:
+ maxItems: 1
+ interrupts:
+ maxItems: 1
+ interrupt-names:
+ maxItems: 1
+ clocks:
+ minItems: 2
+ maxItems: 2
+ clock-names:
+ minItems: 2
+ maxItems: 2
+ resets:
+ maxItems: 1
+ reset-names:
+ maxItems: 1
+ tx-internal-delay-ps:
+ maximum: 700
+ required:
+ - power-domains
+ - syscon
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: allwinner,sun60i-a733-gmac210
+ then:
+ properties:
+ reg:
+ minItems: 2
+ interrupts:
+ minItems: 4
+ interrupt-names:
+ minItems: 4
+ clocks:
+ minItems: 3
+ clock-names:
+ minItems: 3
+ resets:
+ minItems: 2
+ reset-names:
+ minItems: 2
+ tx-internal-delay-ps:
+ maximum: 3100
+ syscon: false
+ power-domains: false
unevaluatedProperties: false
@@ -412,4 +483,33 @@ examples:
};
};
};
+
+ - |
+ ethernet@4510000 {
+ compatible = "allwinner,sun60i-a733-gmac210",
+ "snps,dwmac-5.20";
+ reg = <0x04510000 0x8000>,
+ <0x04518000 0x1000>;
+ clocks = <&ccu 58>, <&ccu 59>, <&ccu 60>;
+ clock-names = "stmmaceth", "mbus", "ptp_ref";
+ resets = <&ccu 30>, <&ccu 31>;
+ reset-names = "stmmaceth", "ahb";
+ interrupts = <0 175 4>, <0 179 4>, <0 176 4>, <0 177 4>;
+ interrupt-names = "macirq", "eth_lpi", "tx-queue-0", "rx-queue-0";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii1_pins>;
+ phy-handle = <&ext_rgmii_phy_2>;
+ phy-mode = "rgmii-id";
+ snps,fixed-burst;
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ext_rgmii_phy_2: ethernet-phy@1 {
+ reg = <1>;
+ };
+ };
+ };
...
--
2.47.3
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH RFC/RFT 2/2] net: stmmac: Add support for Allwinner A733 GMAC210
2026-07-31 16:30 [PATCH RFC/RFT 0/2] net: stmmac: Add support for Allwinner A733 GMAC210 Jerome Brunet
2026-07-31 16:30 ` [PATCH RFC/RFT 1/2] dt-bindings: net: sun8i-emac: Add A733 GMAC210 compatible Jerome Brunet
@ 2026-07-31 16:30 ` Jerome Brunet
2026-08-01 16:30 ` sashiko-bot
1 sibling, 1 reply; 5+ messages in thread
From: Jerome Brunet @ 2026-07-31 16:30 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen-Yu Tsai, Jernej Skrabec, Samuel Holland, Richard Cochran,
Maxime Ripard, Maxime Coquelin, Alexandre Torgue, Philipp Zabel
Cc: netdev, devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
linux-stm32, Jerome Brunet
The A733 GMAC210 is a DesignWare MAC 5.20 using an Allwinner glue close to
the A523 GMAC200 already supported by this driver, with the following
differences to handle:
* The glue configuration registers are a dedicated MMIO region of the
controller instead of a syscon register. This new register region
appears to be in the reset domain of stmmac's main reset. This requires
the glue driver to handle the reset rather than letting stmmac deal with
it.
* The TX clock delay value is 5 bits wide, split over 2 register fields,
allowing delays up to 3100ps.
* The DMA channels have their own interrupt lines, so the per-DMA-channel
interrupt mode is enabled, as the vendor SDK does.
* TX LPI clock gating is supported, as the vendor SDK indicates. Follow
the PHY capability with STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP rather than
forcing it on with the deprecated 'snps,en-tx-lpi-clockgating' DT
property.
Unlike the A523, both GMAC instances are supported by the same driver.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c | 145 ++++++++++++++++++---
1 file changed, 127 insertions(+), 18 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c
index 862df173d963..3d434a52fb02 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c
@@ -10,21 +10,22 @@
*/
#include <linux/bitfield.h>
+#include <linux/bitops.h>
#include <linux/bits.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/phy.h>
#include <linux/platform_device.h>
+#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
+#include <linux/reset.h>
#include <linux/stmmac.h>
#include "stmmac.h"
#include "stmmac_platform.h"
-#define SYSCON_REG 0x34
-
/* RMII specific bits */
#define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */
/* Generic system control EMAC_CLK bits */
@@ -37,17 +38,99 @@
#define SYSCON_ETCS_EXT_GMII 0x1
#define SYSCON_ETCS_INT_GMII 0x2
-static int sun55i_gmac200_set_syscon(struct device *dev,
- struct plat_stmmacenet_data *plat)
+struct sun55i_gmac_data {
+ struct regmap *(*get_regmap)(struct platform_device *pdev,
+ struct plat_stmmacenet_data *plat);
+ unsigned int flags;
+ u32 etxdc_ext_mask;
+ u32 offset;
+};
+
+static struct regmap *sun55i_gmac200_get_regmap(struct platform_device *pdev,
+ struct plat_stmmacenet_data *plat)
+{
+ struct regmap *map =
+ syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "syscon");
+
+ if (IS_ERR(map))
+ dev_err_probe(&pdev->dev, PTR_ERR(map), "Unable to map syscon\n");
+
+ return map;
+}
+
+static const struct regmap_config sun60i_a733_regmap_cfg = {
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+};
+
+static void sun60i_gmac210_reset_assert(void *data)
{
- struct device_node *node = dev->of_node;
+ struct reset_control *rst = data;
+
+ reset_control_assert(rst);
+}
+
+static struct regmap *sun60i_gmac210_get_regmap(struct platform_device *pdev,
+ struct plat_stmmacenet_data *plat)
+{
+ struct device *dev = &pdev->dev;
+ void __iomem *base;
+ int ret;
+
+ base = devm_platform_ioremap_resource(pdev, 1);
+ if (IS_ERR(base)) {
+ dev_err_probe(dev, PTR_ERR(base), "unable to get glue memory region\n");
+ return ERR_CAST(base);
+ }
+
+ if (!plat->stmmac_rst || !plat->stmmac_ahb_rst) {
+ dev_err(dev, "missing required reset controls\n");
+ return ERR_PTR(-EINVAL);
+ }
+
+ /*
+ * The configuration registers are inside the controller
+ * reset domain, so the reset must happen before any write to them
+ * and should not be done again by stmmac or the configuration will
+ * be lost.
+ */
+ ret = reset_control_assert(plat->stmmac_rst);
+ if (!ret)
+ ret = reset_control_deassert(plat->stmmac_rst);
+
+ if (ret) {
+ dev_err_probe(dev, ret, "device reset failed\n");
+ return ERR_PTR(ret);
+ }
+
+ ret = devm_add_action_or_reset(dev, sun60i_gmac210_reset_assert,
+ plat->stmmac_rst);
+ if (ret)
+ return ERR_PTR(ret);
+
+ plat->stmmac_rst = NULL;
+
+ return devm_regmap_init_mmio(&pdev->dev, base, &sun60i_a733_regmap_cfg);
+}
+
+static int sun55i_gmac200_setup(struct platform_device *pdev,
+ struct plat_stmmacenet_data *plat,
+ const struct sun55i_gmac_data *data)
+{
+ unsigned int lo_bits = hweight32(SYSCON_ETXDC_MASK);
+ struct device_node *node = pdev->dev.of_node;
+ struct device *dev = &pdev->dev;
struct regmap *regmap;
u32 val, reg = 0;
+ u32 max_delay;
int ret;
- regmap = syscon_regmap_lookup_by_phandle(node, "syscon");
+ max_delay = (1U << (lo_bits + hweight32(data->etxdc_ext_mask))) - 1;
+
+ regmap = data->get_regmap(pdev, plat);
if (IS_ERR(regmap))
- return dev_err_probe(dev, PTR_ERR(regmap), "Unable to map syscon\n");
+ return PTR_ERR(regmap);
if (!of_property_read_u32(node, "tx-internal-delay-ps", &val)) {
if (val % 100)
@@ -55,12 +138,15 @@ static int sun55i_gmac200_set_syscon(struct device *dev,
"tx-delay must be a multiple of 100ps\n");
val /= 100;
dev_dbg(dev, "set tx-delay to %x\n", val);
- if (!FIELD_FIT(SYSCON_ETXDC_MASK, val))
+ if (val > max_delay)
return dev_err_probe(dev, -EINVAL,
- "TX clock delay exceeds maximum (%u00ps > %lu00ps)\n",
- val, FIELD_MAX(SYSCON_ETXDC_MASK));
+ "TX clock delay exceeds maximum (%u00ps > %u00ps)\n",
+ val, max_delay);
- reg |= FIELD_PREP(SYSCON_ETXDC_MASK, val);
+ reg |= field_prep(SYSCON_ETXDC_MASK, val);
+ if (data->etxdc_ext_mask)
+ reg |= field_prep(data->etxdc_ext_mask,
+ val >> lo_bits);
}
if (!of_property_read_u32(node, "rx-internal-delay-ps", &val)) {
@@ -95,21 +181,29 @@ static int sun55i_gmac200_set_syscon(struct device *dev,
phy_modes(plat->phy_interface));
}
- ret = regmap_write(regmap, SYSCON_REG, reg);
+ ret = regmap_write(regmap, data->offset, reg);
if (ret < 0)
return dev_err_probe(dev, ret, "Failed to write to syscon\n");
+ plat->flags |= data->flags;
+ plat->host_dma_width = 32;
+
return 0;
}
static int sun55i_gmac200_probe(struct platform_device *pdev)
{
struct plat_stmmacenet_data *plat_dat;
+ const struct sun55i_gmac_data *data;
struct stmmac_resources stmmac_res;
struct device *dev = &pdev->dev;
struct clk *clk;
int ret;
+ data = device_get_match_data(dev);
+ if (!data)
+ return -EINVAL;
+
ret = stmmac_get_platform_resources(pdev, &stmmac_res);
if (ret)
return ret;
@@ -118,11 +212,7 @@ static int sun55i_gmac200_probe(struct platform_device *pdev)
if (IS_ERR(plat_dat))
return PTR_ERR(plat_dat);
- /* BSP disables it */
- plat_dat->flags |= STMMAC_FLAG_SPH_DISABLE;
- plat_dat->host_dma_width = 32;
-
- ret = sun55i_gmac200_set_syscon(dev, plat_dat);
+ ret = sun55i_gmac200_setup(pdev, plat_dat, data);
if (ret)
return ret;
@@ -138,8 +228,27 @@ static int sun55i_gmac200_probe(struct platform_device *pdev)
return devm_stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res);
}
+static const struct sun55i_gmac_data sun55i_a523_gmac200_data = {
+ .get_regmap = sun55i_gmac200_get_regmap,
+ .flags = STMMAC_FLAG_SPH_DISABLE,
+ .offset = 0x34,
+ .etxdc_ext_mask = 0,
+};
+
+static const struct sun55i_gmac_data sun60i_a733_gmac210_data = {
+ .get_regmap = sun60i_gmac210_get_regmap,
+ .flags = (STMMAC_FLAG_SPH_DISABLE |
+ STMMAC_FLAG_MULTI_MSI_EN |
+ STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP),
+ .offset = 0x0,
+ .etxdc_ext_mask = GENMASK(17, 16),
+};
+
static const struct of_device_id sun55i_gmac200_match[] = {
- { .compatible = "allwinner,sun55i-a523-gmac200" },
+ { .compatible = "allwinner,sun55i-a523-gmac200",
+ .data = &sun55i_a523_gmac200_data },
+ { .compatible = "allwinner,sun60i-a733-gmac210",
+ .data = &sun60i_a733_gmac210_data },
{ }
};
MODULE_DEVICE_TABLE(of, sun55i_gmac200_match);
--
2.47.3
^ permalink raw reply related [flat|nested] 5+ messages in thread