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* [PATCH] usb: dwc3: qcom: Add support to skip phy management by USB core
@ 2026-07-23 10:54 Krishna Kurapati
  2026-08-04 23:38 ` Thinh Nguyen
  0 siblings, 1 reply; 2+ messages in thread
From: Krishna Kurapati @ 2026-07-23 10:54 UTC (permalink / raw)
  To: Thinh Nguyen, Greg Kroah-Hartman
  Cc: linux-arm-msm, linux-usb, linux-kernel, Krishna Kurapati

DWC3 driver does manage phys itself sufficiently for Qualcomm platforms.
If xhci-skip-phy-init is not set, the HCD core does a phy_init and phy_
exit is done only when roothub is being destroyed. Due to this, during
system suspend in host mode, although phy_exit is done by DWC3 core, the
init_count on phy is never down to zero since HCD core also did an init.
consequently causing phy's exit routine to not be called. Hence, add
support to skip phy management by USB core.

Some Exynos platforms still do rely on USB core for phy_calibrate calls,
hence disable USB core management for Qualcomm platforms only.

Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
---
Link to PHY calibrate handling for Exynos platforms:
https://lore.kernel.org/all/20190829053028.32438-1-m.szyprowski@samsung.com/
---
 drivers/usb/dwc3/dwc3-qcom.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
index ac68b4218b56..ba26e61df915 100644
--- a/drivers/usb/dwc3/dwc3-qcom.c
+++ b/drivers/usb/dwc3/dwc3-qcom.c
@@ -19,6 +19,7 @@
 #include <linux/iopoll.h>
 #include <linux/usb/hcd.h>
 #include <linux/usb.h>
+#include <linux/property.h>
 #include "core.h"
 #include "glue.h"
 
@@ -419,6 +420,16 @@ static irqreturn_t qcom_dwc3_resume_irq(int irq, void *data)
 	return IRQ_HANDLED;
 }
 
+static int dwc3_qcom_set_swnode(struct device *dev)
+{
+	const struct property_entry props[] = {
+		PROPERTY_ENTRY_BOOL("xhci-skip-phy-init-quirk"),
+		{}
+	};
+
+	return device_create_managed_software_node(dev, props, NULL);
+}
+
 static void dwc3_qcom_select_utmi_clk(struct dwc3_qcom *qcom)
 {
 	/* Configure dwc3 to use UTMI clock as PIPE clock not present */
@@ -683,6 +694,10 @@ static int dwc3_qcom_probe(struct platform_device *pdev)
 	if (ignore_pipe_clk)
 		dwc3_qcom_select_utmi_clk(qcom);
 
+	ret = dwc3_qcom_set_swnode(dev);
+	if (ret)
+		goto clk_disable;
+
 	qcom->mode = usb_get_dr_mode(dev);
 
 	if (qcom->mode == USB_DR_MODE_HOST) {

---
base-commit: 80574c40598aedbc1751c528e414d7e224bc6313
change-id: 20260720-dwc3-skip-init-quirk-c110eae068ac

Best regards,
--  
Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] usb: dwc3: qcom: Add support to skip phy management by USB core
  2026-07-23 10:54 [PATCH] usb: dwc3: qcom: Add support to skip phy management by USB core Krishna Kurapati
@ 2026-08-04 23:38 ` Thinh Nguyen
  0 siblings, 0 replies; 2+ messages in thread
From: Thinh Nguyen @ 2026-08-04 23:38 UTC (permalink / raw)
  To: Krishna Kurapati
  Cc: Thinh Nguyen, Greg Kroah-Hartman, linux-arm-msm@vger.kernel.org,
	linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org

On Thu, Jul 23, 2026, Krishna Kurapati wrote:
> DWC3 driver does manage phys itself sufficiently for Qualcomm platforms.
> If xhci-skip-phy-init is not set, the HCD core does a phy_init and phy_
> exit is done only when roothub is being destroyed. Due to this, during
> system suspend in host mode, although phy_exit is done by DWC3 core, the
> init_count on phy is never down to zero since HCD core also did an init.
> consequently causing phy's exit routine to not be called. Hence, add
> support to skip phy management by USB core.
> 
> Some Exynos platforms still do rely on USB core for phy_calibrate calls,
> hence disable USB core management for Qualcomm platforms only.

So this is a fix applicable to all qcom platforms right? Do we need to
add Fixes tag and backport this change?

Regardless,

Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>

Thanks,
Thinh

> 
> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> ---
> Link to PHY calibrate handling for Exynos platforms:
> https://urldefense.com/v3/__https://lore.kernel.org/all/20190829053028.32438-1-m.szyprowski@samsung.com/__;!!A4F2R9G_pg!aP037GeN4WssfY2NPRwwFsPNYLtng9TCmzBFu8aoGmYWzLzD7vxM-Mt1sOwfv6KUBe7GsvyRbuktzot9dM8jEcYTWSdnmhMkjHJ3rQ$ 
> ---
>  drivers/usb/dwc3/dwc3-qcom.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
> index ac68b4218b56..ba26e61df915 100644
> --- a/drivers/usb/dwc3/dwc3-qcom.c
> +++ b/drivers/usb/dwc3/dwc3-qcom.c
> @@ -19,6 +19,7 @@
>  #include <linux/iopoll.h>
>  #include <linux/usb/hcd.h>
>  #include <linux/usb.h>
> +#include <linux/property.h>
>  #include "core.h"
>  #include "glue.h"
>  
> @@ -419,6 +420,16 @@ static irqreturn_t qcom_dwc3_resume_irq(int irq, void *data)
>  	return IRQ_HANDLED;
>  }
>  
> +static int dwc3_qcom_set_swnode(struct device *dev)
> +{
> +	const struct property_entry props[] = {
> +		PROPERTY_ENTRY_BOOL("xhci-skip-phy-init-quirk"),
> +		{}
> +	};
> +
> +	return device_create_managed_software_node(dev, props, NULL);
> +}
> +
>  static void dwc3_qcom_select_utmi_clk(struct dwc3_qcom *qcom)
>  {
>  	/* Configure dwc3 to use UTMI clock as PIPE clock not present */
> @@ -683,6 +694,10 @@ static int dwc3_qcom_probe(struct platform_device *pdev)
>  	if (ignore_pipe_clk)
>  		dwc3_qcom_select_utmi_clk(qcom);
>  
> +	ret = dwc3_qcom_set_swnode(dev);
> +	if (ret)
> +		goto clk_disable;
> +
>  	qcom->mode = usb_get_dr_mode(dev);
>  
>  	if (qcom->mode == USB_DR_MODE_HOST) {
> 
> ---
> base-commit: 80574c40598aedbc1751c528e414d7e224bc6313
> change-id: 20260720-dwc3-skip-init-quirk-c110eae068ac
> 
> Best regards,
> --  
> Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> 

^ permalink raw reply	[flat|nested] 2+ messages in thread

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