From: Wade Farnsworth <wfarnsworth@mvista.com>
To: linuxppc-embedded <linuxppc-embedded@ozlabs.org>
Subject: [PATCH 0/6] AMCC 440SP/Luan board enhancements & fixes
Date: 01 Mar 2006 16:35:13 -0700 [thread overview]
Message-ID: <1141256113.25761.14.camel@rhino.az.mvista.com> (raw)
Greetings,
The following patches are enhancements and/or fixes for the AMCC 440SP
SoC and the Luan board. Most notably there is support for UART2 and the
L2 Cache, as well as increased flexibility for the PCIX bridges.
--Wade Farnsworth
next reply other threads:[~2006-03-01 23:57 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-03-01 23:35 Wade Farnsworth [this message]
2006-03-01 23:45 ` [PATCH 1/6] Support for UART 2 on 440SP and Luan Wade Farnsworth
2006-03-01 23:47 ` [PATCH 2/6] Add UIC settings for 440SP & Luan Wade Farnsworth
2006-03-01 23:50 ` [PATCH 3/6] PCIX fixes and enhancements " Wade Farnsworth
2006-03-01 23:51 ` [PATCH 4/6] L2 Cache support for 440SP Wade Farnsworth
2006-03-01 23:52 ` [PATCH 5/6] Clock and power management define fixes " Wade Farnsworth
2006-03-01 23:54 ` [PATCH 6/6] MTD defines for Luan Wade Farnsworth
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