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From: Wade Farnsworth <wfarnsworth@mvista.com>
To: linuxppc-embedded <linuxppc-embedded@ozlabs.org>
Subject: Re: [PATCH 2/6] Add UIC settings for 440SP & Luan
Date: 01 Mar 2006 16:47:39 -0700	[thread overview]
Message-ID: <1141256859.25758.22.camel@rhino.az.mvista.com> (raw)
In-Reply-To: <1141256751.25761.19.camel@rhino.az.mvista.com>

[-- Attachment #1: Type: text/plain, Size: 156 bytes --]

This adds the necessary structures for the UIC polarity and triggering
on the 440SP & Luan.

-Wade

Signed off by: Wade Farnsworth <wfarnsworth@mvista.com>

[-- Attachment #2: luan-uic.patch --]
[-- Type: text/x-patch, Size: 1590 bytes --]

diff --git a/arch/ppc/platforms/4xx/ibm440sp.c b/arch/ppc/platforms/4xx/ibm440sp.c
--- a/arch/ppc/platforms/4xx/ibm440sp.c
+++ b/arch/ppc/platforms/4xx/ibm440sp.c
@@ -19,6 +19,7 @@
 #include <linux/module.h>
 #include <platforms/4xx/ibm440sp.h>
 #include <asm/ocp.h>
+#include <asm/ppc4xx_pic.h>
 
 static struct ocp_func_emac_data ibm440sp_emac0_def = {
 	.rgmii_idx	= -1,		/* No RGMII */
@@ -129,3 +130,15 @@ struct ocp_def core_ocp[] = {
 	{ .vendor	= OCP_VENDOR_INVALID
 	}
 };
+
+/* Polarity and triggering settings for internal interrupt sources */
+struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = {
+	{ .polarity     = 0xffffffff,
+	  .triggering   = 0x01084004,
+	  .ext_irq_mask = 0x00000000,
+	},
+	{ .polarity     = 0x7fff83ff,
+	  .triggering   = 0x00000000,
+	  .ext_irq_mask = 0x80007c00,   /* IRQ7 - IRQ9 */
+	},
+};
diff --git a/arch/ppc/platforms/4xx/luan.c b/arch/ppc/platforms/4xx/luan.c
--- a/arch/ppc/platforms/4xx/luan.c
+++ b/arch/ppc/platforms/4xx/luan.c
@@ -56,6 +56,18 @@ extern bd_t __res;
 
 static struct ibm44x_clocks clocks __initdata;
 
+/*
+ * Luan external IRQ triggering/polarity settings
+ */
+unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata = {
+	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ0 */
+	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ1 */
+	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ2 */
+	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ3 */
+	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ4 */
+	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ5 */
+};
+
 static void __init
 luan_calibrate_decr(void)
 {

  reply	other threads:[~2006-03-01 23:47 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-03-01 23:35 [PATCH 0/6] AMCC 440SP/Luan board enhancements & fixes Wade Farnsworth
2006-03-01 23:45 ` [PATCH 1/6] Support for UART 2 on 440SP and Luan Wade Farnsworth
2006-03-01 23:47   ` Wade Farnsworth [this message]
2006-03-01 23:50     ` [PATCH 3/6] PCIX fixes and enhancements for 440SP & Luan Wade Farnsworth
2006-03-01 23:51       ` [PATCH 4/6] L2 Cache support for 440SP Wade Farnsworth
2006-03-01 23:52         ` [PATCH 5/6] Clock and power management define fixes " Wade Farnsworth
2006-03-01 23:54           ` [PATCH 6/6] MTD defines for Luan Wade Farnsworth

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