[PATCH] mpic: add support for serial mode interrupts

[PATCH] mpic: add support for serial mode interrupts

[Mark A. Greer]

MPC10x-style interrupt controllers have a serial mode that allows
several interrupts to be clocked in through one INT signal.

This patch adds the software support for that mode.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
--

 arch/powerpc/sysdev/mpic.c |    6 ++++++
 include/asm-powerpc/mpic.h |    2 ++
 2 files changed, 8 insertions(+)
--

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 7dcdfcb..1829aed 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -629,6 +629,12 @@ #endif /* CONFIG_SMP */
 			mb();
 	}
 
+	/* For serial interrupts & set clock ratio */
+	if (flags & MPIC_SERIAL_MODE)
+		mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1,
+			mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1)
+				| (1<<27) | (0x7<<28));
+
 	/* Read feature register, calculate num CPUs and, for non-ISU
 	 * MPICs, num sources as well. On ISU MPICs, sources are counted
 	 * as ISUs are added
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h
index 6b9e781..f35ccdc 100644
--- a/include/asm-powerpc/mpic.h
+++ b/include/asm-powerpc/mpic.h
@@ -186,6 +186,8 @@ #define MPIC_BROKEN_U3			0x00000004
 #define MPIC_BROKEN_IPI			0x00000008
 /* MPIC wants a reset */
 #define MPIC_WANTS_RESET		0x00000010
+/* MPIC serial mode */
+#define MPIC_SERIAL_MODE		0x00000020
 
 /* Allocate the controller structure and setup the linux irq descs
  * for the range if interrupts passed in. No HW initialization is

Re: [PATCH] mpic: add support for serial mode interrupts

[Olof Johansson]

Hi,

On Mon, Jun 19, 2006 at 01:08:11PM -0700, Mark A. Greer wrote:
> MPC10x-style interrupt controllers have a serial mode that allows
> several interrupts to be clocked in through one INT signal.
[...]
> +	/* For serial interrupts & set clock ratio */
> +	if (flags & MPIC_SERIAL_MODE)
> +		mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1,
> +			mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1)
> +				| (1<<27) | (0x7<<28));

Can you define some constants so others can see just what the bits mean
without digging up documentation, instead of just doing magic numbers?

MPIC_GREG_GLOBAL_CONF_0 already does so; you can copy the style from
there.


Thanks,

-Olof

Re: [PATCH] mpic: add support for serial mode interrupts

[Mark A. Greer]

On Mon, Jun 19, 2006 at 03:11:21PM -0500, Olof Johansson wrote:
> Hi,
> 
> On Mon, Jun 19, 2006 at 01:08:11PM -0700, Mark A. Greer wrote:
> > MPC10x-style interrupt controllers have a serial mode that allows
> > several interrupts to be clocked in through one INT signal.
> [...]
> > +	/* For serial interrupts & set clock ratio */
> > +	if (flags & MPIC_SERIAL_MODE)
> > +		mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1,
> > +			mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1)
> > +				| (1<<27) | (0x7<<28));
> 
> Can you define some constants so others can see just what the bits mean
> without digging up documentation, instead of just doing magic numbers?

Yeah, I can probably do that...  :)

Mark

Re: [PATCH] mpic: add support for serial mode interrupts

[Mark A. Greer]

[This patch completely replaces the previous patch.]

MPC10x-style interrupt controllers have a serial mode that allows
several interrupts to be clocked in through one INT signal.

This patch adds the software support for that mode.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
--

 arch/powerpc/sysdev/mpic.c |    8 ++++++++
 include/asm-powerpc/mpic.h |    5 +++++
 2 files changed, 13 insertions(+)
--

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 7dcdfcb..397b886 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -629,6 +629,14 @@ #endif /* CONFIG_SMP */
 			mb();
 	}
 
+	/* For serial interrupts & set clock ratio */
+	if (flags & MPIC_SERIAL_MODE)
+		mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1,
+			(mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1)
+				& ~MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK)
+					| MPIC_GREG_GLOBAL_CONF_1_SIE
+					| MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO(7));
+
 	/* Read feature register, calculate num CPUs and, for non-ISU
 	 * MPICs, num sources as well. On ISU MPICs, sources are counted
 	 * as ISUs are added
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h
index 6b9e781..0be8254 100644
--- a/include/asm-powerpc/mpic.h
+++ b/include/asm-powerpc/mpic.h
@@ -22,6 +22,9 @@ #define		MPIC_GREG_GCONF_RESET			0x80000
 #define		MPIC_GREG_GCONF_8259_PTHROU_DIS		0x20000000
 #define		MPIC_GREG_GCONF_BASE_MASK		0x000fffff
 #define MPIC_GREG_GLOBAL_CONF_1		0x00030
+#define		MPIC_GREG_GLOBAL_CONF_1_SIE		0x08000000/*Serial Int*/
+#define		MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK	0x70000000
+#define		MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO(r)	(((r) & 0x7) << 28)
 #define MPIC_GREG_VENDOR_0		0x00040
 #define MPIC_GREG_VENDOR_1		0x00050
 #define MPIC_GREG_VENDOR_2		0x00060
@@ -186,6 +189,8 @@ #define MPIC_BROKEN_U3			0x00000004
 #define MPIC_BROKEN_IPI			0x00000008
 /* MPIC wants a reset */
 #define MPIC_WANTS_RESET		0x00000010
+/* MPIC serial mode */
+#define MPIC_SERIAL_MODE		0x00000020
 
 /* Allocate the controller structure and setup the linux irq descs
  * for the range if interrupts passed in. No HW initialization is

Re: [PATCH] mpic: add support for serial mode interrupts

[Segher Boessenkool]

> Can you define some constants so others can see just what the bits  
> mean
> without digging up documentation, instead of just doing magic numbers?

[my favourite argument :-) ]

You'll have to read the documentation to properly understand what
the bit patterns mean anyway.  And if you use symbolic names, you
only add another step: hunting through header files.

> MPIC_GREG_GLOBAL_CONF_0 already does so; you can copy the style from
> there.

...but yeah, definitely, mixing styles is at least as bad.


Segher

Re: [PATCH] mpic: add support for serial mode interrupts

[Benjamin Herrenschmidt]

On Mon, 2006-06-19 at 13:08 -0700, Mark A. Greer wrote:
> MPC10x-style interrupt controllers have a serial mode that allows
> several interrupts to be clocked in through one INT signal.
> 
> This patch adds the software support for that mode.

You hard code the clock ratio... why not add a separate call to be
called after mpic_init,
something like mpic_set_serial_int(int mpic, int enable, int
clock_ratio) ?

Ben.

> Signed-off-by: Mark A. Greer <mgreer@mvista.com>
> --
> 
>  arch/powerpc/sysdev/mpic.c |    6 ++++++
>  include/asm-powerpc/mpic.h |    2 ++
>  2 files changed, 8 insertions(+)
> --
> 
> diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
> index 7dcdfcb..1829aed 100644
> --- a/arch/powerpc/sysdev/mpic.c
> +++ b/arch/powerpc/sysdev/mpic.c
> @@ -629,6 +629,12 @@ #endif /* CONFIG_SMP */
>  			mb();
>  	}
>  
> +	/* For serial interrupts & set clock ratio */
> +	if (flags & MPIC_SERIAL_MODE)
> +		mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1,
> +			mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1)
> +				| (1<<27) | (0x7<<28));
> +
>  	/* Read feature register, calculate num CPUs and, for non-ISU
>  	 * MPICs, num sources as well. On ISU MPICs, sources are counted
>  	 * as ISUs are added
> diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h
> index 6b9e781..f35ccdc 100644
> --- a/include/asm-powerpc/mpic.h
> +++ b/include/asm-powerpc/mpic.h
> @@ -186,6 +186,8 @@ #define MPIC_BROKEN_U3			0x00000004
>  #define MPIC_BROKEN_IPI			0x00000008
>  /* MPIC wants a reset */
>  #define MPIC_WANTS_RESET		0x00000010
> +/* MPIC serial mode */
> +#define MPIC_SERIAL_MODE		0x00000020
>  
>  /* Allocate the controller structure and setup the linux irq descs
>   * for the range if interrupts passed in. No HW initialization is
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev

Re: [PATCH] mpic: add support for serial mode interrupts

[Mark A. Greer]

On Tue, Jun 20, 2006 at 02:01:26PM +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2006-06-19 at 13:08 -0700, Mark A. Greer wrote:
> > MPC10x-style interrupt controllers have a serial mode that allows
> > several interrupts to be clocked in through one INT signal.
> > 
> > This patch adds the software support for that mode.
> 
> You hard code the clock ratio...

Basically, I just brought what was already in ppc over to powerpc.
I didn't really think about it much.

> why not add a separate call to be called after mpic_init,
> something like mpic_set_serial_int(int mpic, int enable, int
> clock_ratio) ?

Yeah, that's a better way to do it.

I'll make a new patch.

Mark

Re: [PATCH] mpic: add support for serial mode interrupts

[Mark A. Greer]

On Tue, Jun 20, 2006 at 02:01:26PM +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2006-06-19 at 13:08 -0700, Mark A. Greer wrote:
> > MPC10x-style interrupt controllers have a serial mode that allows
> > several interrupts to be clocked in through one INT signal.
> > 
> > This patch adds the software support for that mode.
> 
> You hard code the clock ratio... why not add a separate call to be
> called after mpic_init,
> something like mpic_set_serial_int(int mpic, int enable, int
> clock_ratio) ?

How's this?
--

MPC10x-style interrupt controllers have a serial mode that allows
several interrupts to be clocked in through one INT signal.

This patch adds the software support for that mode.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
--

 arch/powerpc/sysdev/mpic.c |   20 ++++++++++++++++++++
 include/asm-powerpc/mpic.h |   10 ++++++++++
 2 files changed, 30 insertions(+)
--

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 7dcdfcb..bffe50d 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -829,7 +829,27 @@ #endif
 	mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, 0);
 }
 
+void __init mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio)
+{
+	u32 v;
+
+	v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1);
+	v &= ~MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK;
+	v |= MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO(clock_ratio);
+	mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v);
+}
 
+void __init mpic_set_serial_int(struct mpic *mpic, int enable)
+{
+	u32 v;
+
+	v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1);
+	if (enable)
+		v |= MPIC_GREG_GLOBAL_CONF_1_SIE;
+	else
+		v &= ~MPIC_GREG_GLOBAL_CONF_1_SIE;
+	mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v);
+}
 
 void mpic_irq_set_priority(unsigned int irq, unsigned int pri)
 {
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h
index 6b9e781..f0d22ac 100644
--- a/include/asm-powerpc/mpic.h
+++ b/include/asm-powerpc/mpic.h
@@ -22,6 +22,10 @@ #define		MPIC_GREG_GCONF_RESET			0x80000
 #define		MPIC_GREG_GCONF_8259_PTHROU_DIS		0x20000000
 #define		MPIC_GREG_GCONF_BASE_MASK		0x000fffff
 #define MPIC_GREG_GLOBAL_CONF_1		0x00030
+#define		MPIC_GREG_GLOBAL_CONF_1_SIE		0x08000000
+#define		MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK	0x70000000
+#define		MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO(r)	\
+			(((r) << 28) & MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK)
 #define MPIC_GREG_VENDOR_0		0x00040
 #define MPIC_GREG_VENDOR_1		0x00050
 #define MPIC_GREG_VENDOR_2		0x00060
@@ -284,6 +288,12 @@ extern int mpic_get_one_irq(struct mpic 
 /* This one gets to the primary mpic */
 extern int mpic_get_irq(struct pt_regs *regs);
 
+/* Set the EPIC clock ratio */
+void mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio);
+
+/* Enable/Disable EPIC serial interrupt mode */
+void mpic_set_serial_int(struct mpic *mpic, int enable);
+
 /* global mpic for pSeries */
 extern struct mpic *pSeries_mpic;
 

Re: [PATCH] mpic: add support for serial mode interrupts

[Benjamin Herrenschmidt]

On Tue, 2006-06-20 at 14:15 -0700, Mark A. Greer wrote:
> On Tue, Jun 20, 2006 at 02:01:26PM +1000, Benjamin Herrenschmidt wrote:
> > On Mon, 2006-06-19 at 13:08 -0700, Mark A. Greer wrote:
> > > MPC10x-style interrupt controllers have a serial mode that allows
> > > several interrupts to be clocked in through one INT signal.
> > > 
> > > This patch adds the software support for that mode.
> > 
> > You hard code the clock ratio... why not add a separate call to be
> > called after mpic_init,
> > something like mpic_set_serial_int(int mpic, int enable, int
> > clock_ratio) ?
> 
> How's this?

Looks good to me.

Ben.

> --
> 
> MPC10x-style interrupt controllers have a serial mode that allows
> several interrupts to be clocked in through one INT signal.
> 
> This patch adds the software support for that mode.
> 
> Signed-off-by: Mark A. Greer <mgreer@mvista.com>
> --
> 
>  arch/powerpc/sysdev/mpic.c |   20 ++++++++++++++++++++
>  include/asm-powerpc/mpic.h |   10 ++++++++++
>  2 files changed, 30 insertions(+)
> --
> 
> diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
> index 7dcdfcb..bffe50d 100644
> --- a/arch/powerpc/sysdev/mpic.c
> +++ b/arch/powerpc/sysdev/mpic.c
> @@ -829,7 +829,27 @@ #endif
>  	mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, 0);
>  }
>  
> +void __init mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio)
> +{
> +	u32 v;
> +
> +	v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1);
> +	v &= ~MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK;
> +	v |= MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO(clock_ratio);
> +	mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v);
> +}
>  
> +void __init mpic_set_serial_int(struct mpic *mpic, int enable)
> +{
> +	u32 v;
> +
> +	v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1);
> +	if (enable)
> +		v |= MPIC_GREG_GLOBAL_CONF_1_SIE;
> +	else
> +		v &= ~MPIC_GREG_GLOBAL_CONF_1_SIE;
> +	mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v);
> +}
>  
>  void mpic_irq_set_priority(unsigned int irq, unsigned int pri)
>  {
> diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h
> index 6b9e781..f0d22ac 100644
> --- a/include/asm-powerpc/mpic.h
> +++ b/include/asm-powerpc/mpic.h
> @@ -22,6 +22,10 @@ #define		MPIC_GREG_GCONF_RESET			0x80000
>  #define		MPIC_GREG_GCONF_8259_PTHROU_DIS		0x20000000
>  #define		MPIC_GREG_GCONF_BASE_MASK		0x000fffff
>  #define MPIC_GREG_GLOBAL_CONF_1		0x00030
> +#define		MPIC_GREG_GLOBAL_CONF_1_SIE		0x08000000
> +#define		MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK	0x70000000
> +#define		MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO(r)	\
> +			(((r) << 28) & MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK)
>  #define MPIC_GREG_VENDOR_0		0x00040
>  #define MPIC_GREG_VENDOR_1		0x00050
>  #define MPIC_GREG_VENDOR_2		0x00060
> @@ -284,6 +288,12 @@ extern int mpic_get_one_irq(struct mpic 
>  /* This one gets to the primary mpic */
>  extern int mpic_get_irq(struct pt_regs *regs);
>  
> +/* Set the EPIC clock ratio */
> +void mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio);
> +
> +/* Enable/Disable EPIC serial interrupt mode */
> +void mpic_set_serial_int(struct mpic *mpic, int enable);
> +
>  /* global mpic for pSeries */
>  extern struct mpic *pSeries_mpic;
>  

Re: [PATCH] mpic: add support for serial mode interrupts

[Benjamin Herrenschmidt]

On Tue, 2006-06-20 at 00:35 +0200, Segher Boessenkool wrote:
> > Can you define some constants so others can see just what the bits  
> > mean
> > without digging up documentation, instead of just doing magic numbers?
> 
> [my favourite argument :-) ]
> 
> You'll have to read the documentation to properly understand what
> the bit patterns mean anyway.  And if you use symbolic names, you
> only add another step: hunting through header files.

Sure, that's why we should remove every symbolic constant in every
driver anywhere in the kernel right ? Sure would help.

Ben.