* Re: Is there a DER for the MPC82xx?
From: Mark Chambers @ 2005-01-26 20:33 UTC (permalink / raw)
To: Dan Malek, annamaya; +Cc: linuxppc-embedded
In-Reply-To: <BD936D78-6FCC-11D9-A0FB-003065F9B7DC@embeddededge.com>
From: "Dan Malek" <dan@embeddededge.com>
>
> On Jan 26, 2005, at 10:53 AM, annamaya wrote:
>
> > Can someone tell me if the BDI will be able to catch
> > all different kinds of exceptions/interrupts on the
> > MPC82xx without requiring any special register
> > programming? I am unable to find anything that that
> > resembles the DER register on the MPC8280.
>
> The BDI2000 works very nicely on 82xx processors.
> The 82xx debug unit is the standard COP interface,
> completely different from the 8xx debug interface.
> Stop looking for a DER on the 82xx, plug in the
> BDI2000 and use it. Make sure you understand all
> of the features of the BDI2000, as even on the 8xx
> you should not be worrying about the DER. Let the
> BDI2000 configure all of that accordingly based upon
> what you are asking it to do.
>
>
Well, the DER lets you look for multiple conditions at
once. Your program is blowing up, the memory is
getting trashed and you don't even know if the hardware
is valid - that's where BDM really shines. I don't see
where COP let's you do the equivalent of setting a
bunch of bits in the DER, so please enlighten us if
we're missing it!
Mark Chambers
P.S. I've read the BDI manual - I don't see it. My manual
says the BDI can only set one hardware breakpoint, and
stuff like VECTOR CATCH assumes valid memory.
^ permalink raw reply
* Re: target board NFS mounting timeout
From: Wolfgang Denk @ 2005-01-26 21:15 UTC (permalink / raw)
To: Alireza Sadri; +Cc: Linuxppc-embedded
In-Reply-To: <20050126130039.68067.qmail@web30707.mail.mud.yahoo.com>
In message <20050126130039.68067.qmail@web30707.mail.mud.yahoo.com> you wrote:
>
> I have a problem with mounting NFS by an external
> board on my host.
...
> i use a 82xx and ELDKv3 kernel v2.4.24 as target , and
> a SuSE9.1 as my host . i have stablished my NFS server
I have seen similar problems with SuSE's NFS servers before. Sorry, I
don't know of an easy fix.
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
A failure will not appear until a unit has passed final inspection.
^ permalink raw reply
* Re: Is there a DER for the MPC82xx?
From: Dan Malek @ 2005-01-26 21:19 UTC (permalink / raw)
To: Mark Chambers; +Cc: linuxppc-embedded
In-Reply-To: <00c001c503e6$64369fb0$0301a8c0@chuck2>
On Jan 26, 2005, at 12:33 PM, Mark Chambers wrote:
> P.S. I've read the BDI manual - I don't see it. My manual
> says the BDI can only set one hardware breakpoint, and
> stuff like VECTOR CATCH assumes valid memory.
The BDI2000 lets you set as many hardware breakpoints
as the processor supports. The VECTOR CATCH is equivalent
to setting of the bits in the DER. I don't know where you
determined it requires valid memory, as it catches the vector
before it starts to execute the instructions in the trap handler.
I don't know the COP details, there may be versions that don't
have sufficient hardware support, and in that case it would
have to be implemented by stuffing breakpoints into all of
the vector tables, but that is just speculation on my part and
have never seen that done. I've used VECTOR CATCH on
603 cores and had it trap properly before memory was initialized.
Using VECTOR CATCH seems to have no effect on setting
other breakpoints.
Yes, you can manually set bits in the DER and get a different
control over the debugging environment, but you have to
be conscious of what the BDI2000 is also trying to do with
that and other debug registers, too :-)
-- Dan
^ permalink raw reply
* Re: BUG: 2.6.11-rc2 and -rc1 hang during boot on PowerMacs
From: Sylvain Munaut @ 2005-01-26 21:33 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev list, Paul Mackerras, Linux Kernel list,
Mikael Pettersson
In-Reply-To: <1106529935.5587.9.camel@gaston>
Benjamin Herrenschmidt wrote:
>On Sun, 2005-01-23 at 11:43 +1100, Benjamin Herrenschmidt wrote:
>
>
>
>>I know about this problem, I'm working on a proper fix. Thanks for your
>>report.
>>
>>
>
>Can you send me the PVR value for both of these CPUs
>(cat /proc/cpuinfo) ? I can't find right now why they would lock up
>unless the default idle loop is _not_ run properly, that is for some
>reason, NAP or DOZE mode end up not beeing enabled. Can you send me
>your .config as well ?
>
>
Note that when CONFIG_BDI_SWITCH is set, they both end up disabled
because nap & doze seems to perturb the BDI on some cores.
So there is a problem in that case ....
>Finally, try that patch and tell me if it makes a difference.
>
Yup
- Without it hangs (not really, it's still half running but serial
output is stuck
due to no interrupts)
- With it it works
Sylvain
^ permalink raw reply
* Re: Is there a DER for the MPC82xx?
From: Mark Chambers @ 2005-01-26 21:37 UTC (permalink / raw)
To: Dan Malek; +Cc: linuxppc-embedded
In-Reply-To: <ECCFD7F0-6FDF-11D9-A0FB-003065F9B7DC@embeddededge.com>
>
> The BDI2000 lets you set as many hardware breakpoints
> as the processor supports. The VECTOR CATCH is equivalent
> ...
> ...I've used VECTOR CATCH on
> 603 cores and had it trap properly before memory was initialized.
> Using VECTOR CATCH seems to have no effect on setting
> other breakpoints.
Cool. I was basing my comment on the fact that the BDI manual
says it must have write access to 0000-1FFF
Thanks,
Mark
^ permalink raw reply
* Re: BUG: 2.6.11-rc2 and -rc1 hang during boot on PowerMacs
From: Benjamin Herrenschmidt @ 2005-01-26 22:11 UTC (permalink / raw)
To: Sylvain Munaut
Cc: linuxppc-dev list, Paul Mackerras, Linux Kernel list,
Mikael Pettersson
In-Reply-To: <41F80CA2.2080603@246tNt.com>
On Wed, 2005-01-26 at 22:33 +0100, Sylvain Munaut wrote:
> >Finally, try that patch and tell me if it makes a difference.
> >
> Yup
> - Without it hangs (not really, it's still half running but serial
> output is stuck
> due to no interrupts)
> - With it it works
Well, in the meantime, Ingo made a proper fix to rest_init()
Ben.
^ permalink raw reply
* Re: Is there a DER for the MPC82xx?
From: annamaya @ 2005-01-26 22:22 UTC (permalink / raw)
To: Dan Malek, Mark Chambers; +Cc: linuxppc-embedded
In-Reply-To: <ECCFD7F0-6FDF-11D9-A0FB-003065F9B7DC@embeddededge.com>
Dan and Mark,
Thanks for talking about this a little more and making
it a much clearer for me. I do have VECTOR CATCH
enabled. I am going to keep my fingers crossed. :-)
--- Dan Malek <dan@embeddededge.com> wrote:
>
> On Jan 26, 2005, at 12:33 PM, Mark Chambers wrote:
>
> > P.S. I've read the BDI manual - I don't see it.
> My manual
> > says the BDI can only set one hardware breakpoint,
> and
> > stuff like VECTOR CATCH assumes valid memory.
>
> The BDI2000 lets you set as many hardware
> breakpoints
> as the processor supports. The VECTOR CATCH is
> equivalent
> to setting of the bits in the DER. I don't know
> where you
> determined it requires valid memory, as it catches
> the vector
> before it starts to execute the instructions in the
> trap handler.
> I don't know the COP details, there may be versions
> that don't
> have sufficient hardware support, and in that case
> it would
> have to be implemented by stuffing breakpoints into
> all of
> the vector tables, but that is just speculation on
> my part and
> have never seen that done. I've used VECTOR CATCH
> on
> 603 cores and had it trap properly before memory was
> initialized.
> Using VECTOR CATCH seems to have no effect on
> setting
> other breakpoints.
>
> Yes, you can manually set bits in the DER and get a
> different
> control over the debugging environment, but you have
> to
> be conscious of what the BDI2000 is also trying to
> do with
> that and other debug registers, too :-)
>
>
> -- Dan
>
>
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^ permalink raw reply
* [PATCH][PPC32] STx GP3 port
From: Matt Porter @ 2005-01-26 22:29 UTC (permalink / raw)
To: akpm; +Cc: linuxppc-embedded
Adds support for the STx GP3 board with an MPC8560. Thanks to Dan
Malek for the original 2.4 port. Please apply.
Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
diff -Nru a/arch/ppc/configs/stx_gp3_defconfig b/arch/ppc/configs/stx_gp3_defconfig
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/configs/stx_gp3_defconfig 2005-01-26 15:22:39 -07:00
@@ -0,0 +1,972 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.11-rc2
+# Wed Jan 26 14:32:58 2005
+#
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_PPC=y
+CONFIG_PPC32=y
+CONFIG_GENERIC_NVRAM=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_HOTPLUG=y
+CONFIG_KOBJECT_UEVENT=y
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+# CONFIG_MODULE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+
+#
+# Processor
+#
+# CONFIG_6xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_POWER3 is not set
+# CONFIG_POWER4 is not set
+# CONFIG_8xx is not set
+CONFIG_E500=y
+CONFIG_BOOKE=y
+CONFIG_FSL_BOOKE=y
+# CONFIG_SPE is not set
+CONFIG_MATH_EMULATION=y
+# CONFIG_CPU_FREQ is not set
+CONFIG_85xx=y
+CONFIG_PPC_INDIRECT_PCI_BE=y
+
+#
+# Freescale 85xx options
+#
+# CONFIG_MPC8540_ADS is not set
+# CONFIG_MPC8555_CDS is not set
+# CONFIG_MPC8560_ADS is not set
+# CONFIG_SBC8560 is not set
+CONFIG_STX_GP3=y
+CONFIG_MPC8560=y
+
+#
+# Platform options
+#
+CONFIG_CPM2=y
+# CONFIG_PC_KEYBOARD is not set
+# CONFIG_SMP is not set
+# CONFIG_PREEMPT is not set
+CONFIG_HIGHMEM=y
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=m
+# CONFIG_CMDLINE_BOOL is not set
+
+#
+# Bus options
+#
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+# CONFIG_PCI_LEGACY_PROC is not set
+# CONFIG_PCI_NAMES is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# PC-card bridges
+#
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_BOOT_LOAD=0x00800000
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+CONFIG_PARPORT=m
+CONFIG_PARPORT_PC=m
+# CONFIG_PARPORT_PC_FIFO is not set
+# CONFIG_PARPORT_PC_SUPERIO is not set
+# CONFIG_PARPORT_OTHER is not set
+# CONFIG_PARPORT_1284 is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=m
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_LBD is not set
+# CONFIG_CDROM_PKTCDVD is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+CONFIG_BLK_DEV_IDECD=m
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_BLK_DEV_IDESCSI is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_IDEPCI is not set
+# CONFIG_IDE_ARM is not set
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=m
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=m
+CONFIG_CHR_DEV_ST=m
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=m
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_CONSTANTS=y
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI Transport Attributes
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_PPA is not set
+# CONFIG_SCSI_IMM is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+CONFIG_SCSI_QLA2XXX=m
+# CONFIG_SCSI_QLA21XX is not set
+# CONFIG_SCSI_QLA22XX is not set
+# CONFIG_SCSI_QLA2300 is not set
+# CONFIG_SCSI_QLA2322 is not set
+# CONFIG_SCSI_QLA6312 is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+# CONFIG_NETLINK_DEV is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+# CONFIG_IPV6 is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_IP_NF_CONNTRACK=m
+# CONFIG_IP_NF_CT_ACCT is not set
+# CONFIG_IP_NF_CONNTRACK_MARK is not set
+# CONFIG_IP_NF_CT_PROTO_SCTP is not set
+CONFIG_IP_NF_FTP=m
+CONFIG_IP_NF_IRC=m
+# CONFIG_IP_NF_TFTP is not set
+# CONFIG_IP_NF_AMANDA is not set
+# CONFIG_IP_NF_QUEUE is not set
+CONFIG_IP_NF_IPTABLES=m
+# CONFIG_IP_NF_MATCH_LIMIT is not set
+# CONFIG_IP_NF_MATCH_IPRANGE is not set
+# CONFIG_IP_NF_MATCH_MAC is not set
+# CONFIG_IP_NF_MATCH_PKTTYPE is not set
+# CONFIG_IP_NF_MATCH_MARK is not set
+# CONFIG_IP_NF_MATCH_MULTIPORT is not set
+# CONFIG_IP_NF_MATCH_TOS is not set
+# CONFIG_IP_NF_MATCH_RECENT is not set
+# CONFIG_IP_NF_MATCH_ECN is not set
+# CONFIG_IP_NF_MATCH_DSCP is not set
+# CONFIG_IP_NF_MATCH_AH_ESP is not set
+# CONFIG_IP_NF_MATCH_LENGTH is not set
+# CONFIG_IP_NF_MATCH_TTL is not set
+# CONFIG_IP_NF_MATCH_TCPMSS is not set
+# CONFIG_IP_NF_MATCH_HELPER is not set
+# CONFIG_IP_NF_MATCH_STATE is not set
+# CONFIG_IP_NF_MATCH_CONNTRACK is not set
+# CONFIG_IP_NF_MATCH_OWNER is not set
+# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
+# CONFIG_IP_NF_MATCH_REALM is not set
+# CONFIG_IP_NF_MATCH_SCTP is not set
+# CONFIG_IP_NF_MATCH_COMMENT is not set
+# CONFIG_IP_NF_MATCH_HASHLIMIT is not set
+CONFIG_IP_NF_FILTER=m
+# CONFIG_IP_NF_TARGET_REJECT is not set
+# CONFIG_IP_NF_TARGET_LOG is not set
+# CONFIG_IP_NF_TARGET_ULOG is not set
+# CONFIG_IP_NF_TARGET_TCPMSS is not set
+CONFIG_IP_NF_NAT=m
+CONFIG_IP_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+# CONFIG_IP_NF_TARGET_NETMAP is not set
+# CONFIG_IP_NF_TARGET_SAME is not set
+CONFIG_IP_NF_NAT_SNMP_BASIC=m
+CONFIG_IP_NF_NAT_IRC=m
+CONFIG_IP_NF_NAT_FTP=m
+# CONFIG_IP_NF_MANGLE is not set
+# CONFIG_IP_NF_RAW is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+# CONFIG_NET_CLS_ROUTE is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+CONFIG_GIANFAR=y
+CONFIG_GFAR_NAPI=y
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1280
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=1024
+CONFIG_INPUT_JOYDEV=m
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=m
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PARKBD is not set
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_SERIAL_CPM=y
+CONFIG_SERIAL_CPM_CONSOLE=y
+# CONFIG_SERIAL_CPM_SCC1 is not set
+CONFIG_SERIAL_CPM_SCC2=y
+# CONFIG_SERIAL_CPM_SCC3 is not set
+# CONFIG_SERIAL_CPM_SCC4 is not set
+# CONFIG_SERIAL_CPM_SMC1 is not set
+# CONFIG_SERIAL_CPM_SMC2 is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+CONFIG_PRINTER=m
+# CONFIG_LP_CONSOLE is not set
+# CONFIG_PPDEV is not set
+# CONFIG_TIPAR is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+CONFIG_AGP=m
+CONFIG_DRM=m
+# CONFIG_DRM_TDFX is not set
+# CONFIG_DRM_R128 is not set
+# CONFIG_DRM_RADEON is not set
+# CONFIG_DRM_MGA is not set
+# CONFIG_DRM_SIS is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+CONFIG_I2C=m
+CONFIG_I2C_CHARDEV=m
+
+#
+# I2C Algorithms
+#
+CONFIG_I2C_ALGOBIT=m
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_ISA is not set
+# CONFIG_I2C_MPC is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_PARPORT is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_SCx200_ACB is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_ISA is not set
+
+#
+# Hardware Sensors Chip support
+#
+# CONFIG_I2C_SENSOR is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83627HF is not set
+
+#
+# Other I2C Chip support
+#
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_RTC8564 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Misc devices
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Sound
+#
+CONFIG_SOUND=m
+
+#
+# Advanced Linux Sound Architecture
+#
+# CONFIG_SND is not set
+
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# InfiniBand support
+#
+# CONFIG_INFINIBAND is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_JBD=y
+CONFIG_JBD_DEBUG=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=y
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+# CONFIG_JOLIET is not set
+# CONFIG_ZISOFS is not set
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_SYSFS=y
+CONFIG_DEVFS_FS=y
+# CONFIG_DEVFS_MOUNT is not set
+# CONFIG_DEVFS_DEBUG is not set
+# CONFIG_DEVPTS_FS_XATTR is not set
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_SCC_ENET is not set
+# CONFIG_FEC_ENET is not set
+
+#
+# CPM2 Options
+#
+
+#
+# Library routines
+#
+CONFIG_CRC_CCITT=y
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=m
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_HIGHMEM is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_KGDB_CONSOLE is not set
+# CONFIG_XMON is not set
+CONFIG_BDI_SWITCH=y
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Hardware crypto devices
+#
diff -Nru a/arch/ppc/platforms/85xx/Kconfig b/arch/ppc/platforms/85xx/Kconfig
--- a/arch/ppc/platforms/85xx/Kconfig 2005-01-26 15:22:39 -07:00
+++ b/arch/ppc/platforms/85xx/Kconfig 2005-01-26 15:22:39 -07:00
@@ -37,6 +37,12 @@
This option enables support for the WindRiver PowerQUICC III
SBC8560 board.
+config STX_GP3
+ bool "Silicon Turnkey Express GP3"
+ help
+ This option enables support for the Silicon Turnkey Express GP3
+ board.
+
endchoice
# It's often necessary to know the specific 85xx processor type.
@@ -54,7 +60,7 @@
config MPC8560
bool
- depends on SBC8560 || MPC8560_ADS
+ depends on SBC8560 || MPC8560_ADS || STX_GP3
default y
config 85xx_PCI2
diff -Nru a/arch/ppc/platforms/85xx/Makefile b/arch/ppc/platforms/85xx/Makefile
--- a/arch/ppc/platforms/85xx/Makefile 2005-01-26 15:22:39 -07:00
+++ b/arch/ppc/platforms/85xx/Makefile 2005-01-26 15:22:39 -07:00
@@ -7,3 +7,4 @@
obj-$(CONFIG_MPC8555_CDS) += mpc85xx_cds_common.o
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads_common.o mpc8560_ads.o
obj-$(CONFIG_SBC8560) += sbc85xx.o sbc8560.o
+obj-$(CONFIG_STX_GP3) += stx_gp3.o
diff -Nru a/arch/ppc/platforms/85xx/stx_gp3.c b/arch/ppc/platforms/85xx/stx_gp3.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/platforms/85xx/stx_gp3.c 2005-01-26 15:22:39 -07:00
@@ -0,0 +1,381 @@
+/*
+ * arch/ppc/platforms/85xx/stx_gp3.c
+ *
+ * STx GP3 board specific routines
+ *
+ * Dan Malek <dan@embeddededge.com>
+ * Copyright 2004 Embedded Edge, LLC
+ *
+ * Copied from mpc8560_ads.c
+ * Copyright 2002, 2003 Motorola Inc.
+ *
+ * Ported to 2.6, Matt Porter <mporter@kernel.crashing.org>
+ * Copyright 2004-2005 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/reboot.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/major.h>
+#include <linux/blkdev.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/root_dev.h>
+#include <linux/seq_file.h>
+#include <linux/serial.h>
+#include <linux/module.h>
+#include <linux/fsl_devices.h>
+
+#include <asm/system.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/atomic.h>
+#include <asm/time.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/open_pic.h>
+#include <asm/bootinfo.h>
+#include <asm/pci-bridge.h>
+#include <asm/mpc85xx.h>
+#include <asm/irq.h>
+#include <asm/immap_85xx.h>
+#include <asm/immap_cpm2.h>
+#include <asm/mpc85xx.h>
+#include <asm/ppc_sys.h>
+
+#include <syslib/cpm2_pic.h>
+#include <syslib/ppc85xx_common.h>
+
+extern void cpm2_reset(void);
+
+unsigned char __res[sizeof(bd_t)];
+
+#ifndef CONFIG_PCI
+unsigned long isa_io_base = 0;
+unsigned long isa_mem_base = 0;
+unsigned long pci_dram_offset = 0;
+#endif
+
+/* Internal interrupts are all Level Sensitive, and Positive Polarity */
+static u8 gp3_openpic_initsenses[] __initdata = {
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 0: L2 Cache */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 1: ECM */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 2: DDR DRAM */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 3: LBIU */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 4: DMA 0 */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 5: DMA 1 */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 6: DMA 2 */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 7: DMA 3 */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 8: PCI/PCI-X */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 9: RIO Inbound Port Write Error */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 10: RIO Doorbell Inbound */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 11: RIO Outbound Message */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 12: RIO Inbound Message */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 13: TSEC 0 Transmit */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 14: TSEC 0 Receive */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 15: Unused */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 16: Unused */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 17: Unused */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 18: TSEC 0 Receive/Transmit Error */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 19: TSEC 1 Transmit */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 20: TSEC 1 Receive */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 21: Unused */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 22: Unused */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 23: Unused */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 24: TSEC 1 Receive/Transmit Error */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 25: Fast Ethernet */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 26: DUART */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 27: I2C */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 28: Performance Monitor */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 29: Unused */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 30: CPM */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 31: Unused */
+ 0x0, /* External 0: */
+#if defined(CONFIG_PCI)
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 1: PCI slot 0 */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 2: PCI slot 1 */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 3: PCI slot 2 */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 4: PCI slot 3 */
+#else
+ 0x0, /* External 1: */
+ 0x0, /* External 2: */
+ 0x0, /* External 3: */
+ 0x0, /* External 4: */
+#endif
+ 0x0, /* External 5: */
+ 0x0, /* External 6: */
+ 0x0, /* External 7: */
+ 0x0, /* External 8: */
+ 0x0, /* External 9: */
+ 0x0, /* External 10: */
+ 0x0, /* External 11: */
+};
+
+/*
+ * Setup the architecture
+ */
+static void __init
+gp3_setup_arch(void)
+{
+ bd_t *binfo = (bd_t *) __res;
+ unsigned int freq;
+ struct gianfar_platform_data *pdata;
+
+ cpm2_reset();
+
+ /* get the core frequency */
+ freq = binfo->bi_intfreq;
+
+ if (ppc_md.progress)
+ ppc_md.progress("gp3_setup_arch()", 0);
+
+ /* Set loops_per_jiffy to a half-way reasonable value,
+ for use until calibrate_delay gets called. */
+ loops_per_jiffy = freq / HZ;
+
+#ifdef CONFIG_PCI
+ /* setup PCI host bridges */
+ mpc85xx_setup_hose();
+#endif
+
+ /* setup the board related information for the enet controllers */
+ pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
+/* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
+ pdata->interruptPHY = MPC85xx_IRQ_EXT5;
+ pdata->phyid = 2;
+ pdata->phy_reg_addr += binfo->bi_immr_base;
+ memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
+
+ pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
+/* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
+ pdata->interruptPHY = MPC85xx_IRQ_EXT5;
+ pdata->phyid = 4;
+ /* fixup phy address */
+ pdata->phy_reg_addr += binfo->bi_immr_base;
+ memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
+
+#ifdef CONFIG_BLK_DEV_INITRD
+ if (initrd_start)
+ ROOT_DEV = Root_RAM0;
+ else
+#endif
+#ifdef CONFIG_ROOT_NFS
+ ROOT_DEV = Root_NFS;
+#else
+ ROOT_DEV = Root_HDA1;
+#endif
+
+ printk ("bi_immr_base = %8.8lx\n", binfo->bi_immr_base);
+}
+
+static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
+{
+ while ((irq = cpm2_get_irq(regs)) >= 0)
+ __do_IRQ(irq, regs);
+
+ return IRQ_HANDLED;
+}
+
+static struct irqaction cpm2_irqaction = {
+ .handler = cpm2_cascade,
+ .flags = SA_INTERRUPT,
+ .mask = CPU_MASK_NONE,
+ .name = "cpm2_cascade",
+};
+
+static void __init
+gp3_init_IRQ(void)
+{
+ int i;
+ volatile cpm2_map_t *immap = cpm2_immr;
+ bd_t *binfo = (bd_t *) __res;
+
+ /*
+ * Setup OpenPIC
+ */
+
+ /* Determine the Physical Address of the OpenPIC regs */
+ phys_addr_t OpenPIC_PAddr =
+ binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
+ OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE);
+ OpenPIC_InitSenses = gp3_openpic_initsenses;
+ OpenPIC_NumInitSenses = sizeof (gp3_openpic_initsenses);
+
+ /* Skip reserved space and internal sources */
+ openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200);
+
+ /* Map PIC IRQs 0-11 */
+ openpic_set_sources(32, 12, OpenPIC_Addr + 0x10000);
+
+ /*
+ * Let openpic interrupts starting from an offset, to
+ * leave space for cascading interrupts underneath.
+ */
+ openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
+
+ /*
+ * Setup CPM2 PIC
+ */
+
+ /* disable all CPM interupts */
+ immap->im_intctl.ic_simrh = 0x0;
+ immap->im_intctl.ic_simrl = 0x0;
+
+ for (i = CPM_IRQ_OFFSET; i < (NR_CPM_INTS + CPM_IRQ_OFFSET); i++)
+ irq_desc[i].handler = &cpm2_pic;
+
+ /*
+ * Initialize the default interrupt mapping priorities,
+ * in case the boot rom changed something on us.
+ */
+ immap->im_intctl.ic_sicr = 0;
+ immap->im_intctl.ic_scprrh = 0x05309770;
+ immap->im_intctl.ic_scprrl = 0x05309770;
+
+ setup_irq(MPC85xx_IRQ_CPM, &cpm2_irqaction);
+
+ return;
+}
+
+static int
+gp3_show_cpuinfo(struct seq_file *m)
+{
+ uint pvid, svid, phid1;
+ bd_t *binfo = (bd_t *) __res;
+ uint memsize;
+ unsigned int freq;
+ extern unsigned long total_memory; /* in mm/init */
+
+ /* get the core frequency */
+ freq = binfo->bi_intfreq;
+
+ pvid = mfspr(PVR);
+ svid = mfspr(SVR);
+
+ memsize = total_memory;
+
+ seq_printf(m, "Vendor\t\t: RPC Electronics STx \n");
+
+ switch (svid & 0xffff0000) {
+ case SVR_8540:
+ seq_printf(m, "Machine\t\t: GP3 - MPC8540\n");
+ break;
+ case SVR_8560:
+ seq_printf(m, "Machine\t\t: GP3 - MPC8560\n");
+ break;
+ default:
+ seq_printf(m, "Machine\t\t: unknown\n");
+ break;
+ }
+ seq_printf(m, "bus freq\t: %u.%.6u MHz\n", freq / 1000000,
+ freq % 1000000);
+ seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
+ seq_printf(m, "SVR\t\t: 0x%x\n", svid);
+
+ /* Display cpu Pll setting */
+ phid1 = mfspr(HID1);
+ seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
+
+ /* Display the amount of memory */
+ seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
+
+ return 0;
+}
+
+#ifdef CONFIG_PCI
+int mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel,
+ unsigned char pin)
+{
+ static char pci_irq_table[][4] =
+ /*
+ * PCI IDSEL/INTPIN->INTLINE
+ * A B C D
+ */
+ {
+ {PIRQA, PIRQB, PIRQC, PIRQD},
+ {PIRQD, PIRQA, PIRQB, PIRQC},
+ {PIRQC, PIRQD, PIRQA, PIRQB},
+ {PIRQB, PIRQC, PIRQD, PIRQA},
+ };
+
+ const long min_idsel = 12, max_idsel = 15, irqs_per_slot = 4;
+ return PCI_IRQ_TABLE_LOOKUP;
+}
+
+int mpc85xx_exclude_device(u_char bus, u_char devfn)
+{
+ if (bus == 0 && PCI_SLOT(devfn) == 0)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+ else
+ return PCIBIOS_SUCCESSFUL;
+}
+#endif /* CONFIG_PCI */
+
+void __init
+platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7)
+{
+ /* parse_bootinfo must always be called first */
+ parse_bootinfo(find_bootinfo());
+
+ /*
+ * If we were passed in a board information, copy it into the
+ * residual data area.
+ */
+ if (r3) {
+ memcpy((void *) __res, (void *) (r3 + KERNELBASE),
+ sizeof (bd_t));
+
+ }
+#if defined(CONFIG_BLK_DEV_INITRD)
+ /*
+ * If the init RAM disk has been configured in, and there's a valid
+ * starting address for it, set it up.
+ */
+ if (r4) {
+ initrd_start = r4 + KERNELBASE;
+ initrd_end = r5 + KERNELBASE;
+ }
+#endif /* CONFIG_BLK_DEV_INITRD */
+
+ /* Copy the kernel command line arguments to a safe place. */
+
+ if (r6) {
+ *(char *) (r7 + KERNELBASE) = 0;
+ strcpy(cmd_line, (char *) (r6 + KERNELBASE));
+ }
+
+ identify_ppc_sys_by_id(mfspr(SVR));
+
+ /* setup the PowerPC module struct */
+ ppc_md.setup_arch = gp3_setup_arch;
+ ppc_md.show_cpuinfo = gp3_show_cpuinfo;
+
+ ppc_md.init_IRQ = gp3_init_IRQ;
+ ppc_md.get_irq = openpic_get_irq;
+
+ ppc_md.restart = mpc85xx_restart;
+ ppc_md.power_off = mpc85xx_power_off;
+ ppc_md.halt = mpc85xx_halt;
+
+ ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
+
+ ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
+
+ if (ppc_md.progress)
+ ppc_md.progress("platform_init(): exit", 0);
+
+ return;
+}
diff -Nru a/arch/ppc/platforms/85xx/stx_gp3.h b/arch/ppc/platforms/85xx/stx_gp3.h
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/platforms/85xx/stx_gp3.h 2005-01-26 15:22:39 -07:00
@@ -0,0 +1,74 @@
+/*
+ * arch/ppc/platforms/stx8560_gp3.h
+ *
+ * STx GP3 board definitions
+ *
+ * Dan Malek (dan@embeddededge.com)
+ * Copyright 2004 Embedded Edge, LLC
+ *
+ * Ported to 2.6, Matt Porter <mporter@kernel.crashing.org>
+ * Copyright 2004-2005 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#ifndef __MACH_STX_GP3_H
+#define __MACH_STX_GP3_H
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/seq_file.h>
+#include <asm/ppcboot.h>
+
+#define BOARD_CCSRBAR ((uint)0xe0000000)
+#define CCSRBAR_SIZE ((uint)1024*1024)
+
+#define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET)
+
+#define BCSR_ADDR ((uint)0xfc000000)
+#define BCSR_SIZE ((uint)(16 * 1024))
+
+#define BCSR_TSEC1_RESET 0x00000080
+#define BCSR_TSEC2_RESET 0x00000040
+#define BCSR_LED1 0x00000008
+#define BCSR_LED2 0x00000004
+#define BCSR_LED3 0x00000002
+#define BCSR_LED4 0x00000001
+
+extern void mpc85xx_setup_hose(void) __init;
+extern void mpc85xx_restart(char *cmd);
+extern void mpc85xx_power_off(void);
+extern void mpc85xx_halt(void);
+extern int mpc85xx_show_cpuinfo(struct seq_file *m);
+extern void mpc85xx_init_IRQ(void) __init;
+extern unsigned long mpc85xx_find_end_of_memory(void) __init;
+extern void mpc85xx_calibrate_decr(void) __init;
+
+#define PCI_CFG_ADDR_OFFSET (0x8000)
+#define PCI_CFG_DATA_OFFSET (0x8004)
+
+/* PCI interrupt controller */
+#define PIRQA MPC85xx_IRQ_EXT1
+#define PIRQB MPC85xx_IRQ_EXT2
+#define PIRQC MPC85xx_IRQ_EXT3
+#define PIRQD MPC85xx_IRQ_EXT4
+#define PCI_MIN_IDSEL 16
+#define PCI_MAX_IDSEL 19
+#define PCI_IRQ_SLOT 4
+
+#define MPC85XX_PCI1_LOWER_IO 0x00000000
+#define MPC85XX_PCI1_UPPER_IO 0x00ffffff
+
+#define MPC85XX_PCI1_LOWER_MEM 0x80000000
+#define MPC85XX_PCI1_UPPER_MEM 0x9fffffff
+
+#define MPC85XX_PCI1_IO_BASE 0xe2000000
+#define MPC85XX_PCI1_MEM_OFFSET 0x00000000
+
+#define MPC85XX_PCI1_IO_SIZE 0x01000000
+
+#endif /* __MACH_STX_GP3_H */
diff -Nru a/include/asm-ppc/mpc85xx.h b/include/asm-ppc/mpc85xx.h
--- a/include/asm-ppc/mpc85xx.h 2005-01-26 15:22:39 -07:00
+++ b/include/asm-ppc/mpc85xx.h 2005-01-26 15:22:39 -07:00
@@ -34,6 +34,9 @@
#ifdef CONFIG_SBC8560
#include <platforms/85xx/sbc8560.h>
#endif
+#ifdef CONFIG_STX_GP3
+#include <platforms/85xx/stx_gp3.h>
+#endif
#define _IO_BASE isa_io_base
#define _ISA_MEM_BASE isa_mem_base
^ permalink raw reply
* Re: MPC8272ADS and frame buffer
From: Federico Lucifredi @ 2005-01-26 23:30 UTC (permalink / raw)
Cc: Linux-ppc [mailing list]
Hello Bora,
> FL> It turns out you can solve your problem by using the Epson
> SD13806
> FL> evaluation board (s5u13806b00c).
>
> Has this evaboard got PCI interface?
>
>
It is a PCI card form factor. The epson chip does NOT have a PCI
interface on board, so a PCI bridge chip is there to support PCI
operation -- In short, if you want to use PCI, it is available by
activating it with a DIP switch. I did use it, and it works.
> FL> It comes with drivers distributed, FL> inanely enough, as a patch
> for a specific kernel, so prepare for some FL> hand-patching. Other
> than that, it works.
>
>
> We would like to use it with two purposes. One is to display
> browser(Opera, Mozilla, Firefox or what
> it is) and second one is to play films encoded by mpeg. AFAIK, this
> card is framebuffer style. It
> has some 2D acceleration mainly for blitting operations. I think films
> are not drawing thing. Color
> space conversion, scaling are discussed. But others are drawing thing.
>
> Do you think this card is enought for them?
>
>
I believe the card is enough for browser operation, yes. I am not sure
about playing video beacuse I have not performance-checked it , and as
you pointed out, it is unaccelerated. It should be able to display
whatever you throw at it though, so if you can do the MPEG decoding
completely in software on the MPC side, you should be fine.
Do you work at Turk Telecom or are you just a customer ? What is your
project, if I may ask ?
-Federico
--
_________________________________________
-- "'Problem' is a bleak word for challenge" - Richard Fish
Muad'Dib of Caladan (Federico L. Lucifredi)- Harvard University & BU
http://metcs.bu.edu/~lucifred
^ permalink raw reply
* Re: MPC8272ADS and frame buffer
From: Federico Lucifredi @ 2005-01-26 23:34 UTC (permalink / raw)
To: Bora Þahin; +Cc: Linux-ppc [mailing list]
In-Reply-To: <371777686.20050127005702@ttnet.net.tr>
Bora Þahin wrote:
>But S1D13806 is showed in the web site as legacy. Instead of it S1D13506 is suggested, which seems
>it has the same properties with 13806... Do you know anything about it?
>
>
>
hehe - I know, it is an oldie now. I used it because my company had one
around, and it was a cheap approach to try what we had on hand first =)
A good thing for you is that the Linux driver is one for most of the
Epson chips (download the file, you will see this sd1d1xxxfb.c (or
something like it) file, it depends on different includes for different
chips, but other than that it is always the same driver.
>Has it got X-Window driver[s] or only frame-buffer support? If only framebuffer, then it means frame
>buffer X-window server. And this one is a bit slow AFAIK...
>
>
The driver is fb only - I agree with you, if you are going to use X, you
dont want to go with that. On the other hand, unlsee you want a lot of
applications on the desk, ditching X would help you in maximizing CPU
usage as you request below. Qt-E by Trolltech (Disclaimer: I am a
fanatical Qt user) supports Fb graphics, so if you do not need anything
besides a browser (Opera can also use Qt-E, and Konqueror can also link
agains it, although I would not recommend that one yet), you can well do
without X.
>FL> I believe the card is enough for browser operation, yes. I am not sure
>FL> about playing video beacuse I have not performance-checked it , and as
>FL> you pointed out, it is unaccelerated. It should be able to display
>FL> whatever you throw at it though, so if you can do the MPEG decoding
>FL> completely in software on the MPC side, you should be fine.
>
>Thanks for these invaluable insights...
>
>
My pleasure to be of help =)
>FL> Do you work at Turk Telecom or are you just a customer ?
>
>Yeah, I am just a customer. I dont like using company e-mail. Because it is read by third party
>products :-)
>
>
>If possible, we want to decrease microprocessor clock. Normally we
>do it in VIA Epia-500MHz and thinking in parallel with, it should be done under 533, or perhaps
>[..] 466, 400. I dont know. We will test it. Do you know anything about it?
>
>
Hmm - testing is the only way you can come up with a figure. But
removing X from the equation will certinly gain you some % of CPU
availability, which you will need for the soft mpeg decoder. You also
want to test that the buffer setup of the whole thing is designed
correctly for the kind of response and thruput you will need... I have
seen reports on the mailing list of people having trouble b/c of some
crippleware used in bus implementations.
-Federico
--
_________________________________________
-- "'Problem' is a bleak word for challenge" - Richard Fish
Muad'Dib of Caladan (Federico L. Lucifredi)- Harvard University & BU
http://metcs.bu.edu/~lucifred
^ permalink raw reply
* [PATCH]PCI9 errata workaround broken
From: Rune Torgersen @ 2005-01-27 0:03 UTC (permalink / raw)
To: linuxppc-embedded
Changeset 1.1938.196.11 broke MPC8260 PCI9 Errata workaround.
This pach makes it work again.
Signed-off-by: Rune Torgersen <runet@innovsys.com>
=3D=3D=3D=3D=3D include/asm-ppc/io.h 1.29 vs edited =3D=3D=3D=3D=3D
--- 1.29/include/asm-ppc/io.h 2005-01-26 17:15:02 -06:00
+++ edited/include/asm-ppc/io.h 2005-01-26 17:54:11 -06:00
@@ -133,7 +133,10 @@
{
__asm__ __volatile__("stw%U0%X0 %1,%0; eieio" : "=3Dm" (*addr) :
"r" (val));
}
-
+#if defined (CONFIG_8260_PCI9)
+#define readb(addr) in_8((volatile u8 *)(addr))
+#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
+#else
static inline __u8 readb(volatile void __iomem *addr)
{
return in_8(addr);
@@ -142,6 +145,8 @@
{
out_8(addr, b);
}
+#endif
+
#if defined(CONFIG_APUS)
static inline __u16 readw(volatile void __iomem *addr)
{
@@ -159,6 +164,12 @@
{
*(__force volatile __u32 *)(addr) =3D b;
}
+#elif defined (CONFIG_8260_PCI9)
+/* Use macros if PCI9 workaround enabled */
+#define readw(addr) in_le16((volatile u16 *)(addr))
+#define readl(addr) in_le32((volatile u32 *)(addr))
+#define writew(b,addr) out_le16((volatile u16 *)(addr),(b))
+#define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
#else
static inline __u16 readw(volatile void __iomem *addr)
{
@@ -332,6 +343,11 @@
#define IO_SPACE_LIMIT ~0
+#if defined (CONFIG_8260_PCI9)
+#define memset_io(a,b,c) memset((void *)(a),(b),(c))
+#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
+#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
+#else
static inline void memset_io(volatile void __iomem *addr, unsigned char
val, int count)
{
memset((void __force *)addr, val, count);
@@ -344,7 +360,7 @@
{
memcpy((void __force *) dst, src, count);
}
-
+#endif
/*
* Map in an area of physical address space, for accessing
* I/O devices etc.
Rune Torgersen
System Developer
Innovative Systems LLC
1000 Innovative Drive
Mitchell, SD 57301
Ph: 605-995-6120
www.innovsys.com
^ permalink raw reply
* Re: MPC8272ADS and frame buffer
From: Federico Lucifredi @ 2005-01-27 0:20 UTC (permalink / raw)
To: Bora Þahin, Linux-ppc [mailing list]
In-Reply-To: <396073913.20050127020839@ttnet.net.tr>
Bora Þahin wrote:
>Hello Federico,
>
>Thanks for the infos...
>
>FL> You also
>FL> want to test that the buffer setup of the whole thing is designed
>FL> correctly for the kind of response and thruput you will need... I have
>FL> seen reports on the mailing list of people having trouble b/c of some
>FL> crippleware used in bus implementations.
>
>I dont understand it exactly. May you able to explain it a bit clearly?
>
>Thanks for the infos...
>
>
I meant that you have to stress-test the bus connection that you are
going to use to whatever graphic hardware you
select - you cannot count on embedded hardware being bleeding-edge
performance, and you are going to play 25 or 30 frames a second over
that bus -- it is a lot of data, and you have bandwidth (hopefully not a
problem with pci) and jitter (delay variance) constraints.
-Federico
--
_________________________________________
-- "'Problem' is a bleak word for challenge" - Richard Fish
Muad'Dib of Caladan (Federico L. Lucifredi)- Harvard University & BU
http://metcs.bu.edu/~lucifred
^ permalink raw reply
* Re: cmd_line and cmd_preset in arch/ppc/boot/simple/misc.c
From: Rob Baxter @ 2005-01-27 0:28 UTC (permalink / raw)
To: Leigh Brown; +Cc: linuxppc-dev list
In-Reply-To: <32862.82.10.231.190.1106765713.squirrel@82.10.231.190>
No, you're not going mad...
This piece code, CONFIG_GEMINI, complements a piece code in the GEMINI
specific boot code. This piece of code is not part of the standard
distribution. What this compliment piece of code did was to pass an
optional command line from the firmware to misc.c.
Hopes this help,
Rob, A GEMINI Developer
On Wed, Jan 26, 2005 at 06:55:13PM -0000, Leigh Brown wrote:
> Hi,
>
> Could someone please confirm that I'm not going mad? At least wrt
> this ;-) We have this code in misc.c:
>
> #ifdef CONFIG_GEMINI
> /*
> * If cmd_line is empty and cmd_preset is not, copy cmd_preset
> * to cmd_line. This way we can override cmd_preset with the
> * command line from Smon.
> */
>
> if ( (cmd_line[0] == '\0') && (cmd_preset[0] != '\0'))
> memcpy (cmd_line, cmd_preset, sizeof(cmd_preset));
> #endif
>
> /* Display standard Linux/PPC boot prompt for kernel args */
> puts("\nLinux/PPC load: ");
> cp = cmd_line;
> memcpy (cmd_line, cmd_preset, sizeof(cmd_preset));
>
>
> Surely the bit in the #ifdef is ineffective? Also, as cmd_line is
> initialised to zeros, I think this is better:
>
> /*
> * If cmd_line is empty and cmd_preset is not, copy cmd_preset
> * to cmd_line. This way we can override cmd_preset with the
> * command line from Smon.
> */
>
> if ( (cmd_line[0] == '\0') && (cmd_preset[0] != '\0'))
> memcpy (cmd_line, cmd_preset, sizeof(cmd_preset));
>
> /* Display standard Linux/PPC boot prompt for kernel args */
> puts("\nLinux/PPC load: ");
> cp = cmd_line;
>
> As, in the general case, cmd_line[0] will always be zero and
> cmd_preset[0] will always be filled, so no need for an #ifdef.
>
> If someone can confirm I'm not mistaken, I can send a patch...
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
^ permalink raw reply
* building linuxppc-2.5 + adeos patch with ELDK-3.0
From: Deepa Ramki @ 2005-01-27 9:16 UTC (permalink / raw)
To: linuxppc-embedded
Hello all,
I am trying to build the adeos patched linuxppc-2.5 kernel for an
IBM PPC440 based Ebony board.
The versions are:
linux: linuxppc-2.6.10rc3
adeos patch = adeos-linuxppc-2.6.10rc3-r6c11.patch
The patch went through fine.
I am using the ELDK 3.0 tools for building.
Make menu config was done to select the right board(ebony) and
processor(ppc4xx). Other than enabling the preemptible kernel option,
no other change was made to the default settings.
The make command however reports errors :(
I issued make ARCH=ppc CROSS_COMPILE=ppc_4xx-
Please let me know where I am going wrong. I further intend to use
RTAI Fusion on top of this. I hope I am on the right track. I request
the people with more experience to please help me!
Best Regards
Deepa.
The error received is as follows:
linux:/usr/local/eldk/ppc_4xx/usr/src/linuxppc-2.5 # make ARCH=ppc
CROSS_COMPILE=ppc_4xx-
CHK include/linux/version.h
HOSTCC scripts/basic/fixdep
HOSTCC scripts/basic/split-include
HOSTCC scripts/basic/docproc
HOSTCC scripts/genksyms/genksyms.o
HOSTCC scripts/genksyms/lex.o
HOSTCC scripts/genksyms/parse.o
HOSTLD scripts/genksyms/genksyms
CC scripts/mod/empty.o
HOSTCC scripts/mod/mk_elfconfig
MKELF scripts/mod/elfconfig.h
HOSTCC scripts/mod/file2alias.o
HOSTCC scripts/mod/modpost.o
HOSTCC scripts/mod/sumversion.o
HOSTLD scripts/mod/modpost
HOSTCC scripts/kallsyms
HOSTCC scripts/conmakehash
CC arch/ppc/kernel/asm-offsets.s
In file included from include/linux/time.h:7,
from include/linux/resource.h:4,
from include/asm-generic/siginfo.h:6,
from include/asm/siginfo.h:4,
from include/asm/adeos.h:33,
from include/linux/preempt.h:30,
from include/linux/spinlock.h:9,
from include/linux/signal.h:5,
from arch/ppc/kernel/asm-offsets.c:12:
include/linux/seqlock.h:35: parse error before "spinlock_t"
include/linux/seqlock.h:35: warning: no semicolon at end of struct or union
include/linux/seqlock.h:36: warning: type defaults to `int' in
declaration of `seqlock_t'
include/linux/seqlock.h:36: warning: data definition has no type or
storage class
include/linux/seqlock.h:50: parse error before '*' token
include/linux/seqlock.h:51: warning: function declaration isn't a prototype
include/linux/seqlock.h: In function `write_seqlock':
include/linux/seqlock.h:52: warning: implicit declaration of function
`spin_lock'
include/linux/seqlock.h:52: `sl' undeclared (first use in this function)
include/linux/seqlock.h:52: (Each undeclared identifier is reported only once
include/linux/seqlock.h:52: for each function it appears in.)
include/linux/seqlock.h: At top level:
include/linux/seqlock.h:57: parse error before '*' token
include/linux/seqlock.h:58: warning: function declaration isn't a prototype
include/linux/seqlock.h: In function `write_sequnlock':
include/linux/seqlock.h:60: `sl' undeclared (first use in this function)
include/linux/seqlock.h:61: warning: implicit declaration of function
`spin_unlock'
include/linux/seqlock.h: At top level:
include/linux/seqlock.h:64: parse error before '*' token
include/linux/seqlock.h:65: warning: function declaration isn't a prototype
include/linux/seqlock.h: In function `write_tryseqlock':
include/linux/seqlock.h:66: warning: implicit declaration of function
`spin_trylock'
include/linux/seqlock.h:66: `sl' undeclared (first use in this function)
include/linux/seqlock.h: At top level:
include/linux/seqlock.h:76: warning: type defaults to `int' in
declaration of `seqlock_t'
include/linux/seqlock.h:76: parse error before '*' token
include/linux/seqlock.h:77: warning: function declaration isn't a prototype
include/linux/seqlock.h: In function `read_seqbegin':
include/linux/seqlock.h:78: `sl' undeclared (first use in this function)
include/linux/seqlock.h: At top level:
include/linux/seqlock.h:91: warning: type defaults to `int' in
declaration of `seqlock_t'
include/linux/seqlock.h:91: parse error before '*' token
include/linux/seqlock.h:92: warning: function declaration isn't a prototype
include/linux/seqlock.h: In function `read_seqretry':
include/linux/seqlock.h:94: `iv' undeclared (first use in this function)
include/linux/seqlock.h:94: `sl' undeclared (first use in this function)
In file included from include/linux/resource.h:4,
from include/asm-generic/siginfo.h:6,
from include/asm/siginfo.h:4,
from include/asm/adeos.h:33,
from include/linux/preempt.h:30,
from include/linux/spinlock.h:9,
from include/linux/signal.h:5,
from arch/ppc/kernel/asm-offsets.c:12:
include/linux/time.h: At top level:
include/linux/time.h:83: parse error before "xtime_lock"
include/linux/time.h:83: warning: type defaults to `int' in
declaration of `xtime_lock'
include/linux/time.h:83: warning: data definition has no type or storage class
make[1]: *** [arch/ppc/kernel/asm-offsets.s] Error 1
make: *** [arch/ppc/kernel/asm-offsets.s] Error 2
^ permalink raw reply
* [PATCH] Debug Register MPC855
From: Schneider, Jan (GE51) @ 2005-01-27 9:48 UTC (permalink / raw)
To: 'linuxppc-embedded@ozlabs.org'
Hello,
I have made som changes on kernel 2.4.18 to get access to the Debug
Registers on a MPC855.
Please apply and let me know whether the kernel runs stable or not.
I need this support for the gdb to set Hardware Breakpoints on a MPC855
target.
Thank you
--- /linux/arch/ppc/kernel/entry.S.orig 2005-01-25 14:20:17.269216024 +0100
+++ /linux/arch/ppc/kernel/entry.S 2005-01-25 14:27:22.440580152 +0100
@@ -294,6 +294,27 @@
stw r20,_CCR(r1)
stw r22,_CTR(r1)
stw r23,_XER(r1)
+
+ mfspr r23,CMPA
+ stw r23,_CMPA(r1)
+ mfspr r23,CMPB
+ stw r23,_CMPB(r1)
+ mfspr r23,CMPC
+ stw r23,_CMPC(r1)
+ mfspr r23,CMPD
+ stw r23,_CMPD(r1)
+ mfspr r23,CMPE
+ stw r23,_CMPE(r1)
+ mfspr r23,CMPF
+ stw r23,_CMPF(r1)
+ mfspr r23,CMPG
+ stw r23,_CMPG(r1)
+ mfspr r23,CMPH
+ stw r23,_CMPH(r1)
+
+ mfspr r23,ICTRL
+ stw r23,_ICTRL(r1)
+
li r0,0x0ff0
stw r0,TRAP(r1)
stw r1,KSP(r3) /* Set old stack pointer */
@@ -419,6 +440,27 @@
restore:
lwz r3,_XER(r1)
mtspr XER,r3
+
+ lwz r3,_CMPA(r1)
+ mtspr CMPA,r3
+ lwz r3,_CMPB(r1)
+ mtspr CMPB,r3
+ lwz r3,_CMPC(r1)
+ mtspr CMPC,r3
+ lwz r3,_CMPD(r1)
+ mtspr CMPD,r3
+ lwz r3,_CMPE(r1)
+ mtspr CMPE,r3
+ lwz r3,_CMPF(r1)
+ mtspr CMPF,r3
+ lwz r3,_CMPG(r1)
+ mtspr CMPG,r3
+ lwz r3,_CMPH(r1)
+ mtspr CMPH,r3
+
+ lwz r3,_ICTRL(r1)
+ mtspr ICTRL,r3
+
REST_10GPRS(9,r1)
REST_10GPRS(19,r1)
REST_2GPRS(29,r1)
--- /linux/arch/ppc/kernel/head_8xx.S.orig 2005-01-25
14:22:39.591579736 +0100
+++ /linux/arch/ppc/kernel/head_8xx.S 2005-01-25 14:27:43.950310176 +0100
@@ -136,6 +136,24 @@
stw r22,_CTR(r21); \
mfspr r20,XER; \
stw r20,_XER(r21); \
+ mfspr r20,CMPA; \
+ stw r20,_CMPA(r21); \
+ mfspr r20,CMPB; \
+ stw r20,_CMPB(r21); \
+ mfspr r20,CMPC; \
+ stw r20,_CMPC(r21); \
+ mfspr r20,CMPD; \
+ stw r20,_CMPD(r21); \
+ mfspr r20,CMPE; \
+ stw r20,_CMPE(r21); \
+ mfspr r20,CMPF; \
+ stw r20,_CMPF(r21); \
+ mfspr r20,CMPG; \
+ stw r20,_CMPG(r21); \
+ mfspr r20,CMPH; \
+ stw r20,_CMPH(r21); \
+ mfspr r20,ICTRL; \
+ stw r20,_ICTRL(r21);\
mfspr r22,SRR0; \
mfspr r23,SRR1; \
stw r0,GPR0(r21); \
@@ -630,7 +648,7 @@
* using them.
*/
STD_EXCEPTION(0x1c00, Trap_1c, UnknownException)
- STD_EXCEPTION(0x1d00, Trap_1d, UnknownException)
+ STD_EXCEPTION(0x1d00, Trap_1d, InstructionBreakpoint)
STD_EXCEPTION(0x1e00, Trap_1e, UnknownException)
STD_EXCEPTION(0x1f00, Trap_1f, UnknownException)
--- /linux/arch/ppc/kernel/mk_defs.c.orig 2005-01-25
14:23:12.434586840 +0100
+++ /linux/arch/ppc/kernel/mk_defs.c 2005-01-25 14:28:11.315150088 +0100
@@ -116,6 +116,20 @@
DEFINE(_LINK, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, link));
DEFINE(_CCR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ccr));
DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq));
+
+ DEFINE(_CMPA, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, cmpa));
+ DEFINE(_CMPB, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, cmpb));
+ DEFINE(_CMPC, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, cmpc));
+ DEFINE(_CMPD, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, cmpd));
+ DEFINE(_DER, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, der));
+ DEFINE(_CMPE, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, cmpe));
+ DEFINE(_CMPF, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, cmpf));
+ DEFINE(_CMPG, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, cmpg));
+ DEFINE(_CMPH, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, cmph));
+ DEFINE(_LCTRL1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs,
lctrl1));
+ DEFINE(_LCTRL2, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs,
lctrl2));
+ DEFINE(_ICTRL, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs,
ictrl));
+
DEFINE(_XER, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, xer));
DEFINE(_DAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
DEFINE(_DSISR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs,
dsisr));
--- /linux/arch/ppc/kernel/process.c.orig 2005-01-25
14:23:45.410573728 +0100
+++ /linux/arch/ppc/kernel/process.c 2005-01-25 14:28:33.340801680 +0100
@@ -191,6 +191,8 @@
return 1;
}
+
+
void
_switch_to(struct task_struct *prev, struct task_struct *new,
struct task_struct **last)
@@ -253,13 +255,13 @@
printk("NIP: %08lX XER: %08lX LR: %08lX SP: %08lX REGS: %p TRAP:
%04lx %s\n",
regs->nip, regs->xer, regs->link, regs->gpr[1],
regs,regs->trap, print_tainted());
- printk("MSR: %08lx EE: %01x PR: %01x FP: %01x ME: %01x IR/DR:
%01x%01x\n",
- regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 :
0,
+ printk("CMPA: %08lX ICTRL: %08lX MSR: %08lx EE: %01x PR: %01x FP:
%01x ME: %01x IR/DR: %01x%01x\n",
+ regs->cmpa, regs->ictrl, regs->msr, regs->msr&MSR_EE ? 1 : 0,
regs->msr&MSR_PR ? 1 : 0,
regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0,
regs->msr&MSR_IR ? 1 : 0,
regs->msr&MSR_DR ? 1 : 0);
if (regs->trap == 0x300 || regs->trap == 0x600)
- printk("DAR: %08lX, DSISR: %08lX\n", regs->dar,
regs->dsisr);
+ printk("DAR: %08lX, DSISR: %08lX DER: %08lX\n", regs->dar,
regs->dsisr, regs->der);
printk("TASK = %p[%d] '%s' ",
current, current->pid, current->comm);
printk("Last syscall: %ld ", current->thread.last_syscall);
--- /linux/arch/ppc/kernel/ptrace.c.orig 2005-01-25
14:24:08.171113600 +0100
+++ /linux/arch/ppc/kernel/ptrace.c 2005-01-25 14:28:47.701618504 +0100
@@ -33,6 +33,7 @@
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/system.h>
+#include <asm/processor.h>
/*
* Set of msr bits that gdb can change on behalf of a process.
@@ -65,7 +66,7 @@
static inline int put_reg(struct task_struct *task, int regno,
unsigned long data)
{
- if (regno <= PT_MQ && task->thread.regs != NULL) {
+ if (regno <= PT_ICTRL && task->thread.regs != NULL) {
if (regno == PT_MSR)
data = (data & MSR_DEBUGCHANGE)
| (task->thread.regs->msr &
~MSR_DEBUGCHANGE);
@@ -233,7 +234,7 @@
index = (unsigned long) addr >> 2;
if ((addr & 3) || index > PT_FPSCR)
break;
-
+
if (index < PT_FPR0) {
tmp = get_reg(child, (int) index);
} else {
@@ -383,4 +384,4 @@
send_sig(current->exit_code, current, 1);
current->exit_code = 0;
}
-}
+}
--- /linux/include/asm-ppc/processor.h.orig 2005-01-25
14:56:33.629358992 +0100
+++ /linux/include/asm-ppc/processor.h 2005-01-25 14:59:33.511012824 +0100
@@ -89,6 +89,18 @@
#define SPRN_CCR0 0x3B3 /* Core Configuration Register (4xx)
*/
#define SPRN_CDBCR 0x3D7 /* Cache Debug Control Register */
+
+#define SPRN_CMPA 0x90 /* Development Support Register Comparator A
*/
+#define SPRN_CMPB 0x91 /* Development Support Register Comparator B
*/
+#define SPRN_CMPC 0x92 /* Development Support Register Comparator C
*/
+#define SPRN_CMPD 0x93 /* Development Support Register Comparator D
*/
+#define SPRN_CMPE 0x98 /* Development Support Register Comparator E
*/
+#define SPRN_CMPF 0x99 /* Development Support Register Comparator F
*/
+#define SPRN_CMPG 0x9A /* Development Support Register Comparator G
*/
+#define SPRN_CMPH 0x9B /* Development Support Register Comparator H
*/
+#define SPRN_COUNTA 0x96 /* Development Support Register CounterA */
+#define SPRN_COUNTB 0x97 /* Development Support Register CounterB */
+
#define SPRN_CTR 0x009 /* Count Register */
#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register
*/
#define SPRN_DAC1 0x3F6 /* Data Address Compare 1 */
@@ -272,6 +284,7 @@
#define ICTRL_EICE 0x08000000 /* enable icache parity errs
*/
#define ICTRL_EDCE 0x04000000 /* enable dcache parity errs
*/
#define ICTRL_EICP 0x00000100 /* enable icache par. check
*/
+#define SPRN_ICTRL2 0x9E /* Development Support Instruction Support
Control Register */
#define SPRN_IMISS 0x3D4 /* Instruction TLB Miss Register */
#define SPRN_IMMR 0x27E /* Internal Memory Map Register */
#define SPRN_L2CR 0x3F9 /* Level 2 Cache Control Regsiter */
@@ -307,6 +320,8 @@
#define SPRN_L2CR2 0x3f8
#define SPRN_L3CR 0x3FA /* Level 3 Cache Control Regsiter
(7450) */
#define L3CR_L3E 0x80000000 /* L3 enable */
+#define SPRN_LCTRL1 0x9C /* Development Support Load/Store Support
Comparators Control Register */
+#define SPRN_LCTRL2 0x9D /* Development Support Load/Store Support
AND-OR Control Register */
#define SPRN_MSSCR0 0x3f6 /* Memory Subsystem Control Register 0 */
#define SPRN_MSSSR0 0x3f7 /* Memory Subsystem Status Register 1 */
#define SPRN_LDSTCR 0x3f8 /* Load/Store control register */
@@ -415,6 +430,16 @@
/* Short-hand versions for a number of the above SPRNs */
#define CTR SPRN_CTR /* Counter Register */
+#define CMPA SPRN_CMPA
+#define CMPB SPRN_CMPB /* Development Support Register Comparator B
*/
+#define CMPC SPRN_CMPC /* Development Support Register Comparator C
*/
+#define CMPD SPRN_CMPD /* Development Support Register Comparator D
*/
+#define CMPE SPRN_CMPE /* Development Support Register Comparator E
*/
+#define CMPF SPRN_CMPF /* Development Support Register Comparator F
*/
+#define CMPG SPRN_CMPG /* Development Support Register Comparator G
*/
+#define CMPH SPRN_CMPH /* Development Support Register Comparator H
*/
+#define COUNTA SPRN_COUNTA /* Development Support Register CounterA */
+#define COUNTB SPRN_COUNTB /* Development Support Register CounterB */
#define DAR SPRN_DAR /* Data Address Register */
#define DABR SPRN_DABR /* Data Address Breakpoint Register
*/
#define DBAT0L SPRN_DBAT0L /* Data BAT 0 Lower Register */
@@ -444,10 +469,13 @@
#define IBAT3L SPRN_IBAT3L /* Instruction BAT 3 Lower Register
*/
#define IBAT3U SPRN_IBAT3U /* Instruction BAT 3 Upper Register
*/
#define ICMP SPRN_ICMP /* Instruction TLB Compare Register
*/
+#define ICTRL SPRN_ICTRL2 /* Development Support Instruction Support
Control Register */
#define IMISS SPRN_IMISS /* Instruction TLB Miss Register */
#define IMMR SPRN_IMMR /* PPC 860/821 Internal Memory Map
Register */
#define L2CR SPRN_L2CR /* PPC 750 L2 control register */
#define L3CR SPRN_L3CR /* PPC 7450 L3 Cache control
register */
+#define LCTRL1 SPRN_LCTRL1 /* Development Support Load/Store Support
Comparators Control Register */
+#define LCTRL2 SPRN_LCTRL2 /* Development Support Load/Store Support
AND-OR Control Register */
#define LR SPRN_LR
#define PVR SPRN_PVR /* Processor Version */
#define RPA SPRN_RPA /* Required Physical Address
Register */
--- /linux/include/asm-ppc/ptrace.h.orig 2005-01-25
14:57:10.183801872 +0100
+++ /linux/include/asm-ppc/ptrace.h 2005-01-25 14:59:49.425593440 +0100
@@ -32,6 +32,18 @@
unsigned long ccr;
unsigned long mq; /* 601 only (not used at present) */
/* Used on APUS to hold IPL value.
*/
+ unsigned long cmpa;
+ unsigned long cmpb;
+ unsigned long cmpc;
+ unsigned long cmpd;
+ unsigned long der;
+ unsigned long cmpe;
+ unsigned long cmpf;
+ unsigned long cmpg;
+ unsigned long cmph;
+ unsigned long lctrl1;
+ unsigned long lctrl2;
+ unsigned long ictrl;
unsigned long trap; /* Reason for being here */
unsigned long dar; /* Fault registers */
unsigned long dsisr;
@@ -109,10 +121,24 @@
#define PT_CCR 38
#define PT_MQ 39
-#define PT_FPR0 48 /* each FP reg occupies 2 slots in this
space */
+#define PT_CMPA 40
+#define PT_CMPB 41
+#define PT_CMPC 42
+#define PT_CMPD 43
+#define PT_DER 44
+#define PT_CMPE 45
+#define PT_CMPF 46
+#define PT_CMPG 47
+#define PT_CMPH 48
+#define PT_LCTRL1 49
+#define PT_LCTRL2 50
+#define PT_ICTRL 51
+
+#define PT_FPR0 60 /* each FP reg occupies 2 slots in this
space */
#define PT_FPR31 (PT_FPR0 + 2*31)
#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
+
/* Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go */
#define PTRACE_GETVRREGS 18
#define PTRACE_SETVRREGS 19
^ permalink raw reply
* PCI allocation problem
From: Figini Enzo @ 2005-01-27 12:42 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 3171 bytes --]
Hi, All
I'm using linux 2.6.10 on a board with MPC8280 and I have a problem with the
PCI init.
After allocating resource for the bus (pcibios_allocate_bus_resource() in
pcibios_init() ), the following pcibios_allocate_resource(0) and (1) fails,
like it's possible to see from the following report.
Jan 1 00:16:52 (none) daemon.info klogd: PCI: Probing PCI hardware
Jan 1 00:16:52 (none) daemon.warn klogd: PCI: bridge rsrc
70000000..74000000 (101), parent c01ef158
Jan 1 00:16:52 (none) daemon.warn klogd: PCI: bridge rsrc
40000000..4fffffff (1200), parent c01ef174
Jan 1 00:16:52 (none) daemon.warn klogd: PCI: bridge rsrc
60000000..6fffffff (200), parent c01ef174
Jan 1 00:16:52 (none) daemon.warn klogd: PCI: pcibios_allocate_resources()
- pass=0
Jan 1 00:16:52 (none) daemon.warn klogd: devfn=0x0 - command=0x6
Jan 1 00:16:52 (none) daemon.warn klogd: idx=0 - disabled=0x0
Jan 1 00:16:52 (none) daemon.warn klogd: PCI:0000:00:00.0: Resource 0:
00000000-0001ffff (f=200)
Jan 1 00:16:52 (none) daemon.err klogd: PCI: Cannot allocate resource
region 0 of device 0000:00:00.0
Jan 1 00:16:52 (none) daemon.warn klogd: PCI: parent is c0283070:
60000000-6fffffff (f=200)
Jan 1 00:16:52 (none) daemon.warn klogd: idx=1 - disabled=0x0
Jan 1 00:16:52 (none) daemon.warn klogd: PCI:0000:00:00.0: Resource 1:
00000000-03ffffff (f=1208)
Jan 1 00:16:52 (none) daemon.err klogd: PCI: Cannot allocate resource
region 1 of device 0000:00:00.0
Jan 1 00:16:52 (none) daemon.warn klogd: PCI: parent is c0283054:
40000000-4fffffff (f=1200)
Jan 1 00:16:52 (none) daemon.warn klogd: PCI: pcibios_allocate_resources()
- pass=1
Jan 1 00:16:52 (none) daemon.warn klogd: devfn=0x0 - command=0x6
It's possible it will be a errata configurazione of bridge ???
The define for configuring the PCI (inbound/outbound windows) into my board
platform include file are
/* BR0 - allow the CPU to access PCI address space */
#define MPC826x_PCI_BASE 0x40000000
#define MPC826x_PCI_MASK 0xc0000000
/* OUTBOUND 0 - Master window that allows the CPU to access PCI Memory
(prefetch). */
#define MPC826x_PCI_LOWER_MEM 0x40000000
#define MPC826x_PCI_UPPER_MEM 0x4fffffff
#define MPC826x_PCI_MEM_OFFSET 0x00000000
/* OUTBOUND 1 - allows the CPU to access PCI Memory (non-prefetch) */
#define MPC826x_PCI_LOWER_MMIO 0x60000000
#define MPC826x_PCI_UPPER_MMIO 0x6fffffff
#define MPC826x_PCI_MMIO_OFFSET 0x00000000
/* OUTBOUND 2 -0 allows the CPU to access PCI IO space */
#define MPC826x_PCI_LOWER_IO 0x70000000
#define MPC826x_PCI_UPPER_IO 0x74000000
#define MPC826x_PCI_IO_BASE MPC826x_PCI_LOWER_IO
#define MPC826x_PCI_IO_SIZE (MPC826x_PCI_UPPER_IO-MPC826x_PCI_LOWER_IO)
/* INBOUND 0 - PCI Memory map */
#define MPC826x_PCI_SLAVE_MEM_LOCAL (((struct bd_info
*)__res)->bi_memstart)
#define MPC826x_PCI_SLAVE_MEM_BUS (((struct bd_info
*)__res)->bi_memstart)
#define MPC826x_PCI_SLAVE_MEM_SIZE (((struct bd_info
*)__res)->bi_memsize)
and are the same value used in u-boot, where all is ok and the pci run
properly.
Shuld be defined something other ???
Best regards.
Enzo Figini
PS - with this define about OUTBOUND 2 is not possible insert module, with
problem of vmalloc reported.
[-- Attachment #2: winmail.dat --]
[-- Type: application/ms-tnef, Size: 872 bytes --]
^ permalink raw reply
* Re: [PATCH] oprofile: falling back on timer interrupt mode
From: Akinobu Mita @ 2005-01-27 14:56 UTC (permalink / raw)
To: Olaf Hering, Linux Kernel Mailing List
Cc: Andrew Morton, linuxppc-dev, Philippe Elie, Greg Banks,
John Levon
In-Reply-To: <20050126190537.GA26349@suse.de>
On Thursday 27 January 2005 04:05, Olaf Hering wrote:
> On Wed, Jan 26, Linux Kernel Mailing List wrote:
> > ChangeSet 1.2038, 2005/01/25 20:31:01-08:00, amgta@yacht.ocn.ne.jp
> >
> > [PATCH] oprofile: falling back on timer interrupt mode
> This misses arch/ppc
Thanks for pointing that out.
This is opofile timer-mode fallback fix for ppc.
Signed-off-by: Akinobu Mita <amgta@yacht.ocn.ne.jp>
--- 2.6-bk/arch/ppc/oprofile/common.c.orig 2005-01-27 23:28:44.000000000 +0900
+++ 2.6-bk/arch/ppc/oprofile/common.c 2005-01-27 23:32:27.000000000 +0900
@@ -124,7 +124,7 @@ static struct oprofile_operations oprof_
.cpu_type = NULL /* To be filled in below. */
};
-void __init oprofile_arch_init(struct oprofile_operations *ops)
+int __init oprofile_arch_init(struct oprofile_operations *ops)
{
char *name;
int cpu_id = smp_processor_id();
@@ -132,14 +132,13 @@ void __init oprofile_arch_init(struct op
#ifdef CONFIG_FSL_BOOKE
model = &op_model_fsl_booke;
#else
- printk(KERN_ERR "oprofile enabled on unsupported processor!\n");
- return;
+ return -ENODEV;
#endif
name = kmalloc(32, GFP_KERNEL);
if (NULL == name)
- return;
+ return -ENOMEM;
sprintf(name, "ppc/%s", cur_cpu_spec[cpu_id]->cpu_name);
@@ -151,6 +150,8 @@ void __init oprofile_arch_init(struct op
printk(KERN_INFO "oprofile: using %s performance monitoring.\n",
oprof_ppc32_ops.cpu_type);
+
+ return 0;
}
void oprofile_arch_exit(void)
^ permalink raw reply
* Re: cmd_line and cmd_preset in arch/ppc/boot/simple/misc.c
From: Leigh Brown @ 2005-01-27 15:40 UTC (permalink / raw)
To: Rob Baxter; +Cc: linuxppc-dev list
In-Reply-To: <20050127002831.GB3683@synergymicro.com>
Rob Baxter said:
> On Wed, Jan 26, 2005 at 06:55:13PM -0000, Leigh Brown wrote:
>> Could someone please confirm that I'm not going mad? At least wrt
>> this ;-) We have this code in misc.c:
>>
>> #ifdef CONFIG_GEMINI
>> /*
>> * If cmd_line is empty and cmd_preset is not, copy cmd_preset
>> * to cmd_line. This way we can override cmd_preset with the
>> * command line from Smon.
>> */
>>
>> if ( (cmd_line[0] == '\0') && (cmd_preset[0] != '\0'))
>> memcpy (cmd_line, cmd_preset, sizeof(cmd_preset));
>> #endif
>>
>> /* Display standard Linux/PPC boot prompt for kernel args */
>> puts("\nLinux/PPC load: ");
>> cp = cmd_line;
>> memcpy (cmd_line, cmd_preset, sizeof(cmd_preset));
>>
>>
>> Surely the bit in the #ifdef is ineffective? Also, as cmd_line is
>> initialised to zeros, I think this is better:
>>
>> /*
>> * If cmd_line is empty and cmd_preset is not, copy cmd_preset
>> * to cmd_line. This way we can override cmd_preset with the
>> * command line from Smon.
>> */
>>
>> if ( (cmd_line[0] == '\0') && (cmd_preset[0] != '\0'))
>> memcpy (cmd_line, cmd_preset, sizeof(cmd_preset));
>>
>> /* Display standard Linux/PPC boot prompt for kernel args */
>> puts("\nLinux/PPC load: ");
>> cp = cmd_line;
>>
>> As, in the general case, cmd_line[0] will always be zero and
>> cmd_preset[0] will always be filled, so no need for an #ifdef.
>>
>> If someone can confirm I'm not mistaken, I can send a patch...
>
> No, you're not going mad...
>
> This piece code, CONFIG_GEMINI, complements a piece code in the GEMINI
> specific boot code. This piece of code is not part of the standard
> distribution. What this compliment piece of code did was to pass an
> optional command line from the firmware to misc.c.
Hi Rob, thanks for the answer. It was more the suggestion that the
code doesn't work: the bit in the #ifdef doesn't achieve anything
because just a few lines below it will *always* overwrite the
contents of cmd_line with the contents of cmd_preset...
Cheers,
Leigh.
^ permalink raw reply
* Re: [PATCH] Heartbeat LED for iBook
From: Joerg Dorchain @ 2005-01-27 16:36 UTC (permalink / raw)
To: Nico Schottelius; +Cc: linuxppc-dev list
In-Reply-To: <20050126113554.GD19633@schottelius.org>
[-- Attachment #1: Type: text/plain, Size: 1074 bytes --]
On Wed, Jan 26, 2005 at 12:35:54PM +0100, Nico Schottelius wrote:
> Joerg Dorchain [Tue, Jan 18, 2005 at 10:42:16AM +0100]:
> > [heartbeat blink patch]
>
> Well, wouldn't it make much more sense to write a
> /dev/frontled to access it via userspace?
Well, only some hardware supports something that can be used as a HB
LED, so IMHO yet another (misc-) device node is not completely
justified.
Then again, the current implemenation was more or less directly copied
from arch/m68k and the pmac IDE driver, my only "own" contribution was
taking the different HZ value into account, and this only in the
simplest possible way.
The original idea behing the m68k HB was to see wether the machine has
crashed so far that even interrupts weren't working any more, which is
sometime very hard to distiguish from very high load (>20). Obiously,
this is best done in kernel space. The load-dependeant blinking
frequency just made it perfect for its original purpose ;-)
I still consider it more a development aid than a real user feature.
Bye,
Joerg
[-- Attachment #2: Digital signature --]
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^ permalink raw reply
* MPC5200 bogomips
From: Stuart Adams @ 2005-01-27 16:29 UTC (permalink / raw)
To: linuxppc-embedded
We are only seeing 263.78 bogomips on a MPC5200 running
at 396 MHz.
Doesn't this seem way to low ?? With a 603e core I'd expect
1 bogomip per MHz or better.
The exact same kernel source running on an 8xx PPC gets about
1 bogomip per MHZ and my 745 CPU board does 2 bogomips
per MHz ... the bogomip calibration code is the same for all
PPC architectures so it seem like it should be an apples-to-apples
comparison.
-- Stuart
^ permalink raw reply
* Re: MPC5200 bogomips
From: Mark Chambers @ 2005-01-27 17:52 UTC (permalink / raw)
To: Stuart Adams, linuxppc-embedded
In-Reply-To: <41F916ED.1070705@brightstareng.com>
----- Original Message -----
From: "Stuart Adams" <sja@brightstareng.com>
To: <linuxppc-embedded@ozlabs.org>
Sent: Thursday, January 27, 2005 11:29 AM
Subject: MPC5200 bogomips
>
> We are only seeing 263.78 bogomips on a MPC5200 running
> at 396 MHz.
>
> Doesn't this seem way to low ?? With a 603e core I'd expect
> 1 bogomip per MHz or better.
>
> The exact same kernel source running on an 8xx PPC gets about
> 1 bogomip per MHZ and my 745 CPU board does 2 bogomips
> per MHz ... the bogomip calibration code is the same for all
> PPC architectures so it seem like it should be an apples-to-apples
> comparison.
>
> -- Stuart
>
Ha! You almost sound like you are quoting me from when I first
looked at bogomips on the 5200. Here's the story: If you drill
down to where bogomips are calculated you will see that it is
measuring the speed of a dbnz instruction. The calculation assumes
2 clocks per dbnz. So the 8xx comes out at 1 BogoMIP/MHz. The
5200 takes 3 clocks/dbnz in this loop, so you get .67 BogoMIP/MHz.
Not to worry, it's only one specific scenario. Overall I've found the
5200 to be about 1.5 MIPS/MHz compared to 8xx 1 MIPS/MHz.
Mark Chambers
^ permalink raw reply
* Relocating interrupt vectors in ppc440?
From: Shawn Jin @ 2005-01-27 18:05 UTC (permalink / raw)
To: linuxppc
Hi,
Do interrupt vectors locate at low addresses physically in ppc440?
>From the processor's user manual I understand that the base address of
interrupt vectors actually can be anywhere, set by IVPR. Also from
head_44x.S I found the following comments
/*
* The Book E MMUs are always on so we don't need to handle
* interrupts in real mode as with previous PPC processors. In
* this case we handle interrupts in the kernel virtual address
* space.
*
* Interrupt vectors are dynamically placed relative to the
* interrupt prefix as determined by the address of interrupt_base.
* The interrupt vectors offsets are programmed using the labels
* for each interrupt vector entry.
*
*/
The address of interrupt_base is 0xc0000224 in the image I built,
which is a virtual address from kernel point of view. What's the
corresponding physical address? Is it my SDRAM's physical base address
+ 0x224 (the offset)?
Assumed that the interrupt vectors locate at the low address space
physically and given that there is 2GB SDRAM shared by two ppc440
cores, can one of linux kernels run at the top of 1GB space? This
means the interrupt vectors for this copy need to move to upper 1GB.
Each core runs a copy of linux kernel independently.
Any ideas about relocating interupt vectors in ppc440?
Thanks a lot.
-Shawn.
^ permalink raw reply
* Re: [PATCH] radeonfb: massive update of PM code
From: Colin Leroy @ 2005-01-27 18:57 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1106012932.4533.46.camel@gaston>
On 18 Jan 2005 at 12h01, Benjamin Herrenschmidt wrote:
Hi,
> +module_param(default_dynclk, int, -2);
Btw, I have been told that module_param()'s third parameters is an octal
used for permissions (as 0644).
--
Colin
Reality continues to ruin my life.
-- Calvin
^ permalink raw reply
* Re: Relocating interrupt vectors in ppc440?
From: Matt Porter @ 2005-01-27 18:16 UTC (permalink / raw)
To: Shawn Jin; +Cc: linuxppc
In-Reply-To: <c3d0340b0501271005409166e6@mail.gmail.com>
On Thu, Jan 27, 2005 at 10:05:33AM -0800, Shawn Jin wrote:
> Hi,
>
> Do interrupt vectors locate at low addresses physically in ppc440?
Yes.
> >From the processor's user manual I understand that the base address of
> interrupt vectors actually can be anywhere, set by IVPR. Also from
> head_44x.S I found the following comments
>
> /*
> * The Book E MMUs are always on so we don't need to handle
> * interrupts in real mode as with previous PPC processors. In
> * this case we handle interrupts in the kernel virtual address
> * space.
> *
> * Interrupt vectors are dynamically placed relative to the
> * interrupt prefix as determined by the address of interrupt_base.
> * The interrupt vectors offsets are programmed using the labels
> * for each interrupt vector entry.
> *
> */
>
> The address of interrupt_base is 0xc0000224 in the image I built,
> which is a virtual address from kernel point of view. What's the
> corresponding physical address? Is it my SDRAM's physical base address
> + 0x224 (the offset)?
Yes.
> Assumed that the interrupt vectors locate at the low address space
> physically and given that there is 2GB SDRAM shared by two ppc440
> cores, can one of linux kernels run at the top of 1GB space? This
> means the interrupt vectors for this copy need to move to upper 1GB.
> Each core runs a copy of linux kernel independently.
Yes, you'd have to do something like the APUS code does by settings
PPC_MEMSTART appropriately for the second processor. Also, of course
limiting the memory on the first processor to 1GB. There's probably
a lot of fall out from PPC_MEMSTART being non-zero. I seem to
recall lots of assumptions about PPC_MEMSTART being at zero as
I was doing the ppc440 core work. You'll have to audit all the
MM paths for these assumptions, but it can be done.
> Any ideas about relocating interupt vectors in ppc440?
One idea is that if you really don't have to do it, then don't. :)
-Matt
^ permalink raw reply
* Re: [PATCH] radeonfb: massive update of PM code
From: Colin Leroy @ 2005-01-27 18:52 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1106012932.4533.46.camel@gaston>
On 18 Jan 2005 at 12h01, Benjamin Herrenschmidt wrote:
Hi Ben,
> This patch is a quite massive update to radeonfb. It adds the ability
> to reboot from scratch the various chip models used on the recent
> powermac laptops, adds a bunch of new chips (including R420 support,
> untested), plus various fixes here or there including LCD & flat panel
> blanking, abuse of stack usage in radeonfb_set_par(), and finally,
> adapts the PM code to the recent powermac changes.
I just upgraded to 2.6.10, applied the 6 other patches you sent and this
one. This one makes some heavy video corruption on my iBook G4
(PowerBook6,3). The patch applies with a 27 lines offset at most hunks,
but does no rejects.
I'm using xorg 6.7.0, and your test sleep patch #7 on 2.6.9 worked fine.
Tell me if I can be of any help...
Thanks!
--
Colin
"Dinner not ready: (A)bort (R)etry (P)izza"
^ permalink raw reply
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