* Re: symlinks in /proc/device-tree
From: Olaf Hering @ 2005-05-30 6:17 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc64-dev, linuxppc-dev list
In-Reply-To: <1117429620.5228.38.camel@gaston>
On Mon, May 30, Benjamin Herrenschmidt wrote:
> Hi !
>
> Is anybody actually using one of these things in /proc/device-tree ?
Just make sure the devspec file in sysfs doesnt contain symlinks.
^ permalink raw reply
* Re: symlinks in /proc/device-tree
From: Benjamin Herrenschmidt @ 2005-05-30 6:22 UTC (permalink / raw)
To: Olaf Hering; +Cc: linuxppc64-dev, linuxppc-dev list
In-Reply-To: <20050530061737.GB28195@suse.de>
On Mon, 2005-05-30 at 08:17 +0200, Olaf Hering wrote:
> On Mon, May 30, Benjamin Herrenschmidt wrote:
>
> > Hi !
> >
> > Is anybody actually using one of these things in /proc/device-tree ?
>
> Just make sure the devspec file in sysfs doesnt contain symlinks.
It doesn't.
Ben.
^ permalink raw reply
* Re: FW: Re: load u-boot.bin failure with BDI2000
From: Wolfgang Denk @ 2005-05-30 7:54 UTC (permalink / raw)
To: tuotuo wang; +Cc: linuxppc-embedded
In-Reply-To: <BAY24-F40F8F31EEE582D1E998CFEAD030@phx.gbl>
In message <BAY24-F40F8F31EEE582D1E998CFEAD030@phx.gbl> you wrote:
>
> You know,my config file of BDI2000 is download from www.denx.de,because
> there have the sbc8260's.My board run the ppcboot at first,and i can use my
> BDI2000 properly with this config file.
Most probably you erased the flash (including the HRCW) and then
power-cycled the board. Now your board cannot find a valid HRCW at
poweron which leaves the CPU in a unusable state in which not even
JTAG access is working.
There should be a jumper or switch on your board to enable the
default configuration - search for RSTCONF or so. Note that you may
have to adjust the config file for the default configuration
(BOOTADDR and maybe others, too).
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
You can observe a lot just by watchin'. - Yogi Berra
^ permalink raw reply
* Embedded PowerPC with more than 2Go of RAM.
From: Laurent Lagrange @ 2005-05-30 9:55 UTC (permalink / raw)
To: linuxppc-embedded
Hi all,
We want to design a PCI host embedded PowerPC board with a 3Go local RAM
memory.
This processor is a MPC74xx with an internal 32 bits and an external 36 bits
address bus.
Usually, the mapping is :
0x00000000-0x80000000 : physical RAM
0x80000000-0xc0000000 : PCI memory access
0xc0000000-0xf0000000 : kernel virtual memory
0xf0000000-0xffffffff : IO area access
1) On this board, the physical memory will be :
0x00000000-0xc0000000 : physical RAM
Where could we map PCI memory space ?
2) The kernel virtual memory usually has the same size as the physical RAM
(two memory footprint for the same physical space ! ).
The kernel virtual memory will be :
0xc0000000-0x180000000 : kernel virtual memory
Where could we map IO space ?
3) Usually, all the host memory is mapped on pci bus. For a 32bits pci bus,
we could not do this.
Is it possible to only map on pci, the DMA memory area which is managed with
the kmalloc(size, GFP_DMA)
and kfree functions ? How can we set the DMA memory parameters (base address
and size) ?
Thanks for any idea
Laurent
^ permalink raw reply
* Re: bd_t Cleaning: Interface Part
From: Clemens Koller @ 2005-05-30 10:13 UTC (permalink / raw)
To: Jon Loeliger; +Cc: linuxppc-embedded@ozlabs.org
In-Reply-To: <1117221259.26114.91.camel@cashmere.sps.mot.com>
Hello, Jon!
I guess there is a little typo:
spped -> speed?
> +unsigned long
> +fw_get_ethspped(void)
> +{
> +#if defined(FW_BDT_HAS_ETHSPEED)
> + return binfo->bi_ethspeed;
> +#else
> + return 0;
> +#endif
> +}
and here...
> +unsigned long fw_get_ethspped(void);
Greets,
Clemens Koller
_______________________________
R&D Imaging Devices
Anagramm GmbH
Rupert-Mayer-Str. 45/1
81379 Muenchen
Germany
http://www.anagramm.de
Phone: +49-89-741518-50
Fax: +49-89-741518-19
^ permalink raw reply
* I cant stop at the break point !
From: lonelobo @ 2005-05-30 10:02 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 406 bytes --]
hello every one! when I debug the u-boot with bdi2000 ,I set the break point at the
board_init_r but it cannot stop there. I do this as fellow: 1.symbol-file
2.add-symbol-file u-boot address 3.b board_init_r 4. c The address is which u-boot reloaded itself to.I get the addrees by printing before u-boot relocated. what's more,IT can stop when I set the hard break point there! please help me !thanks!
[-- Attachment #2: Type: text/html, Size: 1152 bytes --]
^ permalink raw reply
* Re: Cross compiler
From: Gerhard Jaeger @ 2005-05-30 10:23 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <DCEAAC0833DD314AB0B58112AD99B93B8593A1@ismail.innsys.innovsys.com>
Hi,
On Thursday 26 May 2005 17:33, Rune Torgersen wrote:
> Anybody know how to set up a cross compiler for nptl support?
>
> I'm trying to use crosstools to compile a gcc-3.4.3/glibc-2.3.4 for
> ppc-604 (actually for mpc826x) on i686.
which version of crosstools?
> It works if I make it with linuxthreads.
> If I do GLIBC_ADDON_OPTIONS==nptl ./my-ppc604_new.sh
> Then glibc configure fails with an error about needing a gcc with forced
> unwind support.
>
> If I try to set up gcc options to enable threading, then GCC core
> compile fails with error that it cannot find pthread.h
>
> Anybody know of a solution?
have you checked out:
http://www.wwwdotorg.org/writings/code/nptl_tool/nptl_tool.html
Gerhard
--
Gerhard Jaeger <gjaeger@sysgo.com>
SYSGO AG Embedded and Real-Time Software
www.sysgo.com | www.elinos.com | www.pikeos.com | www.osek.de
^ permalink raw reply
* Re: I cant stop at the break point !
From: Sam Song @ 2005-05-30 10:56 UTC (permalink / raw)
To: lonelobo; +Cc: linuxppc-embedded
In-Reply-To: <429AE4A8.000013.14311@m150.163.com>
--- lonelobo <lonelobo@163.com> wrote:
> hello every one! when I debug the u-boot with
> bdi2000 ,I set the break point at the
> board_init_r but it cannot stop there. I do this as
Two things you need to take care.
First, you sent your message to a wrong maillist.
Questions related u-boot pls go to u-boot maillist.
Second, send your message in plain text to maillist.
HTML is not welcome. Pls adjust your mail preference.
Thanks,
Sam
_________________________________________________________
Do You Yahoo!?
注册世界一流品质的雅虎免费电邮
http://cn.rd.yahoo.com/mail_cn/tag/1g/*http://cn.mail.yahoo.com/
^ permalink raw reply
* Re: FW: Re: load u-boot.bin failure with BDI2000
From: Sam Song @ 2005-05-30 11:05 UTC (permalink / raw)
To: tuotuo wang; +Cc: linuxppc-embedded
---"tuotuo wang" <dvdstar@hotmail.com> wrote:
> > You know,my config file of BDI2000 is download
> > from www.denx.de,because
> > there have the sbc8260's.My board run the ppcboot
> > at first,and i can use my
> > BDI2000 properly with this config file.
I perfer u to try again before taking a more
complicated action. Just leave target itself and
BDI2000, remove any other peripheral equipment.
Perhaps it could recover from such a failure.
I had the similar experience on 8xx board. Don't
know whether it works for 82xx.
Best regards,
Sam
_________________________________________________________
Do You Yahoo!?
150万曲MP3疯狂搜，带您闯入音乐殿堂
http://music.yisou.com/
美女明星应有尽有，搜遍美图、艳图和酷图
http://image.yisou.com
1G就是1000兆，雅虎电邮自助扩容！
http://cn.rd.yahoo.com/mail_cn/tag/1g/*http://cn.mail.yahoo.com/event/mail_1g/
^ permalink raw reply
* Error in fcc_enet driver in 2.6.10 version
From: Turconi Ennio Angelo @ 2005-05-30 13:22 UTC (permalink / raw)
To: linuxppc-embedded
Hi everybody.
I think I found out an error in arch/ppc/8260io/fcc_enet.c source =
(kernel version Vanilla 2.6.10).
When obtaining the pointer to the CPM DPRAM, ioremap() is not used.
In 85xx architecture, it causes a bus error each time the driver =
attempts to access
a location in the CCSRBAR region.
I used the follwing patch (valid only for 85xx devices)
--- fcc_enet.c 2004-12-24 22:34:44.000000000 +0100
+++ fcc_enet_new.c 2005-05-30 15:00:38.000000000 +0200
@@ -1450,7 +1450,7 @@
volatile cpm2_map_t *immap;
volatile iop_cpm2_t *io;
- immap =3D (cpm2_map_t *)CPM_MAP_ADDR; /* and to internal =
registers */
+ immap =3D (cpm2_map_t *)ioremap(CPM_MAP_ADDR,MPC85xx_CPM_SIZE); =
/* and to i
nternal registers */
io =3D &immap->im_ioport;
np =3D sizeof(fcc_ports) / sizeof(fcc_info_t);
Can anyone tell me why a 1 to 1 logical to physical mapping was assumed?
Ennio Turconi
Senior Fw Designer
Gateway Products
ITALTEL SpA
Settimo Mil., Italy
=20
^ permalink raw reply
* Re: FW: Re: load u-boot.bin failure with BDI2000
From: tuotuo wang @ 2005-05-30 13:53 UTC (permalink / raw)
To: samlinuxppc; +Cc: linuxppc-embedded
In-Reply-To: <20050530110550.44528.qmail@web15810.mail.cnb.yahoo.com>
hello,sam song:
I have try my best to do this.I haven't another equipment,even the
additional memory bank.
Mr.denk:
I konw i must change the DIP switch,the actual problem to me is i
don't konw how to deal with the config file.Could you give me some clear
help.
>From: Sam Song <samlinuxppc@yahoo.com.cn>
>To: tuotuo wang <dvdstar@hotmail.com>
>CC: linuxppc-embedded@ozlabs.org
>Subject: Re: FW: Re: load u-boot.bin failure with BDI2000
>Date: Mon, 30 May 2005 19:05:49 +0800 (CST)
>
>---"tuotuo wang" <dvdstar@hotmail.com> wrote:
> > > You know,my config file of BDI2000 is download
> > > from www.denx.de,because
> > > there have the sbc8260's.My board run the ppcboot
> > > at first,and i can use my
> > > BDI2000 properly with this config file.
>
>I perfer u to try again before taking a more
>complicated action. Just leave target itself and
>BDI2000, remove any other peripheral equipment.
>Perhaps it could recover from such a failure.
>
>I had the similar experience on 8xx board. Don't
>know whether it works for 82xx.
>
>Best regards,
>
>Sam
>
_________________________________________________________________
与联机的朋友进行交流，请使用 MSN Messenger: http://messenger.msn.com/cn
^ permalink raw reply
* Complete ccsr map for mpc8540 available?
From: Clemens Koller @ 2005-05-30 15:03 UTC (permalink / raw)
To: linuxppc-embedded
Hi, There!
I want to access the local bus controller (LBC) registers
of the mpc8540 from within a module.
Therefore I want to use similar structures as for the 8560's cpm2_immr
or the 8xx. However, I was not able to find a complete ccsr map for the
mpc8540 in the 2.6.11.x kernels. (immap_85xx.h, 8xx_immr.h, ...)
Can someone point me to get the memc_brx / orx and friends for mpc8540?
(the complete CCSR map.) Or some code to recycle?
Or do I need to patch more into immap_85xx.h on my own? I just want to
avoid to do duplicate work.
Or is it better to extend the fsl_ocp or the platform device structures?
Thanks,
Clemens Koller
_______________________________
R&D Imaging Devices
Anagramm GmbH
Rupert-Mayer-Str. 45/1
81379 Muenchen
Germany
http://www.anagramm.de
Phone: +49-89-741518-50
Fax: +49-89-741518-19
^ permalink raw reply
* Re: Embedded PowerPC with more than 2Go of RAM.
From: Roger Larsson @ 2005-05-30 17:47 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <000001c564fd$aa5aad60$5201a8c0@GEG2400>
On Monday 30 May 2005 11.55, Laurent Lagrange wrote:
> Hi all,
>
> We want to design a PCI host embedded PowerPC board with a 3Go local RAM
> memory.
> This processor is a MPC74xx with an internal 32 bits and an external 36
> bits address bus.
In that case it should have some a mechanism for mapping virtual address range
(32 bits) to physical (36 bits).
>
> Usually, the mapping is :
physical, only using 32 bits
> 0x00000000-0x80000000 : physical RAM
> 0x80000000-0xc0000000 : PCI memory access
> 0xc0000000-0xf0000000 : kernel virtual memory
> 0xf0000000-0xffffffff : IO area access
First attempt: I would try to put the PCI memory range at
0x100000000-140000000 (above 32 bits addressable)
But this will require the drivers to doing things correctly...
Second attempt: Do you need all RAM to be directly usable by user application?
Or would it be enough to be able to use it as a RAM disk? (with that amount
of memory my guess is that this is what you really want!) Should it be nice to
have it persistant over reboots?
In that case put the RAM disk part above 32 bits addressable, only that RAM
disk driver needs to handle the specific nature of this memory (DMA memory
to memory). And several years ago I saw some ramdisk driver that could were
persistent (BIOS and linux RAM memory init was set not to touch it).
Add some standby power to it and it will be persistent over power failures
too..
Then ask yourself - does it need to be memory mapped? Or would a IDE like
interface be enough???
/RogerL
^ permalink raw reply
* pci card memory card with SATA interface
From: Roger Larsson @ 2005-05-30 20:18 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <200505301947.40195.roger.larsson@norran.net>
Noticed this related announcement...
http://www.anandtech.com/tradeshows/showdoc.aspx?i=2431&p=5
/RogerL
^ permalink raw reply
* Re: ppc32: Rework power management take #3
From: Mickael Royer @ 2005-05-30 21:59 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev list, debian-powerpc@lists.debian.org
In-Reply-To: <1117424155.5228.28.camel@gaston>
Hi Ben
> Ok, the patch is now getting "good enough" for wider testing. It applies
> on current "git" tree (or 2.6.12-rc6 when/if that is ever released).
I have just tested your patch with the 2.5.12-rc5-git5 on the new powerbook=
12".
And yes, the suspend to disk works very well, even if X is running (I
report my problem with X and the suspend to disk with a 2.6.12-rc4 in
another discussion).
It is really good.=20
Thanks for your good job Ben.=20
Mickael
On 5/30/05, Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> Ok, the patch is now getting "good enough" for wider testing. It applies
> on current "git" tree (or 2.6.12-rc6 when/if that is ever released). It
> requires one other patch to be applied first:
>=20
> http://gate.crashing.org/~benh/ppc32-remove-macserial.diff
>=20
> The PM patch itself can be found at:
>=20
> http://gate.crashing.org/~benh/ppc32-rework-pm.diff
>=20
> This patch completely reworks both suspend-to-ram and suspend-to-disk
> support on PowerMac:
>=20
> - suspend-to-ram code is moved away from the via-pmu.c driver
> - both suspend-to-disk & to-ram consolidated to use the same
> infrastructure and code base in a new pmac_pm.c file
> - significants fixes & improvements to suspend-to-disk
> - for now (may change), use the "refrigerator" with suspend-to-ram as
> well as suspend-to-disk. This may help make it a bit more robust vs.
> userland activity during the sleep process
> - CONFIG_PMAC_PBOOK is gone. CONFIG_PMAC_MEDIABAY is new and controls
> wether the powerbook hostwap bay driver is included. The rest of bits
> formerly under CONFIG_PMAC_PBOOK control are now either always on
> (like /dev/pmu interface on PMU based machines) or dependent on other
> config options (like CONFIG_PM, CONFIG_PPC_PMAC, ...)
>=20
> The patch will not be in 2.6.12 (though will probably apply on top of
> it). I aim for a 2.6.13 release, knowing that the patch changes a bunch
> of non-ppc-specific power management bits, and thus may need some time
> to be fully merged upstream.
>=20
>=20
>=20
>=20
> --=20
> To UNSUBSCRIBE, email to debian-powerpc-REQUEST@lists.debian.org
> with a subject of "unsubscribe". Trouble? Contact
> listmaster@lists.debian.org
>=20
>
^ permalink raw reply
* set_multicast_list() commented out in fcc_enet.c
From: Alex Zeffertt @ 2005-05-31 9:23 UTC (permalink / raw)
To: linuxppc-embedded
Hi all,
I've noticed that in arch/ppc/8260_io/fcc_enet.c at the very top of the
function set_multicast_list() there is a return statement - effectively
commenting out the rest of the code. There is no comment saying why it
is there.
An effect of this is that you cannot put the device in promiscuous mode,
which is required when adding it to a bridge.
Please can anyone say why this "return;" is there?
Thanks,
Alex
PS I'm using denx's linuxppc_devel tagged 2005-03-06, which is based
on linux-2.4.25.
^ permalink raw reply
* RE: set_multicast_list() commented out in fcc_enet.c
From: Benjamin Dapon-Pigatto @ 2005-05-31 9:38 UTC (permalink / raw)
To: 'Alex Zeffertt', linuxppc-embedded
In-Reply-To: <20050531102323.0fbc2b5e.ajz@cambridgebroadband.com>
Hi Alex,
I had the same problem few months ago with arch/ppc/cpm2_io/fcc_enet.c.=20
It should be the same driver.
I suppose that multicast is not correctly implemented. I have commented =
this
return and promiscuous mode works fine but I have never tried with
multicast.
Benjamin
-----Message d'origine-----
De=A0: linuxppc-embedded-bounces@ozlabs.org
[mailto:linuxppc-embedded-bounces@ozlabs.org] De la part de Alex =
Zeffertt
Envoy=E9=A0: mardi 31 mai 2005 11:23
=C0=A0: linuxppc-embedded@ozlabs.org
Objet=A0: set_multicast_list() commented out in fcc_enet.c
Hi all,
I've noticed that in arch/ppc/8260_io/fcc_enet.c at the very top of the
function set_multicast_list() there is a return statement - effectively
commenting out the rest of the code. There is no comment saying why it
is there.
An effect of this is that you cannot put the device in promiscuous mode,
which is required when adding it to a bridge.
Please can anyone say why this "return;" is there?
Thanks,
Alex
PS I'm using denx's linuxppc_devel tagged 2005-03-06, which is based
on linux-2.4.25.
_______________________________________________
Linuxppc-embedded mailing list
Linuxppc-embedded@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-embedded
^ permalink raw reply
* Re: bd_t Cleaning: Interface Part
From: Jon Loeliger @ 2005-05-31 14:59 UTC (permalink / raw)
To: Clemens Koller; +Cc: linuxppc-embedded@ozlabs.org
In-Reply-To: <429AE74F.6090509@anagramm.de>
On Mon, 2005-05-30 at 05:13, Clemens Koller wrote:
> Hello, Jon!
>
> I guess there is a little typo:
> spped -> speed?
Rats.
Thanks for looking into the mess, and catching that!
jdl
^ permalink raw reply
* Re: Complete ccsr map for mpc8540 available?
From: Kumar Gala @ 2005-05-31 15:17 UTC (permalink / raw)
To: Clemens Koller; +Cc: linuxppc-embedded
In-Reply-To: <429B2B54.1060504@anagramm.de>
On May 30, 2005, at 10:03 AM, Clemens Koller wrote:
> Hi, There!
>
> I want to access the local bus controller (LBC) registers
> of the mpc8540 from within a module.
> Therefore I want to use similar structures as for the 8560's cpm2_immr
> or the 8xx. However, I was not able to find a complete ccsr map for the
> mpc8540 in the 2.6.11.x kernels. (immap_85xx.h, 8xx_immr.h, ...)
>
> Can someone point me to get the memc_brx / orx and friends for mpc8540?
> (the complete CCSR map.) Or some code to recycle?
> Or do I need to patch more into immap_85xx.h on my own? I just want to
> avoid to do duplicate work.
>
> Or is it better to extend the fsl_ocp or the platform device
> structures?
What do you plan on doing with the local bus controller in the kernel?
If this is only configuration of the controller for a given chip select
that I would suggest doing something similar to how we handle PCI. You
can probably find a description of the localbus registers in the u-boot
source tree.
Is this a change you want to get back into the mainline kernel tree?
- kumar
^ permalink raw reply
* RE: Cross compiler
From: Rune Torgersen @ 2005-05-31 15:29 UTC (permalink / raw)
To: Gerhard Jaeger, linuxppc-embedded
> > I'm trying to use crosstools to compile a gcc-3.4.3/glibc-2.3.4 for
> > ppc-604 (actually for mpc826x) on i686.
>=20
> which version of crosstools?
Crosstools-0.31
> > Anybody know of a solution?
>=20
> have you checked out:
> http://www.wwwdotorg.org/writings/code/nptl_tool/nptl_tool.html
>=20
Thanks, I'll have a look at that link.
^ permalink raw reply
* [PATCH] ppc32: Added support for new MPC8548 family of PowerQUICC III processors
From: Kumar Gala @ 2005-05-31 16:01 UTC (permalink / raw)
To: Andrew Morton; +Cc: linux-kernel, linuxppc-embedded
Added descriptions of the new MPC8548 family processors, e500 core and
peripherals.
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
---
commit bcaf8337eca3e379a44b110ac28e06c4da07893a
tree d4095240ac6e9edbd6b011f5d84cd282c1787a0d
parent 5e485b7975472ba4a408523deb6541e70c451842
author Kumar K. Gala <kumar.gala@freescale.com> Tue, 31 May 2005 10:46:57 -0500
committer Kumar K. Gala <kumar.gala@freescale.com> Tue, 31 May 2005 10:46:57 -0500
arch/ppc/kernel/cputable.c | 14 +++
arch/ppc/syslib/mpc85xx_devices.c | 185 +++++++++++++++++++++++++++++++++++++
arch/ppc/syslib/mpc85xx_sys.c | 105 +++++++++++++++++++++
include/asm-ppc/irq.h | 6 +
include/asm-ppc/mpc85xx.h | 7 +
include/linux/fsl_devices.h | 8 +
6 files changed, 323 insertions(+), 2 deletions(-)
diff --git a/arch/ppc/kernel/cputable.c b/arch/ppc/kernel/cputable.c
--- a/arch/ppc/kernel/cputable.c
+++ b/arch/ppc/kernel/cputable.c
@@ -907,6 +907,20 @@ struct cpu_spec cpu_specs[] = {
.dcache_bsize = 32,
.num_pmcs = 4,
},
+ { /* e500v2 */
+ .pvr_mask = 0xffff0000,
+ .pvr_value = 0x80210000,
+ .cpu_name = "e500v2",
+ /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
+ .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
+ CPU_FTR_USE_TB | CPU_FTR_BIG_PHYS,
+ .cpu_user_features = PPC_FEATURE_32 |
+ PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
+ PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .num_pmcs = 4,
+ },
#endif
#if !CLASSIC_PPC
{ /* default match */
diff --git a/arch/ppc/syslib/mpc85xx_devices.c b/arch/ppc/syslib/mpc85xx_devices.c
--- a/arch/ppc/syslib/mpc85xx_devices.c
+++ b/arch/ppc/syslib/mpc85xx_devices.c
@@ -40,6 +40,42 @@ static struct gianfar_platform_data mpc8
.phy_reg_addr = MPC85xx_ENET1_OFFSET,
};
+static struct gianfar_platform_data mpc85xx_etsec1_pdata = {
+ .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
+ FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
+ FSL_GIANFAR_DEV_HAS_MULTI_INTR |
+ FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
+ FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
+ .phy_reg_addr = MPC85xx_ENET1_OFFSET,
+};
+
+static struct gianfar_platform_data mpc85xx_etsec2_pdata = {
+ .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
+ FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
+ FSL_GIANFAR_DEV_HAS_MULTI_INTR |
+ FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
+ FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
+ .phy_reg_addr = MPC85xx_ENET1_OFFSET,
+};
+
+static struct gianfar_platform_data mpc85xx_etsec3_pdata = {
+ .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
+ FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
+ FSL_GIANFAR_DEV_HAS_MULTI_INTR |
+ FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
+ FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
+ .phy_reg_addr = MPC85xx_ENET1_OFFSET,
+};
+
+static struct gianfar_platform_data mpc85xx_etsec4_pdata = {
+ .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
+ FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
+ FSL_GIANFAR_DEV_HAS_MULTI_INTR |
+ FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
+ FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
+ .phy_reg_addr = MPC85xx_ENET1_OFFSET,
+};
+
static struct gianfar_platform_data mpc85xx_fec_pdata = {
.phy_reg_addr = MPC85xx_ENET1_OFFSET,
};
@@ -48,6 +84,10 @@ static struct fsl_i2c_platform_data mpc8
.device_flags = FSL_I2C_DEV_SEPARATE_DFSRR,
};
+static struct fsl_i2c_platform_data mpc85xx_fsl_i2c2_pdata = {
+ .device_flags = FSL_I2C_DEV_SEPARATE_DFSRR,
+};
+
static struct plat_serial8250_port serial_platform_data[] = {
[0] = {
.mapbase = 0x4500,
@@ -536,6 +576,151 @@ struct platform_device ppc_sys_platform_
},
},
#endif /* CONFIG_CPM2 */
+ [MPC85xx_eTSEC1] = {
+ .name = "fsl-gianfar",
+ .id = 1,
+ .dev.platform_data = &mpc85xx_etsec1_pdata,
+ .num_resources = 4,
+ .resource = (struct resource[]) {
+ {
+ .start = MPC85xx_ENET1_OFFSET,
+ .end = MPC85xx_ENET1_OFFSET +
+ MPC85xx_ENET1_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "tx",
+ .start = MPC85xx_IRQ_TSEC1_TX,
+ .end = MPC85xx_IRQ_TSEC1_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = MPC85xx_IRQ_TSEC1_RX,
+ .end = MPC85xx_IRQ_TSEC1_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "error",
+ .start = MPC85xx_IRQ_TSEC1_ERROR,
+ .end = MPC85xx_IRQ_TSEC1_ERROR,
+ .flags = IORESOURCE_IRQ,
+ },
+ },
+ },
+ [MPC85xx_eTSEC2] = {
+ .name = "fsl-gianfar",
+ .id = 2,
+ .dev.platform_data = &mpc85xx_etsec2_pdata,
+ .num_resources = 4,
+ .resource = (struct resource[]) {
+ {
+ .start = MPC85xx_ENET2_OFFSET,
+ .end = MPC85xx_ENET2_OFFSET +
+ MPC85xx_ENET2_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "tx",
+ .start = MPC85xx_IRQ_TSEC2_TX,
+ .end = MPC85xx_IRQ_TSEC2_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = MPC85xx_IRQ_TSEC2_RX,
+ .end = MPC85xx_IRQ_TSEC2_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "error",
+ .start = MPC85xx_IRQ_TSEC2_ERROR,
+ .end = MPC85xx_IRQ_TSEC2_ERROR,
+ .flags = IORESOURCE_IRQ,
+ },
+ },
+ },
+ [MPC85xx_eTSEC3] = {
+ .name = "fsl-gianfar",
+ .id = 3,
+ .dev.platform_data = &mpc85xx_etsec3_pdata,
+ .num_resources = 4,
+ .resource = (struct resource[]) {
+ {
+ .start = MPC85xx_ENET3_OFFSET,
+ .end = MPC85xx_ENET3_OFFSET +
+ MPC85xx_ENET3_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "tx",
+ .start = MPC85xx_IRQ_TSEC3_TX,
+ .end = MPC85xx_IRQ_TSEC3_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = MPC85xx_IRQ_TSEC3_RX,
+ .end = MPC85xx_IRQ_TSEC3_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "error",
+ .start = MPC85xx_IRQ_TSEC3_ERROR,
+ .end = MPC85xx_IRQ_TSEC3_ERROR,
+ .flags = IORESOURCE_IRQ,
+ },
+ },
+ },
+ [MPC85xx_eTSEC4] = {
+ .name = "fsl-gianfar",
+ .id = 4,
+ .dev.platform_data = &mpc85xx_etsec4_pdata,
+ .num_resources = 4,
+ .resource = (struct resource[]) {
+ {
+ .start = 0x27000,
+ .end = 0x27fff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "tx",
+ .start = MPC85xx_IRQ_TSEC4_TX,
+ .end = MPC85xx_IRQ_TSEC4_TX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "rx",
+ .start = MPC85xx_IRQ_TSEC4_RX,
+ .end = MPC85xx_IRQ_TSEC4_RX,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "error",
+ .start = MPC85xx_IRQ_TSEC4_ERROR,
+ .end = MPC85xx_IRQ_TSEC4_ERROR,
+ .flags = IORESOURCE_IRQ,
+ },
+ },
+ },
+ [MPC85xx_IIC2] = {
+ .name = "fsl-i2c",
+ .id = 2,
+ .dev.platform_data = &mpc85xx_fsl_i2c2_pdata,
+ .num_resources = 2,
+ .resource = (struct resource[]) {
+ {
+ .start = 0x03100,
+ .end = 0x031ff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MPC85xx_IRQ_IIC1,
+ .end = MPC85xx_IRQ_IIC1,
+ .flags = IORESOURCE_IRQ,
+ },
+ },
+ },
};
static int __init mach_mpc85xx_fixup(struct platform_device *pdev)
diff --git a/arch/ppc/syslib/mpc85xx_sys.c b/arch/ppc/syslib/mpc85xx_sys.c
--- a/arch/ppc/syslib/mpc85xx_sys.c
+++ b/arch/ppc/syslib/mpc85xx_sys.c
@@ -110,6 +110,111 @@ struct ppc_sys_spec ppc_sys_specs[] = {
MPC85xx_CPM_USB,
},
},
+ /* SVRs on 8548 rev1.0 matches for 8548/8547/8545 */
+ {
+ .ppc_sys_name = "8548E",
+ .mask = 0xFFFF00F0,
+ .value = 0x80390010,
+ .num_devices = 13,
+ .device_list = (enum ppc_sys_devices[])
+ {
+ MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
+ MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
+ MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
+ MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
+ },
+ },
+ {
+ .ppc_sys_name = "8548",
+ .mask = 0xFFFF00F0,
+ .value = 0x80310010,
+ .num_devices = 12,
+ .device_list = (enum ppc_sys_devices[])
+ {
+ MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
+ MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
+ MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
+ MPC85xx_PERFMON, MPC85xx_DUART,
+ },
+ },
+ {
+ .ppc_sys_name = "8547E",
+ .mask = 0xFFFF00F0,
+ .value = 0x80390010,
+ .num_devices = 13,
+ .device_list = (enum ppc_sys_devices[])
+ {
+ MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
+ MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
+ MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
+ MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
+ },
+ },
+ {
+ .ppc_sys_name = "8547",
+ .mask = 0xFFFF00F0,
+ .value = 0x80310010,
+ .num_devices = 12,
+ .device_list = (enum ppc_sys_devices[])
+ {
+ MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
+ MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
+ MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
+ MPC85xx_PERFMON, MPC85xx_DUART,
+ },
+ },
+ {
+ .ppc_sys_name = "8545E",
+ .mask = 0xFFFF00F0,
+ .value = 0x80390010,
+ .num_devices = 11,
+ .device_list = (enum ppc_sys_devices[])
+ {
+ MPC85xx_eTSEC1, MPC85xx_eTSEC2,
+ MPC85xx_IIC1, MPC85xx_IIC2,
+ MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
+ MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
+ },
+ },
+ {
+ .ppc_sys_name = "8545",
+ .mask = 0xFFFF00F0,
+ .value = 0x80310010,
+ .num_devices = 10,
+ .device_list = (enum ppc_sys_devices[])
+ {
+ MPC85xx_eTSEC1, MPC85xx_eTSEC2,
+ MPC85xx_IIC1, MPC85xx_IIC2,
+ MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
+ MPC85xx_PERFMON, MPC85xx_DUART,
+ },
+ },
+ {
+ .ppc_sys_name = "8543E",
+ .mask = 0xFFFF00F0,
+ .value = 0x803A0010,
+ .num_devices = 11,
+ .device_list = (enum ppc_sys_devices[])
+ {
+ MPC85xx_eTSEC1, MPC85xx_eTSEC2,
+ MPC85xx_IIC1, MPC85xx_IIC2,
+ MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
+ MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
+ },
+ },
+ {
+ .ppc_sys_name = "8543",
+ .mask = 0xFFFF00F0,
+ .value = 0x80320010,
+ .num_devices = 10,
+ .device_list = (enum ppc_sys_devices[])
+ {
+ MPC85xx_eTSEC1, MPC85xx_eTSEC2,
+ MPC85xx_IIC1, MPC85xx_IIC2,
+ MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
+ MPC85xx_PERFMON, MPC85xx_DUART,
+ },
+ },
{ /* default match */
.ppc_sys_name = "",
.mask = 0x00000000,
diff --git a/include/asm-ppc/irq.h b/include/asm-ppc/irq.h
--- a/include/asm-ppc/irq.h
+++ b/include/asm-ppc/irq.h
@@ -223,9 +223,15 @@ static __inline__ int irq_canonicalize(i
#define MPC85xx_IRQ_RIO_RX (12 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC1_TX (13 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC1_RX (14 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_TSEC3_TX (15 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_TSEC3_RX (16 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_TSEC3_ERROR (17 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC1_ERROR (18 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC2_TX (19 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC2_RX (20 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_TSEC4_TX (21 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_TSEC4_RX (22 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_TSEC4_ERROR (23 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC2_ERROR (24 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_FEC (25 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_DUART (26 + MPC85xx_OPENPIC_IRQ_OFFSET)
diff --git a/include/asm-ppc/mpc85xx.h b/include/asm-ppc/mpc85xx.h
--- a/include/asm-ppc/mpc85xx.h
+++ b/include/asm-ppc/mpc85xx.h
@@ -74,7 +74,7 @@ extern unsigned char __res[];
#define MPC85xx_GUTS_OFFSET (0xe0000)
#define MPC85xx_GUTS_SIZE (0x01000)
#define MPC85xx_IIC1_OFFSET (0x03000)
-#define MPC85xx_IIC1_SIZE (0x01000)
+#define MPC85xx_IIC1_SIZE (0x00100)
#define MPC85xx_OPENPIC_OFFSET (0x40000)
#define MPC85xx_OPENPIC_SIZE (0x40000)
#define MPC85xx_PCI1_OFFSET (0x08000)
@@ -127,6 +127,11 @@ enum ppc_sys_devices {
MPC85xx_CPM_MCC2,
MPC85xx_CPM_SMC1,
MPC85xx_CPM_SMC2,
+ MPC85xx_eTSEC1,
+ MPC85xx_eTSEC2,
+ MPC85xx_eTSEC3,
+ MPC85xx_eTSEC4,
+ MPC85xx_IIC2,
};
#endif /* CONFIG_85xx */
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -51,6 +51,7 @@ struct gianfar_platform_data {
/* board specific information */
u32 board_flags;
+ u32 phy_flags;
u32 phyid;
u32 interruptPHY;
u8 mac_addr[6];
@@ -61,9 +62,14 @@ struct gianfar_platform_data {
#define FSL_GIANFAR_DEV_HAS_COALESCE 0x00000002
#define FSL_GIANFAR_DEV_HAS_RMON 0x00000004
#define FSL_GIANFAR_DEV_HAS_MULTI_INTR 0x00000008
+#define FSL_GIANFAR_DEV_HAS_CSUM 0x00000010
+#define FSL_GIANFAR_DEV_HAS_VLAN 0x00000020
+#define FSL_GIANFAR_DEV_HAS_EXTENDED_HASH 0x00000040
+#define FSL_GIANFAR_DEV_HAS_PADDING 0x00000080
/* Flags in gianfar_platform_data */
-#define FSL_GIANFAR_BRD_HAS_PHY_INTR 0x00000001 /* if not set use a timer */
+#define FSL_GIANFAR_BRD_HAS_PHY_INTR 0x00000001 /* set or use a timer */
+#define FSL_GIANFAR_BRD_IS_REDUCED 0x00000002 /* Set if RGMII, RMII */
struct fsl_i2c_platform_data {
/* device specific information */
^ permalink raw reply
* [PATCH] ppc32: Added preliminary support for the MPC8548 CDS board
From: Kumar Gala @ 2005-05-31 16:02 UTC (permalink / raw)
To: Andrew Morton; +Cc: linux-kernel, linuxppc-embedded
Adds support for using the MPC8548 processor on the CDS reference board.
Currently all the major busses (PCI, PCI-X, PCI-Express, sRIO) and eTSEC3
and eTSEC4 are not supported.
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
---
commit 3288959347cb639411c735f97bbfd94e388347ce
tree d0d17af480ce3548879e20bc3f01175390540de3
parent d5cb2a6df9041a0124dee44838c01e4fbca367e6
author Kumar K. Gala <kumar.gala@freescale.com> Tue, 31 May 2005 10:49:55 -0500
committer Kumar K. Gala <kumar.gala@freescale.com> Tue, 31 May 2005 10:49:55 -0500
arch/ppc/configs/mpc8548_cds_defconfig | 659 ++++++++++++++++++++++++++
arch/ppc/platforms/85xx/Kconfig | 10
arch/ppc/platforms/85xx/Makefile | 1
arch/ppc/platforms/85xx/mpc85xx_cds_common.c | 50 +
arch/ppc/syslib/Makefile | 1
arch/ppc/syslib/ppc85xx_setup.c | 6
include/asm-ppc/mpc85xx.h | 2
7 files changed, 713 insertions(+), 16 deletions(-)
diff --git a/arch/ppc/configs/mpc8548_cds_defconfig b/arch/ppc/configs/mpc8548_cds_defconfig
new file mode 100644
--- /dev/null
+++ b/arch/ppc/configs/mpc8548_cds_defconfig
@@ -0,0 +1,659 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.12-rc4
+# Tue May 24 22:36:27 2005
+#
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_PPC=y
+CONFIG_PPC32=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+# CONFIG_KALLSYMS is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+# CONFIG_EPOLL is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# Processor
+#
+# CONFIG_6xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_POWER3 is not set
+# CONFIG_POWER4 is not set
+# CONFIG_8xx is not set
+CONFIG_E500=y
+CONFIG_BOOKE=y
+CONFIG_FSL_BOOKE=y
+# CONFIG_PHYS_64BIT is not set
+CONFIG_SPE=y
+CONFIG_MATH_EMULATION=y
+# CONFIG_CPU_FREQ is not set
+# CONFIG_PM is not set
+CONFIG_85xx=y
+CONFIG_PPC_INDIRECT_PCI_BE=y
+
+#
+# Freescale 85xx options
+#
+# CONFIG_MPC8540_ADS is not set
+CONFIG_MPC8548_CDS=y
+# CONFIG_MPC8555_CDS is not set
+# CONFIG_MPC8560_ADS is not set
+# CONFIG_SBC8560 is not set
+# CONFIG_STX_GP3 is not set
+CONFIG_MPC8548=y
+
+#
+# Platform options
+#
+# CONFIG_SMP is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_CMDLINE_BOOL is not set
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+# CONFIG_PCI is not set
+# CONFIG_PCI_DOMAINS is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_BOOT_LOAD=0x00800000
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=32768
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_LBD is not set
+# CONFIG_CDROM_PKTCDVD is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETFILTER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+# CONFIG_NET_CLS_ROUTE is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+
+#
+# Ethernet (1000 Mbit)
+#
+CONFIG_GIANFAR=y
+CONFIG_GFAR_NAPI=y
+
+#
+# Ethernet (10000 Mbit)
+#
+
+#
+# Token Ring devices
+#
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+CONFIG_GEN_RTC=y
+# CONFIG_GEN_RTC_X is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# TPM devices
+#
+
+#
+# I2C support
+#
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ISA is not set
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PCA_ISA is not set
+
+#
+# Hardware Sensors Chip support
+#
+# CONFIG_I2C_SENSOR is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_FSCPOS is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83627HF is not set
+
+#
+# Other I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_RTC8564 is not set
+# CONFIG_SENSORS_M41T00 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Misc devices
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+# CONFIG_FB is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# InfiniBand support
+#
+# CONFIG_INFINIBAND is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+
+#
+# XFS support
+#
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_SYSFS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_DEVPTS_FS_XATTR is not set
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+# CONFIG_MSDOS_PARTITION is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Hardware crypto devices
+#
diff --git a/arch/ppc/platforms/85xx/Kconfig b/arch/ppc/platforms/85xx/Kconfig
--- a/arch/ppc/platforms/85xx/Kconfig
+++ b/arch/ppc/platforms/85xx/Kconfig
@@ -21,6 +21,11 @@ config MPC8540_ADS
help
This option enables support for the MPC 8540 ADS evaluation board.
+config MPC8548_CDS
+ bool "Freescale MPC8548 CDS"
+ help
+ This option enablese support for the MPC8548 CDS evaluation board.
+
config MPC8555_CDS
bool "Freescale MPC8555 CDS"
help
@@ -51,6 +56,11 @@ endchoice
config MPC8540
bool
depends on MPC8540_ADS
+ default y
+
+config MPC8548
+ bool
+ depends on MPC8548_CDS
default y
config MPC8555
diff --git a/arch/ppc/platforms/85xx/Makefile b/arch/ppc/platforms/85xx/Makefile
--- a/arch/ppc/platforms/85xx/Makefile
+++ b/arch/ppc/platforms/85xx/Makefile
@@ -2,6 +2,7 @@
# Makefile for the PowerPC 85xx linux kernel.
#
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads_common.o mpc8540_ads.o
+obj-$(CONFIG_MPC8548_CDS) += mpc85xx_cds_common.o
obj-$(CONFIG_MPC8555_CDS) += mpc85xx_cds_common.o
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads_common.o mpc8560_ads.o
obj-$(CONFIG_SBC8560) += sbc85xx.o sbc8560.o
diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
--- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
+++ b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
@@ -480,21 +480,47 @@ mpc85xx_cds_setup_arch(void)
/* setup the board related information for the enet controllers */
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
- pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
- pdata->interruptPHY = MPC85xx_IRQ_EXT5;
- pdata->phyid = 0;
- /* fixup phy address */
- pdata->phy_reg_addr += binfo->bi_immr_base;
- memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
+ if (pdata) {
+ pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
+ pdata->interruptPHY = MPC85xx_IRQ_EXT5;
+ pdata->phyid = 0;
+ /* fixup phy address */
+ pdata->phy_reg_addr += binfo->bi_immr_base;
+ memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
+ }
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
- pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
- pdata->interruptPHY = MPC85xx_IRQ_EXT5;
- pdata->phyid = 1;
- /* fixup phy address */
- pdata->phy_reg_addr += binfo->bi_immr_base;
- memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
+ if (pdata) {
+ pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
+ pdata->interruptPHY = MPC85xx_IRQ_EXT5;
+ pdata->phyid = 1;
+ /* fixup phy address */
+ pdata->phy_reg_addr += binfo->bi_immr_base;
+ memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
+ }
+ pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC1);
+ if (pdata) {
+ pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
+ pdata->interruptPHY = MPC85xx_IRQ_EXT5;
+ pdata->phyid = 0;
+ /* fixup phy address */
+ pdata->phy_reg_addr += binfo->bi_immr_base;
+ memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
+ }
+
+ pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC2);
+ if (pdata) {
+ pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
+ pdata->interruptPHY = MPC85xx_IRQ_EXT5;
+ pdata->phyid = 1;
+ /* fixup phy address */
+ pdata->phy_reg_addr += binfo->bi_immr_base;
+ memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
+ }
+
+ ppc_sys_device_remove(MPC85xx_eTSEC3);
+ ppc_sys_device_remove(MPC85xx_eTSEC4);
#ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start)
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
--- a/arch/ppc/syslib/Makefile
+++ b/arch/ppc/syslib/Makefile
@@ -107,6 +107,7 @@ obj-$(CONFIG_83xx) += ipic.o ppc83xx_se
ifeq ($(CONFIG_83xx),y)
obj-$(CONFIG_PCI) += indirect_pci.o pci_auto.o
endif
+obj-$(CONFIG_MPC8548_CDS) += todc_time.o
obj-$(CONFIG_MPC8555_CDS) += todc_time.o
obj-$(CONFIG_PPC_MPC52xx) += mpc52xx_setup.o mpc52xx_pic.o \
mpc52xx_sys.o mpc52xx_devices.o ppc_sys.o
diff --git a/arch/ppc/syslib/ppc85xx_setup.c b/arch/ppc/syslib/ppc85xx_setup.c
--- a/arch/ppc/syslib/ppc85xx_setup.c
+++ b/arch/ppc/syslib/ppc85xx_setup.c
@@ -133,7 +133,7 @@ mpc85xx_halt(void)
#ifdef CONFIG_PCI
-#if defined(CONFIG_MPC8555_CDS)
+#if defined(CONFIG_MPC8555_CDS) || defined(CONFIG_MPC8548_CDS)
extern void mpc85xx_cds_enable_via(struct pci_controller *hose);
extern void mpc85xx_cds_fixup_via(struct pci_controller *hose);
#endif
@@ -308,14 +308,14 @@ mpc85xx_setup_hose(void)
ppc_md.pci_exclude_device = mpc85xx_exclude_device;
-#if defined(CONFIG_MPC8555_CDS)
+#if defined(CONFIG_MPC8555_CDS) || defined(CONFIG_MPC8548_CDS)
/* Pre pciauto_bus_scan VIA init */
mpc85xx_cds_enable_via(hose_a);
#endif
hose_a->last_busno = pciauto_bus_scan(hose_a, hose_a->first_busno);
-#if defined(CONFIG_MPC8555_CDS)
+#if defined(CONFIG_MPC8555_CDS) || defined(CONFIG_MPC8548_CDS)
/* Post pciauto_bus_scan VIA fixup */
mpc85xx_cds_fixup_via(hose_a);
#endif
diff --git a/include/asm-ppc/mpc85xx.h b/include/asm-ppc/mpc85xx.h
--- a/include/asm-ppc/mpc85xx.h
+++ b/include/asm-ppc/mpc85xx.h
@@ -25,7 +25,7 @@
#ifdef CONFIG_MPC8540_ADS
#include <platforms/85xx/mpc8540_ads.h>
#endif
-#ifdef CONFIG_MPC8555_CDS
+#if defined(CONFIG_MPC8555_CDS) || defined(CONFIG_MPC8548_CDS)
#include <platforms/85xx/mpc8555_cds.h>
#endif
#ifdef CONFIG_MPC8560_ADS
^ permalink raw reply
* Re: Complete ccsr map for mpc8540 available?
From: Clemens Koller @ 2005-05-31 16:03 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-embedded
In-Reply-To: <5be2f8f42a2cfaea381a88c5de9cbb4e@freescale.com>
Hello, Kumar!
Yes, I want to add another Local Bus Address Range for our FPGA on
an extra CS line. I've tried to do that in U-Boot as the Code is already there.
But my modified (some old 1.1.2 (not the official release) version) U-Boot
didn't work (I guess compiling issues) and rendered my Board non-bootable, which
was really no fun!
I also want to play around with the bus-timing and GPCM/UPM configurations.
So, changing U-Boot for every little waitstate and re-booting just to get
a register changed is a showstopper for me. (Yes, I know, a BDI2000 would be fun).
So I decided to do all my stuff first in linux in a module to shorten the design
cycle by a factor of 1E+3 which works fine now, as I started this immr_t thingy
for mpc8540 on my own...
Now it seems that u-boot's immap_85xx.h is pretty much what I was looking
for, I will try to merge my stuff with it and get a immap_8540.h out of it.
So, you answered my question indirectly (get back to mainline) that there
is no code available on the linux side yet, right?
I can release my stuff, if anybody is interested... no problem.
The LBC part is verified (some others are dummys and untested) and in
a /works for me/ state.
Thanks and best greets,
Clemens Koller
_______________________________
R&D Imaging Devices
Anagramm GmbH
Rupert-Mayer-Str. 45/1
81379 Muenchen
Germany
http://www.anagramm.de
Phone: +49-89-741518-50
Fax: +49-89-741518-19
>> Hi, There!
>>
>> I want to access the local bus controller (LBC) registers
>> of the mpc8540 from within a module.
>> Therefore I want to use similar structures as for the 8560's cpm2_immr
>> or the 8xx. However, I was not able to find a complete ccsr map for the
>> mpc8540 in the 2.6.11.x kernels. (immap_85xx.h, 8xx_immr.h, ...)
>>
>> Can someone point me to get the memc_brx / orx and friends for mpc8540?
>> (the complete CCSR map.) Or some code to recycle?
>> Or do I need to patch more into immap_85xx.h on my own? I just want to
>> avoid to do duplicate work.
>>
>> Or is it better to extend the fsl_ocp or the platform device structures?
>
>
> What do you plan on doing with the local bus controller in the kernel?
> If this is only configuration of the controller for a given chip select
> that I would suggest doing something similar to how we handle PCI. You
> can probably find a description of the localbus registers in the u-boot
> source tree.
>
> Is this a change you want to get back into the mainline kernel tree?
>
> - kumar
>
^ permalink raw reply
* Re: Complete ccsr map for mpc8540 available?
From: Kumar Gala @ 2005-05-31 16:08 UTC (permalink / raw)
To: Clemens Koller; +Cc: linuxppc-embedded
In-Reply-To: <429C8AC4.9000801@anagramm.de>
On May 31, 2005, at 11:03 AM, Clemens Koller wrote:
> Hello, Kumar!
>
> Yes, I want to add another Local Bus Address Range for our FPGA on
> an extra CS line. I've tried to do that in U-Boot as the Code is
> already there.
> But my modified (some old 1.1.2 (not the official release) version)
> U-Boot
> didn't work (I guess compiling issues) and rendered my Board
> non-bootable, which
> was really no fun!
> I also want to play around with the bus-timing and GPCM/UPM
> configurations.
> So, changing U-Boot for every little waitstate and re-booting just to
> get
> a register changed is a showstopper for me. (Yes, I know, a BDI2000
> would be fun).
> So I decided to do all my stuff first in linux in a module to shorten
> the design
> cycle by a factor of 1E+3 which works fine now, as I started this
> immr_t thingy
> for mpc8540 on my own...
>
> Now it seems that u-boot's immap_85xx.h is pretty much what I was
> looking
> for, I will try to merge my stuff with it and get a immap_8540.h out
> of it.
> So, you answered my question indirectly (get back to mainline) that
> there
> is no code available on the linux side yet, right?
Yes, that was my thinking. You can grab just the lbc bits and put them
in immap_85xx.h and do the same ioremap thing we do for pci in
arch/ppc/syslib/ppc85xx_setup.c.
> I can release my stuff, if anybody is interested... no problem.
> The LBC part is verified (some others are dummys and untested) and in
> a /works for me/ state.
It sounds like this is custom to your board so I wouldn't bother
releasing it out unless it something you want to get into the standard
kernel tree.
- kumar
^ permalink raw reply
* Re: Complete ccsr map for mpc8540 available?
From: Clemens Koller @ 2005-05-31 16:17 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-embedded
In-Reply-To: <bb83727d8d949477f261e00351c091f2@freescale.com>
Hello, Kumar!
> > [...]
> Yes, that was my thinking. You can grab just the lbc bits and put them
> in immap_85xx.h and do the same ioremap thing we do for pci in
> arch/ppc/syslib/ppc85xx_setup.c.
Yes, ioremap() and ioremap_nocache() works fine.
I just try to get the maximum speed out of the Local Bus Mapped dual port
SRAM in our FPGA.
>> I can release my stuff, if anybody is interested... no problem.
>> The LBC part is verified (some others are dummys and untested) and in
>> a /works for me/ state.
>
> It sounds like this is custom to your board so I wouldn't bother
> releasing it out unless it something you want to get into the standard
> kernel tree.
Well, the immr is good for every mpc8540 and the other friends you know.
(more than me)
Greets,
Clemens Koller
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^ permalink raw reply
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