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* Re: kgdb support in Linux 2.6 for 8xx
From: Vitaly Bordug @ 2005-10-21 12:15 UTC (permalink / raw)
  To: Chris; +Cc: linuxppc-embedded list
In-Reply-To: <4358C4AC.2070900@2net.co.uk>

[-- Attachment #1: Type: text/plain, Size: 1068 bytes --]

Hi!
Chris wrote:
> Hi,
> 
> It would be nice to be able to do some kernel debugging on my TQM823L 
> board running 2.6 (2.6.13.1, to be exact). I have two questions
> 
> 1. Has anyone got kgdboe working in this configuration? If so, could you 
> give me a pointer to a patch?
> 
Not exactly. I have implemented support for KGDB on cpm_uart driven 
boards (most of 8xx use it), but it is only tested on 827x family. 
Anyway, 8xx should work with minimal changes.
> 2. kgdb over serial is lacking the getDebugChar and putDebugChar 
> functions that used to be in 8xx_io/uart.c. Has anyone done any work on 
> merging them into 2.6?
> 
There is a kgdb community project - http://kgdb.sf.net. The attached 
patch  is for this one (it has been submitted but not in the CVS so far).
> [OK, that's actually three questions. One just crept in]
> 
> Thanks in advance,
> Chris
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> 
> 


-- 
Sincerely,
Vitaly

[-- Attachment #2: cpm_uart_kgdb.patch --]
[-- Type: text/x-patch, Size: 14395 bytes --]

This add support for KGDB using cpm_uart driver. 
Should work on all the boards utilizing it, tested on 8272ADS.

Index: linux-2.6.13.1/drivers/serial/cpm_uart/Makefile
===================================================================
--- linux-2.6.13.1.orig/drivers/serial/cpm_uart/Makefile
+++ linux-2.6.13.1/drivers/serial/cpm_uart/Makefile
@@ -7,5 +7,6 @@ obj-$(CONFIG_SERIAL_CPM) += cpm_uart.o
 # Select the correct platform objects.
 cpm_uart-objs-$(CONFIG_CPM2)	+= cpm_uart_cpm2.o
 cpm_uart-objs-$(CONFIG_8xx)	+= cpm_uart_cpm1.o
+cpm_uart-objs-$(CONFIG_KGDB)	+= cpm_uart_kgdb.o
 
 cpm_uart-objs	:= cpm_uart_core.o $(cpm_uart-objs-y)
Index: linux-2.6.13.1/drivers/serial/cpm_uart/cpm_uart.h
===================================================================
--- linux-2.6.13.1.orig/drivers/serial/cpm_uart/cpm_uart.h
+++ linux-2.6.13.1/drivers/serial/cpm_uart/cpm_uart.h
@@ -42,6 +42,38 @@
 
 #define SCC_WAIT_CLOSING 100
 
+#ifdef CONFIG_KGDB
+
+/* Speed of the debug UART. */
+#if defined(CONFIG_KGDB_9600BAUD)
+#define KGDB_BAUD B9600
+#elif defined(CONFIG_KGDB_19200BAUD)
+#define KGDB_BAUD B19200
+#elif defined(CONFIG_KGDB_38400BAUD)
+#define KGDB_BAUD B38400
+#elif defined(CONFIG_KGDB_57600BAUD)
+#define KGDB_BAUD B57600
+#else
+#define KGDB_BAUD B115200	/* Start with this if not given */
+#endif
+
+#ifdef CONFIG_KGDB_CPM_UART_SCC1
+#define KGDB_PINFO_INDEX 	UART_SCC1
+#elif CONFIG_KGDB_CPM_UART_SCC2
+#define KGDB_PINFO_INDEX	UART_SCC2
+#elif CONFIG_KGDB_CPM_UART_SCC3
+#define KGDB_PINFO_INDEX	UART_SCC3
+#elif CONFIG_KGDB_CPM_UART_SCC4
+#define KGDB_PINFO_INDEX	UART_SCC4
+#elif CONFIG_KGDB_CPM_UART_SMC1
+#define KGDB_PINFO_INDEX	UART_SMC1
+#elif CONFIG_KGDB_CPM_UART_SMC2
+#define KGDB_PINFO_INDEX	UART_SMC2
+#error The S(M)CC for kgdb console is undefined
+#endif
+
+#endif /* CONFIG_KGDB */
+
 struct uart_cpm_port {
 	struct uart_port	port;
 	u16			rx_nrfifos;
@@ -77,6 +109,9 @@ extern int cpm_uart_port_map[UART_NR];
 extern int cpm_uart_nr;
 extern struct uart_cpm_port cpm_uart_ports[UART_NR];
 
+void cpm_uart_early_write(int index, const char *s, u_int count);
+int cpm_uart_early_setup(int index,int early);
+
 /* these are located in their respective files */
 void cpm_line_cr_cmd(int line, int cmd);
 int cpm_uart_init_portdesc(void);
@@ -90,4 +125,19 @@ void scc2_lineif(struct uart_cpm_port *p
 void scc3_lineif(struct uart_cpm_port *pinfo);
 void scc4_lineif(struct uart_cpm_port *pinfo);
 
+static inline unsigned long cpu2cpm_addr(void *addr)
+{
+	if ((unsigned long)addr >= CPM_ADDR)
+		return (unsigned long)addr;
+	return virt_to_bus(addr);
+}
+
+static inline void *cpm2cpu_addr(unsigned long addr)
+{
+	if (addr >= CPM_ADDR)
+		return (void *)addr;
+	return bus_to_virt(addr);
+}
+
+
 #endif /* CPM_UART_H */
Index: linux-2.6.13.1/drivers/serial/cpm_uart/cpm_uart_core.c
===================================================================
--- linux-2.6.13.1.orig/drivers/serial/cpm_uart/cpm_uart_core.c
+++ linux-2.6.13.1/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -71,20 +71,6 @@ static void cpm_uart_initbd(struct uart_
 
 /**************************************************************/
 
-static inline unsigned long cpu2cpm_addr(void *addr)
-{
-	if ((unsigned long)addr >= CPM_ADDR)
-		return (unsigned long)addr;
-	return virt_to_bus(addr);
-}
-
-static inline void *cpm2cpu_addr(unsigned long addr)
-{
-	if (addr >= CPM_ADDR)
-		return (void *)addr;
-	return bus_to_virt(addr);
-}
-
 /*
  * Check, if transmit buffers are processed
 */
@@ -992,22 +978,17 @@ struct uart_cpm_port cpm_uart_ports[UART
 	},
 };
 
-#ifdef CONFIG_SERIAL_CPM_CONSOLE
-/*
- *	Print a string to the serial port trying not to disturb
- *	any possible real use of the port...
- *
- *	Note that this is called with interrupts already disabled
- */
-static void cpm_uart_console_write(struct console *co, const char *s,
+void cpm_uart_early_write(int index, const char *s,
 				   u_int count)
 {
-	struct uart_cpm_port *pinfo =
-	    &cpm_uart_ports[cpm_uart_port_map[co->index]];
+	struct uart_cpm_port *pinfo;
 	unsigned int i;
 	volatile cbd_t *bdp, *bdbase;
 	volatile unsigned char *cp;
 
+	BUG_ON(index>UART_NR);
+	pinfo = &cpm_uart_ports[index];
+
 	/* Get the address of the host memory buffer.
 	 */
 	bdp = pinfo->tx_cur;
@@ -1071,36 +1052,16 @@ static void cpm_uart_console_write(struc
 	pinfo->tx_cur = (volatile cbd_t *) bdp;
 }
 
-/*
- * Setup console. Be careful is called early !
- */
-static int __init cpm_uart_console_setup(struct console *co, char *options)
+int cpm_uart_early_setup(int index, int early)
 {
+	int ret;
 	struct uart_port *port;
 	struct uart_cpm_port *pinfo;
-	int baud = 38400;
-	int bits = 8;
-	int parity = 'n';
-	int flow = 'n';
-	int ret;
 
+	BUG_ON(index>UART_NR);
 	port =
-	    (struct uart_port *)&cpm_uart_ports[cpm_uart_port_map[co->index]];
+	    (struct uart_port *)&cpm_uart_ports[index];
 	pinfo = (struct uart_cpm_port *)port;
-
-	pinfo->flags |= FLAG_CONSOLE;
-
-	if (options) {
-		uart_parse_options(options, &baud, &parity, &bits, &flow);
-	} else {
-		bd_t *bd = (bd_t *) __res;
-
-		if (bd->bi_baudrate)
-			baud = bd->bi_baudrate;
-		else
-			baud = 9600;
-	}
-
 	/*
 	 * Setup any port IO, connect any baud rate generators,
 	 * etc.  This is expected to be handled by board
@@ -1108,7 +1069,6 @@ static int __init cpm_uart_console_setup
 	 */
 	if (pinfo->set_lineif)
 		pinfo->set_lineif(pinfo);
-
 	if (IS_SMC(pinfo)) {
 		pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
 		pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
@@ -1116,8 +1076,7 @@ static int __init cpm_uart_console_setup
 		pinfo->sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
 		pinfo->sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 	}
-
-	ret = cpm_uart_allocbuf(pinfo, 1);
+	ret = cpm_uart_allocbuf(pinfo, early);
 
 	if (ret)
 		return ret;
@@ -1129,6 +1088,56 @@ static int __init cpm_uart_console_setup
 	else
 		cpm_uart_init_scc(pinfo);
 
+	return 0;
+}
+
+#ifdef CONFIG_SERIAL_CPM_CONSOLE
+/*
+ *	Print a string to the serial port trying not to disturb
+ *	any possible real use of the port...
+ *
+ *	Note that this is called with interrupts already disabled
+ */
+
+static void cpm_uart_console_write(struct console *co, const char *s,
+				   u_int count)
+{
+	cpm_uart_early_write(cpm_uart_port_map[co->index],s,count);
+}
+
+/*
+ * Setup console. Be careful is called early !
+ */
+static int __init cpm_uart_console_setup(struct console *co, char *options)
+{
+	struct uart_port *port;
+	struct uart_cpm_port *pinfo;
+	int baud = 115200;
+	int bits = 8;
+	int parity = 'n';
+	int flow = 'n';
+	int ret;
+
+	port =
+	    (struct uart_port *)&cpm_uart_ports[cpm_uart_port_map[co->index]];
+	pinfo = (struct uart_cpm_port *)port;
+
+	pinfo->flags |= FLAG_CONSOLE;
+
+	if (options) {
+		uart_parse_options(options, &baud, &parity, &bits, &flow);
+	} else {
+		bd_t *bd = (bd_t *) __res;
+
+		if (bd->bi_baudrate)
+			baud = bd->bi_baudrate;
+		else
+			baud = 9600;
+	}
+
+	ret = cpm_uart_early_setup(cpm_uart_port_map[co->index], 1);
+	if(ret)
+		return ret;
 	uart_set_options(port, co, baud, parity, bits, flow);
 
 	return 0;
@@ -1190,6 +1199,10 @@ static int __init cpm_uart_init(void)
 
 	for (i = 0; i < cpm_uart_nr; i++) {
 		int con = cpm_uart_port_map[i];
+
+		/* We are not interested in ports yet utilized by kgdb */
+		if(con == KGDB_PINFO_INDEX)
+			continue;
 		cpm_uart_ports[con].port.line = i;
 		cpm_uart_ports[con].port.flags = UPF_BOOT_AUTOCONF;
 		uart_add_one_port(&cpm_reg, &cpm_uart_ports[con].port);
Index: linux-2.6.13.1/drivers/serial/cpm_uart/cpm_uart_cpm2.c
===================================================================
--- linux-2.6.13.1.orig/drivers/serial/cpm_uart/cpm_uart_cpm2.c
+++ linux-2.6.13.1/drivers/serial/cpm_uart/cpm_uart_cpm2.c
@@ -252,6 +252,10 @@ int cpm_uart_init_portdesc(void)
 {
 	pr_debug("CPM uart[-]:init portdesc\n");
 
+	/* Check if we have called this yet. This may happen if early kgdb
+	breakpoint is on */
+	if(cpm_uart_nr)
+		return 0;
 	cpm_uart_nr = 0;
 #ifdef CONFIG_SERIAL_CPM_SMC1
 	cpm_uart_ports[UART_SMC1].smcp = (smc_t *) & cpm2_immr->im_smc[0];
Index: linux-2.6.13.1/lib/Kconfig.debug
===================================================================
--- linux-2.6.13.1.orig/lib/Kconfig.debug
+++ linux-2.6.13.1/lib/Kconfig.debug
@@ -196,6 +196,7 @@ choice
 	default KGDB_8250_NOMODULE
 	default KGDB_SIBYTE if SIBYTE_SB1xxx_SOC
 	default KGDB_MPSC if SERIAL_MPSC
+	default KGDB_CPM_UART if (8xx || 8260)
 	help
 	  There are a number of different ways in which you can communicate
 	  with KGDB.  The most common is via serial, with the 8250 driver
@@ -221,6 +222,11 @@ config KGDB_8250_NOMODULE
 	  GDB.  This is independent of the normal (SERIAL_8250) driver
 	  for this chipset.
 
+config KGDB_CPM_UART
+ 	bool "KGDB: On CPM UART"
+ 	help
+ 	  Uses CPM UART to communicate with the host GDB.
+
 config KGDBOE_NOMODULE
 	bool "KGDB: On ethernet - in kernel"
 	select KGDBOE
@@ -247,6 +253,62 @@ config KGDB_SIBYTE
 
 endchoice
 
+choice
+ 	prompt "  SCC/SMC for KGDB console"
+ 	depends on KGDB_CPM_UART
+ 	default KGDB_CPM_UART_SCC4 if ADS8272
+
+config KGDB_CPM_UART_SCC1
+ 	bool "Use SCC1 for KGDB"
+ 	depends on SERIAL_CPM_SCC1
+
+config KGDB_CPM_UART_SCC2
+ 	bool "Use SCC2 for KGDB"
+ 	depends on SERIAL_CPM_SCC2
+
+config KGDB_CPM_UART_SCC3
+ 	bool "Use SCC3 for KGDB"
+ 	depends on SERIAL_CPM_SCC3
+
+config KGDB_CPM_UART_SCC4
+ 	bool "Use SCC4 for KGDB"
+ 	depends on SERIAL_CPM_SCC4
+
+config KGDB_CPM_UART_SMC1
+ 	bool "Use SMC1 for KGDB"
+ 	depends on SERIAL_CPM_SMC1
+
+config KGDB_CPM_UART_SMC2
+ 	bool "Use SMC2 for KGDB"
+ 	depends on SERIAL_CPM_SMC2
+
+endchoice
+
+choice
+	depends on KGDB && !KGDB_ETH
+    	prompt "Debug serial port BAUD"
+	default KGDB_115200BAUD
+	help
+	  gdb and the kernel stub need to agree on the baud rate to be
+	  used.  Standard rates from 9600 to 115200 are allowed, and this
+	  may be overridden via the commandline.
+
+config KGDB_9600BAUD
+	bool "9600"
+
+config KGDB_19200BAUD
+	bool "19200"
+
+config KGDB_38400BAUD
+	bool "38400"
+
+config KGDB_57600BAUD
+	bool "57600"
+
+config KGDB_115200BAUD
+	bool "115200"
+endchoice
+
 config KGDBOE
 	tristate "KGDB: On ethernet" if !KGDBOE_NOMODULE
 	depends on m && KGDB_ONLY_MODULES
Index: linux-2.6.13.1/drivers/serial/cpm_uart/cpm_uart_kgdb.c
===================================================================
--- /dev/null
+++ linux-2.6.13.1/drivers/serial/cpm_uart/cpm_uart_kgdb.c
@@ -0,0 +1,191 @@
+/*
+ * drivers/serial/cpm_uart/cpm_uart_kgdb.c
+ *
+ * CPM UART interface for kgdb.
+ *
+ * Author: Vitaly Bordug <vbordug@ru.mvista.com>
+ *
+ * Used some bits from drivers/serial/kgdb_8250.c as a template
+ *
+ * 2005 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#include <linux/kgdb.h>
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/tty.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+#include <linux/serial_reg.h>
+
+#include <asm/io.h>
+#include <asm/serial.h>		/* For BASE_BAUD and SERIAL_PORT_DFNS */
+
+#include "cpm_uart.h"
+
+#define GDB_BUF_SIZE	512	/* power of 2, please */
+
+
+static char kgdb_buf[GDB_BUF_SIZE], *kgdbp;
+static int kgdb_chars;
+
+/* Forward declarations. */
+
+/*
+ * Receive character from the serial port.  This only works well
+ * before the port is initialize for real use.
+ */
+static int kgdb_wait_key(char *obuf)
+{
+	struct uart_cpm_port *pinfo;
+
+	u_char				c, *cp;
+	volatile	cbd_t		*bdp;
+	int				i;
+
+	pinfo = &cpm_uart_ports[KGDB_PINFO_INDEX];
+
+	/* Get the address of the host memory buffer.
+	 */
+	bdp = pinfo->rx_cur;
+	while (bdp->cbd_sc & BD_SC_EMPTY);
+
+	/* If the buffer address is in the CPM DPRAM, don't
+	 * convert it.
+	 */
+	cp = cpm2cpu_addr(bdp->cbd_bufaddr);
+
+	if (obuf) {
+		i = c = bdp->cbd_datlen;
+		while (i-- > 0)
+		{
+			*obuf++ = *cp++;
+		}
+	} else {
+		c = *cp;
+	}
+	bdp->cbd_sc |= BD_SC_EMPTY;
+
+	if (bdp->cbd_sc & BD_SC_WRAP) {
+		bdp = pinfo->rx_bd_base;
+	} else {
+		bdp++;
+	}
+	pinfo->rx_cur = (cbd_t *)bdp;
+
+	return((int)c);
+}
+
+
+/*
+ * Wait until the interface can accept a char, then write it.
+ */
+static void
+kgdb_put_debug_char(int chr)
+{
+	static char ch[2];
+	ch[0]=(char)chr;
+	cpm_uart_early_write(KGDB_PINFO_INDEX, ch, 1);
+}
+
+
+/*
+ * Get a char if available, return -1 if nothing available.
+ * Empty the receive buffer first, then look at the interface hardware.
+ */
+static int
+kgdb_get_debug_char(void)
+{
+	if (kgdb_chars<=0) {
+		kgdb_chars = kgdb_wait_key(kgdb_buf);
+		kgdbp = kgdb_buf;
+	}
+	kgdb_chars--;
+
+	return (*kgdbp++);
+}
+
+static void termios_set_options(int index,
+		 int baud, int parity, int bits, int flow)
+{
+	struct termios termios;
+	struct uart_port *port;
+	struct uart_cpm_port *pinfo;
+
+	BUG_ON(index>UART_NR);
+
+	port =
+	    (struct uart_port *)&cpm_uart_ports[index];
+	pinfo = (struct uart_cpm_port *)port;
+
+	/*
+	 * Ensure that the serial console lock is initialised
+	 * early.
+	 */
+	spin_lock_init(&port->lock);
+
+	memset(&termios, 0, sizeof(struct termios));
+
+	termios.c_cflag = CREAD | HUPCL | CLOCAL;
+
+	termios.c_cflag |= baud;
+
+	if (bits == 7)
+		termios.c_cflag |= CS7;
+	else
+		termios.c_cflag |= CS8;
+
+	switch (parity) {
+	case 'o': case 'O':
+		termios.c_cflag |= PARODD;
+		/*fall through*/
+	case 'e': case 'E':
+		termios.c_cflag |= PARENB;
+		break;
+	}
+
+	if (flow == 'r')
+		termios.c_cflag |= CRTSCTS;
+
+	port->ops->set_termios(port, &termios, NULL);
+}
+
+/*
+ *  Returns:
+ *	0 on success, 1 on failure.
+ */
+static int kgdb_init(void)
+{
+	struct uart_port *port;
+	struct uart_cpm_port *pinfo;
+
+	int use_bootmem = 0; /* use dma by default */
+
+	if(!cpm_uart_nr)
+	{
+		use_bootmem = 1;
+		cpm_uart_init_portdesc();
+	}
+	port = (struct uart_port *)&cpm_uart_ports[KGDB_PINFO_INDEX];
+	pinfo = (struct uart_cpm_port *)port;
+
+	if (cpm_uart_early_setup(KGDB_PINFO_INDEX, use_bootmem))
+		return 1;
+
+	termios_set_options(KGDB_PINFO_INDEX, KGDB_BAUD,'n',8,'n');
+	pinfo->sccp->scc_sccm |= UART_SCCM_TX;
+	return 0;
+}
+
+
+struct kgdb_io kgdb_io_ops = {
+	.read_char = kgdb_get_debug_char,
+	.write_char = kgdb_put_debug_char,
+	.init = kgdb_init,
+};
+

^ permalink raw reply

* Three-Speed Ethernet support on MPC8560 (TSEC)
From: Nathael PAJANI @ 2005-10-21 12:21 UTC (permalink / raw)
  To: linuxppc-embedded

Hi all!

I'm working on a port of linux (2.6.13-2) on an Actis-computer board, 
based on the Freescale MPC8560 Processor.

I solved the problems I had with the init process, and I actually have 
the console (SCC1) and one ethernet controler (FCC3) running.

I will now go on with the Three-Speed Ethernet Controler, and there 
actually seem to be no support for it, but maybe I did not look at the 
right place?

I got another question, about the FCC driver: it uses a "big" structure 
"fcc_enet_t" wich seems to be aimed at stats. This is initialised, but I 
did not find where this is used. Is it?

Thanks.

^ permalink raw reply

* Re: [PATCH][RFT] please use this one
From: Rupert Eibauer @ 2005-10-21 12:42 UTC (permalink / raw)
  To: linuxppc-dev
In-Reply-To: <200510211417.49651.rupert@ces.ch>

Hello,

Please try this one. The first one contained a last-second
fix which I didn't test if it compiles.

Regards,
Rupert

diff -urN linux-2.6.13.3.orig/arch/ppc/Kconfig linux-2.6.13.3/arch/ppc/Kconfig
--- linux-2.6.13.3.orig/arch/ppc/Kconfig	Fri Oct 21 05:42:59 2005
+++ linux-2.6.13.3/arch/ppc/Kconfig	Fri Oct 21 05:53:49 2005
@@ -115,14 +115,28 @@
 	default y if E500 && PHYS_64BIT
 
 config PHYS_64BIT
-	bool 'Large physical address support' if E500
-	depends on 44x || E500
+	bool 'Large physical address support' if E500 || 6xx
+	depends on 44x || E500 || 6xx
 	default y if 44x
 	---help---
 	  This option enables kernel support for larger than 32-bit physical
 	  addresses.  This features is not be available on all e500 cores.
 
 	  If in doubt, say N here.
+
+config PPC_LARGE_BATS
+	bool 'Extended BAT Block Bize Support' if 6xx
+	depends on 6xx
+	---help---
+	 This option enables kernel support for large BAT
+	 addressing mode, which is present on some 7450 chips.
+
+config PPC_HIGH_BATS
+	bool 'High BAT Support' if 6xx
+	depends on 6xx
+	---help---
+	 This option enables kernel support for the 4 additional
+	 BATS, which is present on some 7450 chips.
 
 config ALTIVEC
 	bool "AltiVec Support"
diff -urN linux-2.6.13.3.orig/arch/ppc/kernel/cpu_setup_6xx.S linux-2.6.13.3/arch/ppc/kernel/cpu_setup_6xx.S
--- linux-2.6.13.3.orig/arch/ppc/kernel/cpu_setup_6xx.S	Fri Oct 21 05:49:53 2005
+++ linux-2.6.13.3/arch/ppc/kernel/cpu_setup_6xx.S	Fri Oct 21 05:53:49 2005
@@ -229,13 +229,19 @@
 	 */
 	ori	r11,r11,HID0_SGE | HID0_FOLD | HID0_BHTE
 	ori	r11,r11,HID0_LRSTK | HID0_BTIC
-	oris	r11,r11,HID0_DPM@h
+	oris	r11,r11,(HID0_DPM | HID0_XAEN)@h
 BEGIN_FTR_SECTION
 	xori	r11,r11,HID0_BTIC
 END_FTR_SECTION_IFSET(CPU_FTR_NO_BTIC)
 BEGIN_FTR_SECTION
 	xoris	r11,r11,HID0_DPM@h	/* disable dynamic power mgmt */
 END_FTR_SECTION_IFSET(CPU_FTR_NO_DPM)
+BEGIN_FTR_SECTION
+	xoris	r11,r11,HID0_XAEN@h
+END_FTR_SECTION_IFCLR(CPU_FTR_BIG_PHYS)
+BEGIN_FTR_SECTION
+	ori	r11,r11,HID0_XBSEN
+END_FTR_SECTION_IFSET(CPU_FTR_LARGE_BATS)
 
 	/* All of the bits we have to clear....
 	 */
diff -urN linux-2.6.13.3.orig/arch/ppc/kernel/cputable.c linux-2.6.13.3/arch/ppc/kernel/cputable.c
--- linux-2.6.13.3.orig/arch/ppc/kernel/cputable.c	Fri Oct 21 05:49:53 2005
+++ linux-2.6.13.3/arch/ppc/kernel/cputable.c	Fri Oct 21 05:53:49 2005
@@ -62,6 +62,18 @@
 #define PPC_FEATURE_SPE_COMP       	0
 #endif
 
+#ifdef CONFIG_PPC_LARGE_BATS
+#define CPU_FTR_LARGE_BATS_COMP		CPU_FTR_LARGE_BATS
+#else
+#define CPU_FTR_LARGE_BATS_COMP		0
+#endif
+
+#ifndef CONFIG_PHYS_64BIT
+#define CPU_FTR_BIG_PHYS_COMP		CPU_FTR_BIG_PHYS
+#else
+#define CPU_FTR_BIG_PHYS_COMP		0
+#endif
+
 /* We need to mark all pages as being coherent if we're SMP or we
  * have a 74[45]x and an MPC107 host bridge.
  */
@@ -428,6 +440,7 @@
 			CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
 			CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
 			CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
+			CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
 			CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
 		.cpu_user_features	= COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 		.icache_bsize		= 32,
@@ -445,6 +458,7 @@
 			CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
 			CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
 			CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP |
+			CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
 			CPU_FTR_NEED_COHERENT | CPU_FTR_HAS_HIGH_BATS,
 		.cpu_user_features	= COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 		.icache_bsize		= 32,
@@ -462,6 +476,7 @@
 			CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
 			CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
 			CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
+			CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
 			CPU_FTR_NEED_COHERENT,
 		.cpu_user_features	= COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 		.icache_bsize		= 32,
@@ -478,6 +493,7 @@
 			CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
 			CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
 			CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
+			CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
 			CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
 			CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC,
 		.cpu_user_features	= COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
@@ -496,6 +512,7 @@
 			CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
 			CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
 			CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
+			CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
 			CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC,
 		.cpu_user_features	= COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 		.icache_bsize		= 32,
@@ -513,6 +530,7 @@
 			CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
 			CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
 			CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
+			CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
 			CPU_FTR_NEED_COHERENT,
 		.cpu_user_features	= COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 		.icache_bsize		= 32,
@@ -529,6 +547,7 @@
 			CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
 			CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
 			CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
+			CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
 			CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
 		.cpu_user_features	= COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 		.icache_bsize		= 32,
diff -urN linux-2.6.13.3.orig/arch/ppc/kernel/head.S linux-2.6.13.3/arch/ppc/kernel/head.S
--- linux-2.6.13.3.orig/arch/ppc/kernel/head.S	Fri Oct 21 05:49:53 2005
+++ linux-2.6.13.3/arch/ppc/kernel/head.S	Fri Oct 21 05:53:49 2005
@@ -1165,6 +1165,14 @@
 	LOAD_BAT(1,r3,r4,r5)
 	LOAD_BAT(2,r3,r4,r5)
 	LOAD_BAT(3,r3,r4,r5)
+#ifdef CONFIG_PPC_HIGH_BATS
+BEGIN_FTR_SECTION
+	LOAD_BAT(4,r3,r4,r5)
+	LOAD_BAT(5,r3,r4,r5)
+	LOAD_BAT(6,r3,r4,r5)
+	LOAD_BAT(7,r3,r4,r5)
+END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS)
+#endif /* CONFIG_PPC_HIGH_BATS */
 #endif /* CONFIG_POWER4 */
 	blr
 
diff -urN linux-2.6.13.3.orig/arch/ppc/mm/pgtable.c linux-2.6.13.3/arch/ppc/mm/pgtable.c
--- linux-2.6.13.3.orig/arch/ppc/mm/pgtable.c	Fri Oct 21 05:49:53 2005
+++ linux-2.6.13.3/arch/ppc/mm/pgtable.c	Fri Oct 21 05:53:49 2005
@@ -55,8 +55,8 @@
 
 #ifdef HAVE_BATS
 extern unsigned long v_mapped_by_bats(unsigned long va);
-extern unsigned long p_mapped_by_bats(unsigned long pa);
-void setbat(int index, unsigned long virt, unsigned long phys,
+extern unsigned long p_mapped_by_bats(phys_addr_t pa);
+void setbat(int index, unsigned long virt, phys_addr_t phys,
 	    unsigned int size, int flags);
 
 #else /* !HAVE_BATS */
@@ -339,7 +339,7 @@
 	/*
 	 * Use a BAT for this if possible...
 	 */
-	if (io_bat_index < 2 && is_power_of_2(size)
+	if (io_bat_index < (ppc_bat_count() - 2) && is_power_of_2(size)
 	    && (virt & (size - 1)) == 0 && (phys & (size - 1)) == 0) {
 		setbat(io_bat_index, virt, phys, size, flags);
 		++io_bat_index;
diff -urN linux-2.6.13.3.orig/arch/ppc/mm/ppc_mmu.c linux-2.6.13.3/arch/ppc/mm/ppc_mmu.c
--- linux-2.6.13.3.orig/arch/ppc/mm/ppc_mmu.c	Fri Oct 21 05:49:53 2005
+++ linux-2.6.13.3/arch/ppc/mm/ppc_mmu.c	Fri Oct 21 05:53:49 2005
@@ -36,6 +36,7 @@
 #include "mmu_decl.h"
 #include "mem_pieces.h"
 
+
 PTE *Hash, *Hash_end;
 unsigned long Hash_size, Hash_mask;
 unsigned long _SDR1;
@@ -47,13 +48,13 @@
 #else
 	u32	word[2];
 #endif
-} BATS[4][2];			/* 4 pairs of IBAT, DBAT */
+} BATS[PPC_BAT_COUNT][2];			/* 4 pairs of IBAT, DBAT */
 
 struct batrange {		/* stores address ranges mapped by BATs */
 	unsigned long start;
 	unsigned long limit;
-	unsigned long phys;
-} bat_addrs[4];
+	phys_addr_t phys;
+} bat_addrs[PPC_BAT_COUNT];
 
 /*
  * Return PA for this VA if it is mapped by a BAT, or 0
@@ -61,7 +62,7 @@
 unsigned long v_mapped_by_bats(unsigned long va)
 {
 	int b;
-	for (b = 0; b < 4; ++b)
+	for (b = 0; b < PPC_BAT_COUNT; ++b)
 		if (va >= bat_addrs[b].start && va < bat_addrs[b].limit)
 			return bat_addrs[b].phys + (va - bat_addrs[b].start);
 	return 0;
@@ -70,10 +71,10 @@
 /*
  * Return VA for a given PA or 0 if not mapped
  */
-unsigned long p_mapped_by_bats(unsigned long pa)
+unsigned long p_mapped_by_bats(phys_addr_t pa)
 {
 	int b;
-	for (b = 0; b < 4; ++b)
+	for (b = 0; b < PPC_BAT_COUNT; ++b)
 		if (pa >= bat_addrs[b].phys
 	    	    && pa < (bat_addrs[b].limit-bat_addrs[b].start)
 		              +bat_addrs[b].phys)
@@ -87,13 +88,14 @@
 	return 0;
 #else
 	unsigned long tot, bl, done;
-	unsigned long max_size = (256<<20);
+	unsigned long max_size = max_bat_size();
 	unsigned long align;
+	int bat_nbr = ppc_bat_count() - 2;
 
 	if (__map_without_bats)
 		return 0;
 
-	/* Set up BAT2 and if necessary BAT3 to cover RAM. */
+	/* Set up BAT[2|6] and if necessary BAT[3|7] to cover RAM. */
 
 	/* Make sure we don't map a block larger than the
 	   smallest alignment of the physical address. */
@@ -109,16 +111,17 @@
 			break;
 	}
 
-	setbat(2, KERNELBASE, PPC_MEMSTART, bl, _PAGE_RAM);
-	done = (unsigned long)bat_addrs[2].limit - KERNELBASE + 1;
-	if ((done < tot) && !bat_addrs[3].limit) {
-		/* use BAT3 to cover a bit more */
+	setbat(bat_nbr, KERNELBASE, PPC_MEMSTART, bl, _PAGE_RAM);
+	done = (unsigned long)bat_addrs[bat_nbr].limit - KERNELBASE + 1;
+	bat_nbr++;
+	if ((done < tot) && !bat_addrs[bat_nbr].limit) {
+		/* use BAT[3|7] to cover a bit more */
 		tot -= done;
 		for (bl = 128<<10; bl < max_size; bl <<= 1)
 			if (bl * 2 > tot)
 				break;
-		setbat(3, KERNELBASE+done, PPC_MEMSTART+done, bl, _PAGE_RAM);
-		done = (unsigned long)bat_addrs[3].limit - KERNELBASE + 1;
+		setbat(bat_nbr, KERNELBASE+done, PPC_MEMSTART+done, bl, _PAGE_RAM);
+		done = (unsigned long)bat_addrs[bat_nbr].limit - KERNELBASE + 1;
 	}
 
 	return done;
@@ -130,7 +133,7 @@
  * The parameters are not checked; in particular size must be a power
  * of 2 between 128k and 256M.
  */
-void __init setbat(int index, unsigned long virt, unsigned long phys,
+void __init setbat(int index, unsigned long virt, phys_addr_t phys,
 		   unsigned int size, int flags)
 {
 	unsigned int bl;
@@ -148,6 +151,9 @@
 		wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE
 				   | _PAGE_COHERENT | _PAGE_GUARDED);
 		wimgxpp |= (flags & _PAGE_RW)? BPP_RW: BPP_RX;
+#ifdef CONFIG_PHYS_64BIT
+		wimgxpp |= ((phys >> 30) & 4) | ((phys >> 24) & 0xe00);
+#endif
 		bat[1].word[0] = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */
 		bat[1].word[1] = phys | wimgxpp;
 #ifndef CONFIG_KGDB /* want user access for breakpoints */
diff -urN linux-2.6.13.3.orig/include/asm-ppc/cputable.h linux-2.6.13.3/include/asm-ppc/cputable.h
--- linux-2.6.13.3.orig/include/asm-ppc/cputable.h	Thu Jun 30 01:00:53 2005
+++ linux-2.6.13.3/include/asm-ppc/cputable.h	Fri Oct 21 05:53:49 2005
@@ -89,6 +89,7 @@
 #define CPU_FTR_NEED_COHERENT		0x00020000
 #define CPU_FTR_NO_BTIC			0x00040000
 #define CPU_FTR_BIG_PHYS		0x00080000
+#define CPU_FTR_LARGE_BATS		0x00100000
 
 #ifdef __ASSEMBLY__
 
diff -urN linux-2.6.13.3.orig/include/asm-ppc/mmu.h linux-2.6.13.3/include/asm-ppc/mmu.h
--- linux-2.6.13.3.orig/include/asm-ppc/mmu.h	Fri Oct 21 05:44:49 2005
+++ linux-2.6.13.3/include/asm-ppc/mmu.h	Fri Oct 21 05:53:49 2005
@@ -18,11 +18,30 @@
 #ifndef CONFIG_PHYS_64BIT
 typedef unsigned long phys_addr_t;
 #define PHYS_FMT	"%.8lx"
+#define cpu_has_bigphys() 0
 #else
 typedef unsigned long long phys_addr_t;
 extern phys_addr_t fixup_bigphys_addr(phys_addr_t, phys_addr_t);
 #define PHYS_FMT	"%16Lx"
+#define cpu_has_bigphys() cpu_has_feature(CPU_FTR_BIG_PHYS)
 #endif
+
+#ifdef CONFIG_PPC_LARGE_BATS
+/* We don't allow 4G Bat's because it doesn't fit into size_t */
+#define max_bat_size() (cpu_has_feature(CPU_FTR_LARGE_BATS)?(2<<30):(256<<20))
+#else
+#define max_bat_size() (256<<20)
+#endif
+
+/* High BAT support */
+#ifdef CONFIG_PPC_HIGH_BATS
+#define PPC_BAT_COUNT 8
+#define ppc_bat_count() (cpu_has_feature(CPU_FTR_HAS_HIGH_BATS)?8:4)
+#else
+#define PPC_BAT_COUNT 4
+#define ppc_bat_count() (4)
+#endif
+
 
 /* Default "unsigned long" context */
 typedef unsigned long mm_context_t;

^ permalink raw reply

* [PATCH][RFT] Make PPC7450Features useable
From: Rupert Eibauer @ 2005-10-21 12:17 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: rupert

(Please CC to me, I am not subscribed)

Hello,

This patch makes 3 of the 7450 features useable. These are:

- High BAT (BATs 4-7)
- Extended BAT Block Size (In this mode a BAT can cover
  up to 4GB)
- 36-Bit Physical addressing with BATs

I was able to test the High BAT and the 36-Bit addressing on a
7447A, for the large BAT, I don't have enough memory. Maybe somebody
with at least 512 MB of memory should test it.

I don't have much experience in submitting, kernel patches, so
if there is anything wrong with my patch, please point it out.

However, I did not manage to adjust the page tables to do the
same trick (36-Bit Addressing). The page tables seem a lot more
magic to me.

Here is the patch:

diff -urN linux-2.6.13.3.orig/arch/ppc/Kconfig linux-2.6.13.3/arch/ppc/Kconfig
--- linux-2.6.13.3.orig/arch/ppc/Kconfig	Fri Oct 21 05:42:59 2005
+++ linux-2.6.13.3/arch/ppc/Kconfig	Fri Oct 21 05:53:49 2005
@@ -115,14 +115,28 @@
 	default y if E500 && PHYS_64BIT
 
 config PHYS_64BIT
-	bool 'Large physical address support' if E500
-	depends on 44x || E500
+	bool 'Large physical address support' if E500 || 6xx
+	depends on 44x || E500 || 6xx
 	default y if 44x
 	---help---
 	  This option enables kernel support for larger than 32-bit physical
 	  addresses.  This features is not be available on all e500 cores.
 
 	  If in doubt, say N here.
+
+config PPC_LARGE_BATS
+	bool 'Extended BAT Block Bize Support' if 6xx
+	depends on 6xx
+	---help---
+	 This option enables kernel support for large BAT
+	 addressing mode, which is present on some 7450 chips.
+
+config PPC_HIGH_BATS
+	bool 'High BAT Support' if 6xx
+	depends on 6xx
+	---help---
+	 This option enables kernel support for the 4 additional
+	 BATS, which is present on some 7450 chips.
 
 config ALTIVEC
 	bool "AltiVec Support"
diff -urN linux-2.6.13.3.orig/arch/ppc/kernel/cpu_setup_6xx.S linux-2.6.13.3/arch/ppc/kernel/cpu_setup_6xx.S
--- linux-2.6.13.3.orig/arch/ppc/kernel/cpu_setup_6xx.S	Fri Oct 21 05:49:53 2005
+++ linux-2.6.13.3/arch/ppc/kernel/cpu_setup_6xx.S	Fri Oct 21 05:53:49 2005
@@ -229,13 +229,19 @@
 	 */
 	ori	r11,r11,HID0_SGE | HID0_FOLD | HID0_BHTE
 	ori	r11,r11,HID0_LRSTK | HID0_BTIC
-	oris	r11,r11,HID0_DPM@h
+	oris	r11,r11,HID0_DPM@h | HID0_XAEN@h
 BEGIN_FTR_SECTION
 	xori	r11,r11,HID0_BTIC
 END_FTR_SECTION_IFSET(CPU_FTR_NO_BTIC)
 BEGIN_FTR_SECTION
 	xoris	r11,r11,HID0_DPM@h	/* disable dynamic power mgmt */
 END_FTR_SECTION_IFSET(CPU_FTR_NO_DPM)
+BEGIN_FTR_SECTION
+	xoris	r11,r11,HID0_XAEN@h
+END_FTR_SECTION_IFCLR(CPU_FTR_BIG_PHYS)
+BEGIN_FTR_SECTION
+	ori	r11,r11,HID0_XBSEN
+END_FTR_SECTION_IFSET(CPU_FTR_LARGE_BATS)
 
 	/* All of the bits we have to clear....
 	 */
diff -urN linux-2.6.13.3.orig/arch/ppc/kernel/cputable.c linux-2.6.13.3/arch/ppc/kernel/cputable.c
--- linux-2.6.13.3.orig/arch/ppc/kernel/cputable.c	Fri Oct 21 05:49:53 2005
+++ linux-2.6.13.3/arch/ppc/kernel/cputable.c	Fri Oct 21 05:53:49 2005
@@ -62,6 +62,18 @@
 #define PPC_FEATURE_SPE_COMP       	0
 #endif
 
+#ifdef CONFIG_PPC_LARGE_BATS
+#define CPU_FTR_LARGE_BATS_COMP		CPU_FTR_LARGE_BATS
+#else
+#define CPU_FTR_LARGE_BATS_COMP		0
+#endif
+
+#ifndef CONFIG_PHYS_64BIT
+#define CPU_FTR_BIG_PHYS_COMP		CPU_FTR_BIG_PHYS
+#else
+#define CPU_FTR_BIG_PHYS_COMP		0
+#endif
+
 /* We need to mark all pages as being coherent if we're SMP or we
  * have a 74[45]x and an MPC107 host bridge.
  */
@@ -428,6 +440,7 @@
 			CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
 			CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
 			CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
+			CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
 			CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
 		.cpu_user_features	= COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 		.icache_bsize		= 32,
@@ -445,6 +458,7 @@
 			CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
 			CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
 			CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP |
+			CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
 			CPU_FTR_NEED_COHERENT | CPU_FTR_HAS_HIGH_BATS,
 		.cpu_user_features	= COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 		.icache_bsize		= 32,
@@ -462,6 +476,7 @@
 			CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
 			CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
 			CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
+			CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
 			CPU_FTR_NEED_COHERENT,
 		.cpu_user_features	= COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 		.icache_bsize		= 32,
@@ -478,6 +493,7 @@
 			CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
 			CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
 			CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
+			CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
 			CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
 			CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC,
 		.cpu_user_features	= COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
@@ -496,6 +512,7 @@
 			CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
 			CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
 			CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
+			CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
 			CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC,
 		.cpu_user_features	= COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 		.icache_bsize		= 32,
@@ -513,6 +530,7 @@
 			CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
 			CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
 			CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
+			CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
 			CPU_FTR_NEED_COHERENT,
 		.cpu_user_features	= COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 		.icache_bsize		= 32,
@@ -529,6 +547,7 @@
 			CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
 			CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
 			CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
+			CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
 			CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
 		.cpu_user_features	= COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 		.icache_bsize		= 32,
diff -urN linux-2.6.13.3.orig/arch/ppc/kernel/head.S linux-2.6.13.3/arch/ppc/kernel/head.S
--- linux-2.6.13.3.orig/arch/ppc/kernel/head.S	Fri Oct 21 05:49:53 2005
+++ linux-2.6.13.3/arch/ppc/kernel/head.S	Fri Oct 21 05:53:49 2005
@@ -1165,6 +1165,14 @@
 	LOAD_BAT(1,r3,r4,r5)
 	LOAD_BAT(2,r3,r4,r5)
 	LOAD_BAT(3,r3,r4,r5)
+#ifdef CONFIG_PPC_HIGH_BATS
+BEGIN_FTR_SECTION
+	LOAD_BAT(4,r3,r4,r5)
+	LOAD_BAT(5,r3,r4,r5)
+	LOAD_BAT(6,r3,r4,r5)
+	LOAD_BAT(7,r3,r4,r5)
+END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS)
+#endif /* CONFIG_PPC_HIGH_BATS */
 #endif /* CONFIG_POWER4 */
 	blr
 
diff -urN linux-2.6.13.3.orig/arch/ppc/mm/pgtable.c linux-2.6.13.3/arch/ppc/mm/pgtable.c
--- linux-2.6.13.3.orig/arch/ppc/mm/pgtable.c	Fri Oct 21 05:49:53 2005
+++ linux-2.6.13.3/arch/ppc/mm/pgtable.c	Fri Oct 21 05:53:49 2005
@@ -55,8 +55,8 @@
 
 #ifdef HAVE_BATS
 extern unsigned long v_mapped_by_bats(unsigned long va);
-extern unsigned long p_mapped_by_bats(unsigned long pa);
-void setbat(int index, unsigned long virt, unsigned long phys,
+extern unsigned long p_mapped_by_bats(phys_addr_t pa);
+void setbat(int index, unsigned long virt, phys_addr_t phys,
 	    unsigned int size, int flags);
 
 #else /* !HAVE_BATS */
@@ -339,7 +339,7 @@
 	/*
 	 * Use a BAT for this if possible...
 	 */
-	if (io_bat_index < 2 && is_power_of_2(size)
+	if (io_bat_index < (ppc_bat_count() - 2) && is_power_of_2(size)
 	    && (virt & (size - 1)) == 0 && (phys & (size - 1)) == 0) {
 		setbat(io_bat_index, virt, phys, size, flags);
 		++io_bat_index;
diff -urN linux-2.6.13.3.orig/arch/ppc/mm/ppc_mmu.c linux-2.6.13.3/arch/ppc/mm/ppc_mmu.c
--- linux-2.6.13.3.orig/arch/ppc/mm/ppc_mmu.c	Fri Oct 21 05:49:53 2005
+++ linux-2.6.13.3/arch/ppc/mm/ppc_mmu.c	Fri Oct 21 05:53:49 2005
@@ -36,6 +36,7 @@
 #include "mmu_decl.h"
 #include "mem_pieces.h"
 
+
 PTE *Hash, *Hash_end;
 unsigned long Hash_size, Hash_mask;
 unsigned long _SDR1;
@@ -47,13 +48,13 @@
 #else
 	u32	word[2];
 #endif
-} BATS[4][2];			/* 4 pairs of IBAT, DBAT */
+} BATS[PPC_BAT_COUNT][2];			/* 4 pairs of IBAT, DBAT */
 
 struct batrange {		/* stores address ranges mapped by BATs */
 	unsigned long start;
 	unsigned long limit;
-	unsigned long phys;
-} bat_addrs[4];
+	phys_addr_t phys;
+} bat_addrs[PPC_BAT_COUNT];
 
 /*
  * Return PA for this VA if it is mapped by a BAT, or 0
@@ -61,7 +62,7 @@
 unsigned long v_mapped_by_bats(unsigned long va)
 {
 	int b;
-	for (b = 0; b < 4; ++b)
+	for (b = 0; b < PPC_BAT_COUNT; ++b)
 		if (va >= bat_addrs[b].start && va < bat_addrs[b].limit)
 			return bat_addrs[b].phys + (va - bat_addrs[b].start);
 	return 0;
@@ -70,10 +71,10 @@
 /*
  * Return VA for a given PA or 0 if not mapped
  */
-unsigned long p_mapped_by_bats(unsigned long pa)
+unsigned long p_mapped_by_bats(phys_addr_t pa)
 {
 	int b;
-	for (b = 0; b < 4; ++b)
+	for (b = 0; b < PPC_BAT_COUNT; ++b)
 		if (pa >= bat_addrs[b].phys
 	    	    && pa < (bat_addrs[b].limit-bat_addrs[b].start)
 		              +bat_addrs[b].phys)
@@ -87,13 +88,14 @@
 	return 0;
 #else
 	unsigned long tot, bl, done;
-	unsigned long max_size = (256<<20);
+	unsigned long max_size = max_bat_size();
 	unsigned long align;
+	int bat_nbr = ppc_bat_count() - 2;
 
 	if (__map_without_bats)
 		return 0;
 
-	/* Set up BAT2 and if necessary BAT3 to cover RAM. */
+	/* Set up BAT[2|6] and if necessary BAT[3|7] to cover RAM. */
 
 	/* Make sure we don't map a block larger than the
 	   smallest alignment of the physical address. */
@@ -109,16 +111,17 @@
 			break;
 	}
 
-	setbat(2, KERNELBASE, PPC_MEMSTART, bl, _PAGE_RAM);
-	done = (unsigned long)bat_addrs[2].limit - KERNELBASE + 1;
-	if ((done < tot) && !bat_addrs[3].limit) {
-		/* use BAT3 to cover a bit more */
+	setbat(bat_nbr, KERNELBASE, PPC_MEMSTART, bl, _PAGE_RAM);
+	done = (unsigned long)bat_addrs[bat_nbr].limit - KERNELBASE + 1;
+	bat_nbr++;
+	if ((done < tot) && !bat_addrs[bat_nbr].limit) {
+		/* use BAT[3|7] to cover a bit more */
 		tot -= done;
 		for (bl = 128<<10; bl < max_size; bl <<= 1)
 			if (bl * 2 > tot)
 				break;
-		setbat(3, KERNELBASE+done, PPC_MEMSTART+done, bl, _PAGE_RAM);
-		done = (unsigned long)bat_addrs[3].limit - KERNELBASE + 1;
+		setbat(bat_nbr, KERNELBASE+done, PPC_MEMSTART+done, bl, _PAGE_RAM);
+		done = (unsigned long)bat_addrs[bat_nbr].limit - KERNELBASE + 1;
 	}
 
 	return done;
@@ -130,7 +133,7 @@
  * The parameters are not checked; in particular size must be a power
  * of 2 between 128k and 256M.
  */
-void __init setbat(int index, unsigned long virt, unsigned long phys,
+void __init setbat(int index, unsigned long virt, phys_addr_t phys,
 		   unsigned int size, int flags)
 {
 	unsigned int bl;
@@ -148,6 +151,9 @@
 		wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE
 				   | _PAGE_COHERENT | _PAGE_GUARDED);
 		wimgxpp |= (flags & _PAGE_RW)? BPP_RW: BPP_RX;
+#ifdef CONFIG_PHYS_64BIT
+		wimgxpp |= ((phys >> 30) & 4) | ((phys >> 24) & 0xe00);
+#endif
 		bat[1].word[0] = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */
 		bat[1].word[1] = phys | wimgxpp;
 #ifndef CONFIG_KGDB /* want user access for breakpoints */
diff -urN linux-2.6.13.3.orig/include/asm-ppc/cputable.h linux-2.6.13.3/include/asm-ppc/cputable.h
--- linux-2.6.13.3.orig/include/asm-ppc/cputable.h	Thu Jun 30 01:00:53 2005
+++ linux-2.6.13.3/include/asm-ppc/cputable.h	Fri Oct 21 05:53:49 2005
@@ -89,6 +89,7 @@
 #define CPU_FTR_NEED_COHERENT		0x00020000
 #define CPU_FTR_NO_BTIC			0x00040000
 #define CPU_FTR_BIG_PHYS		0x00080000
+#define CPU_FTR_LARGE_BATS		0x00100000
 
 #ifdef __ASSEMBLY__
 
diff -urN linux-2.6.13.3.orig/include/asm-ppc/mmu.h linux-2.6.13.3/include/asm-ppc/mmu.h
--- linux-2.6.13.3.orig/include/asm-ppc/mmu.h	Fri Oct 21 05:44:49 2005
+++ linux-2.6.13.3/include/asm-ppc/mmu.h	Fri Oct 21 05:53:49 2005
@@ -18,11 +18,30 @@
 #ifndef CONFIG_PHYS_64BIT
 typedef unsigned long phys_addr_t;
 #define PHYS_FMT	"%.8lx"
+#define cpu_has_bigphys() 0
 #else
 typedef unsigned long long phys_addr_t;
 extern phys_addr_t fixup_bigphys_addr(phys_addr_t, phys_addr_t);
 #define PHYS_FMT	"%16Lx"
+#define cpu_has_bigphys() cpu_has_feature(CPU_FTR_BIG_PHYS)
 #endif
+
+#ifdef CONFIG_PPC_LARGE_BATS
+/* We don't allow 4G Bat's because it doesn't fit into size_t */
+#define max_bat_size() (cpu_has_feature(CPU_FTR_LARGE_BATS)?(2<<30):(256<<20))
+#else
+#define max_bat_size() (256<<20)
+#endif
+
+/* High BAT support */
+#ifdef CONFIG_PPC_HIGH_BATS
+#define PPC_BAT_COUNT 8
+#define ppc_bat_count() (cpu_has_feature(CPU_FTR_HAS_HIGH_BATS)?8:4)
+#else
+#define PPC_BAT_COUNT 4
+#define ppc_bat_count() (4)
+#endif
+
 
 /* Default "unsigned long" context */
 typedef unsigned long mm_context_t;

^ permalink raw reply

* Re: Three-Speed Ethernet support on MPC8560 (TSEC)
From: Kumar Gala @ 2005-10-21 13:39 UTC (permalink / raw)
  To: Nathael PAJANI; +Cc: linuxppc-embedded
In-Reply-To: <4358DD4C.7020507@cpe.fr>


On Oct 21, 2005, at 7:21 AM, Nathael PAJANI wrote:

> Hi all!
>
> I'm working on a port of linux (2.6.13-2) on an Actis-computer board,
> based on the Freescale MPC8560 Processor.
>
> I solved the problems I had with the init process, and I actually have
> the console (SCC1) and one ethernet controler (FCC3) running.
>
> I will now go on with the Three-Speed Ethernet Controler, and there
> actually seem to be no support for it, but maybe I did not look at the
> right place?

The TSEC has been supported for a long time.  The driver is call  
gianfar (drivers/net/gianfar*).

> I got another question, about the FCC driver: it uses a "big"  
> structure
> "fcc_enet_t" wich seems to be aimed at stats. This is initialised,  
> but I
> did not find where this is used. Is it?

The FCC enet driver has been completely rewritten recently and is in  
the process of being accepted into the kernel.  Hopefully one of the  
guys with more knowledge on the details will be able to help you on  
the specifics.

- kumar

^ permalink raw reply

* Re: MPC8xx soft-float userspace ...
From: Dan Malek @ 2005-10-21 14:00 UTC (permalink / raw)
  To: Schaefer-Hutter, Peter; +Cc: linuxppc-embedded
In-Reply-To: <8E342283C2100540AAC5D103097054778A4189@rcexc.racoms.loc>


On Oct 21, 2005, at 5:31 AM, Schaefer-Hutter, Peter wrote:

> Due to the fact that the in-kernel FPU emulation looks
> broken on MPC8xx i want to build a complete soft-float
> userspace.

How does it "look broken?"  It's always worked for me :-)

> ....  Does anybody have some pointers what else
> needs to be removed?

Well, if you found it, you should be able to trace this to a
source file and remove it, right?

Thanks.

	-- Dan

^ permalink raw reply

* write/read PCI in Linux PPC
From: Roberto Pavon Sierra @ 2005-10-21 14:05 UTC (permalink / raw)
  To: linuxppc-embedded

Hi,

I try to write at the PCI-Addresses of the ATI´s video controller in
Linux-PPC. How can I write these Addresses? I can work only with few
commands in my Linux-kernel image.

Thanks in advance,

Roberto

^ permalink raw reply

* Re: Support for MPC8548 processor
From: Kumar Gala @ 2005-10-21 14:12 UTC (permalink / raw)
  To: Rupesh S; +Cc: linuxppc-embedded
In-Reply-To: <s358f676.093@EMAIL>

[-- Attachment #1: Type: text/plain, Size: 352 bytes --]


On Oct 21, 2005, at 3:38 AM, Rupesh S wrote:

> Hi
>
> Can anyone help me know if there exists any linux kernel that supports
> MPC8548 processor based boards ?

The 2.6.13 kernel should provide basic support for 8548, uart, TSEC,  
I2c.

> And if it exists, does the kernel support the PCI Express module  
> that is
> there within MPC8548 ?

- kumar

[-- Attachment #2: Type: text/html, Size: 933 bytes --]

^ permalink raw reply

* bdi2000 file for yosemite board
From: Peter Fercher @ 2005-10-21 14:19 UTC (permalink / raw)
  To: linux-ppc-embedded

[-- Attachment #1: Type: text/plain, Size: 240 bytes --]

does anybody have a clue where to get a yosemite (ppc440ep eval board from
embedded planet) .cfg and .reg (configuration and register definition) file
for the bdi2000 programmer to reprogramm the flash (write u-boot into flash)
?
 
 

[-- Attachment #2: Type: text/html, Size: 739 bytes --]

^ permalink raw reply

* Re: [PATCH][RFT] please use this one
From: Kumar Gala @ 2005-10-21 14:28 UTC (permalink / raw)
  To: Rupert Eibauer; +Cc: linuxppc-dev
In-Reply-To: <200510211442.08477.rupert@ces.ch>

The concept of PPC_HIGH_BATS is already some what handled with  
CPU_FTR_HAS_HIGH_BATS.  I recommend you use this feature instead of  
introducing another one as well as a compile time option.

- k

On Oct 21, 2005, at 7:42 AM, Rupert Eibauer wrote:

> Hello,
>
> Please try this one. The first one contained a last-second
> fix which I didn't test if it compiles.
>
> Regards,
> Rupert
>
> diff -urN linux-2.6.13.3.orig/arch/ppc/Kconfig linux-2.6.13.3/arch/ 
> ppc/Kconfig
> --- linux-2.6.13.3.orig/arch/ppc/Kconfig    Fri Oct 21 05:42:59 2005
> +++ linux-2.6.13.3/arch/ppc/Kconfig    Fri Oct 21 05:53:49 2005
> @@ -115,14 +115,28 @@
>      default y if E500 && PHYS_64BIT
>
>  config PHYS_64BIT
> -    bool 'Large physical address support' if E500
> -    depends on 44x || E500
> +    bool 'Large physical address support' if E500 || 6xx
> +    depends on 44x || E500 || 6xx
>      default y if 44x
>      ---help---
>        This option enables kernel support for larger than 32-bit  
> physical
>        addresses.  This features is not be available on all e500  
> cores.
>
>        If in doubt, say N here.
> +
> +config PPC_LARGE_BATS
> +    bool 'Extended BAT Block Bize Support' if 6xx
> +    depends on 6xx
> +    ---help---
> +     This option enables kernel support for large BAT
> +     addressing mode, which is present on some 7450 chips.
> +
> +config PPC_HIGH_BATS
> +    bool 'High BAT Support' if 6xx
> +    depends on 6xx
> +    ---help---
> +     This option enables kernel support for the 4 additional
> +     BATS, which is present on some 7450 chips.
>
>  config ALTIVEC
>      bool "AltiVec Support"
> diff -urN linux-2.6.13.3.orig/arch/ppc/kernel/cpu_setup_6xx.S  
> linux-2.6.13.3/arch/ppc/kernel/cpu_setup_6xx.S
> --- linux-2.6.13.3.orig/arch/ppc/kernel/cpu_setup_6xx.S    Fri Oct  
> 21 05:49:53 2005
> +++ linux-2.6.13.3/arch/ppc/kernel/cpu_setup_6xx.S    Fri Oct 21  
> 05:53:49 2005
> @@ -229,13 +229,19 @@
>       */
>      ori    r11,r11,HID0_SGE | HID0_FOLD | HID0_BHTE
>      ori    r11,r11,HID0_LRSTK | HID0_BTIC
> -    oris    r11,r11,HID0_DPM@h
> +    oris    r11,r11,(HID0_DPM | HID0_XAEN)@h
>  BEGIN_FTR_SECTION
>      xori    r11,r11,HID0_BTIC
>  END_FTR_SECTION_IFSET(CPU_FTR_NO_BTIC)
>  BEGIN_FTR_SECTION
>      xoris    r11,r11,HID0_DPM@h    /* disable dynamic power mgmt */
>  END_FTR_SECTION_IFSET(CPU_FTR_NO_DPM)
> +BEGIN_FTR_SECTION
> +    xoris    r11,r11,HID0_XAEN@h
> +END_FTR_SECTION_IFCLR(CPU_FTR_BIG_PHYS)
> +BEGIN_FTR_SECTION
> +    ori    r11,r11,HID0_XBSEN
> +END_FTR_SECTION_IFSET(CPU_FTR_LARGE_BATS)
>
>      /* All of the bits we have to clear....
>       */
> diff -urN linux-2.6.13.3.orig/arch/ppc/kernel/cputable.c  
> linux-2.6.13.3/arch/ppc/kernel/cputable.c
> --- linux-2.6.13.3.orig/arch/ppc/kernel/cputable.c    Fri Oct 21  
> 05:49:53 2005
> +++ linux-2.6.13.3/arch/ppc/kernel/cputable.c    Fri Oct 21  
> 05:53:49 2005
> @@ -62,6 +62,18 @@
>  #define PPC_FEATURE_SPE_COMP           0
>  #endif
>
> +#ifdef CONFIG_PPC_LARGE_BATS
> +#define CPU_FTR_LARGE_BATS_COMP        CPU_FTR_LARGE_BATS
> +#else
> +#define CPU_FTR_LARGE_BATS_COMP        0
> +#endif
> +
> +#ifndef CONFIG_PHYS_64BIT
> +#define CPU_FTR_BIG_PHYS_COMP        CPU_FTR_BIG_PHYS
> +#else
> +#define CPU_FTR_BIG_PHYS_COMP        0
> +#endif
> +
>  /* We need to mark all pages as being coherent if we're SMP or we
>   * have a 74[45]x and an MPC107 host bridge.
>   */
> @@ -428,6 +440,7 @@
>              CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
>              CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
>              CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
> +            CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
>              CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
>          .cpu_user_features    = COMMON_PPC |  
> PPC_FEATURE_ALTIVEC_COMP,
>          .icache_bsize        = 32,
> @@ -445,6 +458,7 @@
>              CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
>              CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
>              CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP |
> +            CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
>              CPU_FTR_NEED_COHERENT | CPU_FTR_HAS_HIGH_BATS,
>          .cpu_user_features    = COMMON_PPC |  
> PPC_FEATURE_ALTIVEC_COMP,
>          .icache_bsize        = 32,
> @@ -462,6 +476,7 @@
>              CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
>              CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
>              CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
> +            CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
>              CPU_FTR_NEED_COHERENT,
>          .cpu_user_features    = COMMON_PPC |  
> PPC_FEATURE_ALTIVEC_COMP,
>          .icache_bsize        = 32,
> @@ -478,6 +493,7 @@
>              CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
>              CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
>              CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
> +            CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
>              CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
>              CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC,
>          .cpu_user_features    = COMMON_PPC |  
> PPC_FEATURE_ALTIVEC_COMP,
> @@ -496,6 +512,7 @@
>              CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
>              CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
>              CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
> +            CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
>              CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC,
>          .cpu_user_features    = COMMON_PPC |  
> PPC_FEATURE_ALTIVEC_COMP,
>          .icache_bsize        = 32,
> @@ -513,6 +530,7 @@
>              CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
>              CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
>              CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
> +            CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
>              CPU_FTR_NEED_COHERENT,
>          .cpu_user_features    = COMMON_PPC |  
> PPC_FEATURE_ALTIVEC_COMP,
>          .icache_bsize        = 32,
> @@ -529,6 +547,7 @@
>              CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
>              CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
>              CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
> +            CPU_FTR_BIG_PHYS_COMP | CPU_FTR_LARGE_BATS_COMP |
>              CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
>          .cpu_user_features    = COMMON_PPC |  
> PPC_FEATURE_ALTIVEC_COMP,
>          .icache_bsize        = 32,
> diff -urN linux-2.6.13.3.orig/arch/ppc/kernel/head.S linux-2.6.13.3/ 
> arch/ppc/kernel/head.S
> --- linux-2.6.13.3.orig/arch/ppc/kernel/head.S    Fri Oct 21  
> 05:49:53 2005
> +++ linux-2.6.13.3/arch/ppc/kernel/head.S    Fri Oct 21 05:53:49 2005
> @@ -1165,6 +1165,14 @@
>      LOAD_BAT(1,r3,r4,r5)
>      LOAD_BAT(2,r3,r4,r5)
>      LOAD_BAT(3,r3,r4,r5)
> +#ifdef CONFIG_PPC_HIGH_BATS
> +BEGIN_FTR_SECTION
> +    LOAD_BAT(4,r3,r4,r5)
> +    LOAD_BAT(5,r3,r4,r5)
> +    LOAD_BAT(6,r3,r4,r5)
> +    LOAD_BAT(7,r3,r4,r5)
> +END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS)
> +#endif /* CONFIG_PPC_HIGH_BATS */
>  #endif /* CONFIG_POWER4 */
>      blr
>
> diff -urN linux-2.6.13.3.orig/arch/ppc/mm/pgtable.c linux-2.6.13.3/ 
> arch/ppc/mm/pgtable.c
> --- linux-2.6.13.3.orig/arch/ppc/mm/pgtable.c    Fri Oct 21  
> 05:49:53 2005
> +++ linux-2.6.13.3/arch/ppc/mm/pgtable.c    Fri Oct 21 05:53:49 2005
> @@ -55,8 +55,8 @@
>
>  #ifdef HAVE_BATS
>  extern unsigned long v_mapped_by_bats(unsigned long va);
> -extern unsigned long p_mapped_by_bats(unsigned long pa);
> -void setbat(int index, unsigned long virt, unsigned long phys,
> +extern unsigned long p_mapped_by_bats(phys_addr_t pa);
> +void setbat(int index, unsigned long virt, phys_addr_t phys,
>          unsigned int size, int flags);
>
>  #else /* !HAVE_BATS */
> @@ -339,7 +339,7 @@
>      /*
>       * Use a BAT for this if possible...
>       */
> -    if (io_bat_index < 2 && is_power_of_2(size)
> +    if (io_bat_index < (ppc_bat_count() - 2) && is_power_of_2(size)
>          && (virt & (size - 1)) == 0 && (phys & (size - 1)) == 0) {
>          setbat(io_bat_index, virt, phys, size, flags);
>          ++io_bat_index;
> diff -urN linux-2.6.13.3.orig/arch/ppc/mm/ppc_mmu.c linux-2.6.13.3/ 
> arch/ppc/mm/ppc_mmu.c
> --- linux-2.6.13.3.orig/arch/ppc/mm/ppc_mmu.c    Fri Oct 21  
> 05:49:53 2005
> +++ linux-2.6.13.3/arch/ppc/mm/ppc_mmu.c    Fri Oct 21 05:53:49 2005
> @@ -36,6 +36,7 @@
>  #include "mmu_decl.h"
>  #include "mem_pieces.h"
>
> +
>  PTE *Hash, *Hash_end;
>  unsigned long Hash_size, Hash_mask;
>  unsigned long _SDR1;
> @@ -47,13 +48,13 @@
>  #else
>      u32    word[2];
>  #endif
> -} BATS[4][2];            /* 4 pairs of IBAT, DBAT */
> +} BATS[PPC_BAT_COUNT][2];            /* 4 pairs of IBAT, DBAT */
>
>  struct batrange {        /* stores address ranges mapped by BATs */
>      unsigned long start;
>      unsigned long limit;
> -    unsigned long phys;
> -} bat_addrs[4];
> +    phys_addr_t phys;
> +} bat_addrs[PPC_BAT_COUNT];
>
>  /*
>   * Return PA for this VA if it is mapped by a BAT, or 0
> @@ -61,7 +62,7 @@
>  unsigned long v_mapped_by_bats(unsigned long va)
>  {
>      int b;
> -    for (b = 0; b < 4; ++b)
> +    for (b = 0; b < PPC_BAT_COUNT; ++b)
>          if (va >= bat_addrs[b].start && va < bat_addrs[b].limit)
>              return bat_addrs[b].phys + (va - bat_addrs[b].start);
>      return 0;
> @@ -70,10 +71,10 @@
>  /*
>   * Return VA for a given PA or 0 if not mapped
>   */
> -unsigned long p_mapped_by_bats(unsigned long pa)
> +unsigned long p_mapped_by_bats(phys_addr_t pa)
>  {
>      int b;
> -    for (b = 0; b < 4; ++b)
> +    for (b = 0; b < PPC_BAT_COUNT; ++b)
>          if (pa >= bat_addrs[b].phys
>                  && pa < (bat_addrs[b].limit-bat_addrs[b].start)
>                        +bat_addrs[b].phys)
> @@ -87,13 +88,14 @@
>      return 0;
>  #else
>      unsigned long tot, bl, done;
> -    unsigned long max_size = (256<<20);
> +    unsigned long max_size = max_bat_size();
>      unsigned long align;
> +    int bat_nbr = ppc_bat_count() - 2;
>
>      if (__map_without_bats)
>          return 0;
>
> -    /* Set up BAT2 and if necessary BAT3 to cover RAM. */
> +    /* Set up BAT[2|6] and if necessary BAT[3|7] to cover RAM. */
>
>      /* Make sure we don't map a block larger than the
>         smallest alignment of the physical address. */
> @@ -109,16 +111,17 @@
>              break;
>      }
>
> -    setbat(2, KERNELBASE, PPC_MEMSTART, bl, _PAGE_RAM);
> -    done = (unsigned long)bat_addrs[2].limit - KERNELBASE + 1;
> -    if ((done < tot) && !bat_addrs[3].limit) {
> -        /* use BAT3 to cover a bit more */
> +    setbat(bat_nbr, KERNELBASE, PPC_MEMSTART, bl, _PAGE_RAM);
> +    done = (unsigned long)bat_addrs[bat_nbr].limit - KERNELBASE + 1;
> +    bat_nbr++;
> +    if ((done < tot) && !bat_addrs[bat_nbr].limit) {
> +        /* use BAT[3|7] to cover a bit more */
>          tot -= done;
>          for (bl = 128<<10; bl < max_size; bl <<= 1)
>              if (bl * 2 > tot)
>                  break;
> -        setbat(3, KERNELBASE+done, PPC_MEMSTART+done, bl, _PAGE_RAM);
> -        done = (unsigned long)bat_addrs[3].limit - KERNELBASE + 1;
> +        setbat(bat_nbr, KERNELBASE+done, PPC_MEMSTART+done, bl,  
> _PAGE_RAM);
> +        done = (unsigned long)bat_addrs[bat_nbr].limit -  
> KERNELBASE + 1;
>      }
>
>      return done;
> @@ -130,7 +133,7 @@
>   * The parameters are not checked; in particular size must be a power
>   * of 2 between 128k and 256M.
>   */
> -void __init setbat(int index, unsigned long virt, unsigned long phys,
> +void __init setbat(int index, unsigned long virt, phys_addr_t phys,
>             unsigned int size, int flags)
>  {
>      unsigned int bl;
> @@ -148,6 +151,9 @@
>          wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE
>                     | _PAGE_COHERENT | _PAGE_GUARDED);
>          wimgxpp |= (flags & _PAGE_RW)? BPP_RW: BPP_RX;
> +#ifdef CONFIG_PHYS_64BIT
> +        wimgxpp |= ((phys >> 30) & 4) | ((phys >> 24) & 0xe00);
> +#endif
>          bat[1].word[0] = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */
>          bat[1].word[1] = phys | wimgxpp;
>  #ifndef CONFIG_KGDB /* want user access for breakpoints */
> diff -urN linux-2.6.13.3.orig/include/asm-ppc/cputable.h  
> linux-2.6.13.3/include/asm-ppc/cputable.h
> --- linux-2.6.13.3.orig/include/asm-ppc/cputable.h    Thu Jun 30  
> 01:00:53 2005
> +++ linux-2.6.13.3/include/asm-ppc/cputable.h    Fri Oct 21  
> 05:53:49 2005
> @@ -89,6 +89,7 @@
>  #define CPU_FTR_NEED_COHERENT        0x00020000
>  #define CPU_FTR_NO_BTIC            0x00040000
>  #define CPU_FTR_BIG_PHYS        0x00080000
> +#define CPU_FTR_LARGE_BATS        0x00100000
>
>  #ifdef __ASSEMBLY__
>
> diff -urN linux-2.6.13.3.orig/include/asm-ppc/mmu.h linux-2.6.13.3/ 
> include/asm-ppc/mmu.h
> --- linux-2.6.13.3.orig/include/asm-ppc/mmu.h    Fri Oct 21  
> 05:44:49 2005
> +++ linux-2.6.13.3/include/asm-ppc/mmu.h    Fri Oct 21 05:53:49 2005
> @@ -18,11 +18,30 @@
>  #ifndef CONFIG_PHYS_64BIT
>  typedef unsigned long phys_addr_t;
>  #define PHYS_FMT    "%.8lx"
> +#define cpu_has_bigphys() 0
>  #else
>  typedef unsigned long long phys_addr_t;
>  extern phys_addr_t fixup_bigphys_addr(phys_addr_t, phys_addr_t);
>  #define PHYS_FMT    "%16Lx"
> +#define cpu_has_bigphys() cpu_has_feature(CPU_FTR_BIG_PHYS)
>  #endif
> +
> +#ifdef CONFIG_PPC_LARGE_BATS
> +/* We don't allow 4G Bat's because it doesn't fit into size_t */
> +#define max_bat_size() (cpu_has_feature(CPU_FTR_LARGE_BATS)? 
> (2<<30):(256<<20))
> +#else
> +#define max_bat_size() (256<<20)
> +#endif
> +
> +/* High BAT support */
> +#ifdef CONFIG_PPC_HIGH_BATS
> +#define PPC_BAT_COUNT 8
> +#define ppc_bat_count() (cpu_has_feature(CPU_FTR_HAS_HIGH_BATS)?8:4)
> +#else
> +#define PPC_BAT_COUNT 4
> +#define ppc_bat_count() (4)
> +#endif
> +
>
>  /* Default "unsigned long" context */
>  typedef unsigned long mm_context_t;
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>

^ permalink raw reply

* Re: [PATCH][RFT] please use this one
From: Rupert Eibauer @ 2005-10-21 15:11 UTC (permalink / raw)
  To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <30B37541-CAC4-4052-B33D-AE1373C16FD3@freescale.com>

On Friday 21 October 2005 16:28, Kumar Gala wrote:
> The concept of PPC_HIGH_BATS is already some what handled with  
> CPU_FTR_HAS_HIGH_BATS.  I recommend you use this feature instead of  
> introducing another one as well as a compile time option.

CPU_FTR_HAS_HIGH_BATS only clears the high bats, but does
not attempt to use them. My patch will use them.

Rupert

> 
> - k
> 

^ permalink raw reply

* RE: bdi2000 file for yosemite board
From: Steven Blakeslee @ 2005-10-21 14:29 UTC (permalink / raw)
  To: Peter Fercher, linux-ppc-embedded


[-- Attachment #1.1: Type: text/plain, Size: 552 bytes --]

Never tried the FLASH portion.


________________________________

	From: linuxppc-embedded-bounces@ozlabs.org
[mailto:linuxppc-embedded-bounces@ozlabs.org] On Behalf Of Peter Fercher
	Sent: Friday, October 21, 2005 10:20 AM
	To: linux-ppc-embedded
	Subject: bdi2000 file for yosemite board
	
	
	does anybody have a clue where to get a yosemite (ppc440ep eval
board from embedded planet) .cfg and .reg (configuration and register
definition) file for the bdi2000 programmer to reprogramm the flash
(write u-boot into flash) ?
	 
	 


[-- Attachment #1.2: Type: text/html, Size: 1462 bytes --]

[-- Attachment #2: 4xxep440.cfg --]
[-- Type: application/octet-stream, Size: 3696 bytes --]

;ep440 256M
;---------------
;written by Steven Blakeslee
;
;
[INIT]
; Setup TLB
WTLB 	0xF000009D  0x0F00003F ;Boot Space 256MB 
WTLB 	0x0000009D  0x0000003F ;SDRAM 256MB @ 0x00000000 
WTLB 	0xE000009D  0x0E00003F ;Registers 256MB 
WTLB	0x8000009D  0x0800003F ;BCSRs 256MB
;
; Setup caches, don't need
WSPR    0x370   0x00000000      ;INV0
WSPR    0x371   0x00000000      ;INV1
WSPR    0x372   0x00000000      ;INV2
WSPR    0x373   0x00000000      ;INV3
WSPR    0x390   0x00000000      ;DNV0
WSPR    0x391   0x00000000      ;DNV1
WSPR    0x392   0x00000000      ;DNV2
WSPR    0x393   0x00000000      ;DNV3
WSPR    0x398   0x0001f800      ;DVLIM
WSPR    0x399   0x0001f800      ;IVLIM
;
; Setup Peripheral Bus
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;FLASH CS0 32M x 16
WDCR	0x12	0x00000010	;Select EBC0_B0AP
WDCR	0x13	0x03017300	;B0AP: Flash
WDCR	0x12	0x00000000	;Select EBC0_B0CR
;WDCR	0x13	0xfc0da000	;B0CR: 64Meg, 16Bit at 0xFC000000
WDCR	0x13	0xfe0ba000	;B0CR: 32Meg, 16Bit at 0xFE000000
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;BCSR NVRAM CS2
WDCR	0x12	0x00000012	;Select EBC0_B2AP
WDCR	0x13	0x04814500	;EBC0_B2AP: BCSR
WDCR	0x12	0x00000002	;Select EBC0_B2CR
WDCR	0x13	0x80018000	;EBC0_B2CR: 1Meg, 16Bit at 0x80000000
;WM32	0xef600b08 0x50010000	;Enable CS2, PerAddr07,06 pin GPIO0_OSRL
;WM32	0xef600b10 0x50010000	;Enable CS2, PerAddr07,06 pin GPIO0_TSRL
;WM32	0xef600b30 0x50000000	;Enable PerAddr07,06 pin

WM32	0xef600b08 0x40010000	;Enable CS2, PerAddr07 pin GPIO0_OSRL
WM32	0xef600b10 0x40010000	;Enable CS2, PerAddr07 pin GPIO0_TSRL
WM32	0xef600b30 0x40000000	;Enable PerAddr07 pin

;WM32	0xef600b08 0x00010000	;Enable CS2, pin GPIO0_OSRL
;WM32	0xef600b10 0x00010000	;Enable CS2, pin GPIO0_TSRL
;
; Setup SDRAM Controller (DDR SDRAM)
WDCR	0x10	0x00000082	;Select SDRAM0_CLKTR
WDCR	0x11	0x40000000	;CLKTR: Advance 90 degrees
WDCR	0x10	0x00000080	;Select SDRAM0_TR0
WDCR	0x11	0x410a4012	;TR0:
WDCR	0x10	0x00000081	;Select SDRAM0_TR1
WDCR	0x11	0x80800819	;TR1:

;;May have to change addressing mode
WDCR	0x10	0x00000040	;Select SDRAM0_B0CR
WDCR	0x11	0x000a4001	;B0CR: 128M first bank, start 0x0, 13x10
;WDCR	0x11	0x000a2001	;B0CR: 64M first bank, start 0x0, 13x9
WDCR	0x10	0x00000044	;Select SDRAM0_B1CR
WDCR	0x11	0x080a4001	;B1CR: 128M second bank, start 0x08000000, 13x10
;WDCR	0x11	0x040a2001	;B1CR: 64M second bank, start 0x08000000, 13x9

WDCR	0x10	0x00000030	;Select SDRAM0_RTR
WDCR	0x11	0x04080000	;RTR:
WDCR	0x10	0x00000020	;Select SDRAM0_CFG0
WDCR	0x11	0x34000000	;CFG0: 32bit, PMU disable
WDCR	0x11	0x84000000	;CFG0: enable SDRAM
;
DELAY   100
;
; Clear DBCR1 and DBCR2
WSPR    0x135   0x00000000      ;DBCR1
WSPR    0x136   0x00000000      ;DBCR2
;
;
[TARGET]
JTAGCLOCK   0			;use 16 MHz JTAG clock
CPUTYPE	    440			;the used target CPU type
SCANMISC    8 0xE0              ;IR length is 8 bits for 440GX
WAKEUP      500                 ;wakeup time after reset
BDIMODE	    AGENT		;the BDI working mode (LOADONLY | AGENT)
BREAKMODE   HARD		;SOFT or HARD, HARD uses PPC hardware breakpoint
STEPMODE    JTAG		;JTAG or HWBP, HWBP uses one or two hardware breakpoints
;
[HOST]
IP          10.0.0.198   ;Windows host
FILE        pcb4xx100.ep
;FORMAT      BIN 0x200000
FORMAT	    SREC
LOAD        MANUAL              ;load code MANUAL or AUTO after reset
;
;
[REGS]
IDCR1	0x010	0x011	;SDRAM0_CFGADDR and SDRAM0_CFGDATA
IDCR2	0x012	0x013	;EBC0_CFGADDR   and EBC0_CFGDATA
IDCR3	0x014	0x015	;EBM0_CFGADDR   and EBM0_CFGDATA
IDCR4	0x016	0x017	;PPM0_CFGADDR   and PPM0_CFGDATA
IDCR5	0x00C	0x00D	;CPR0_CFGADDR   and CPR0_CFGDATA
IDCR6	0x00E	0x00F	;SDR0_CFGADDR   and SDR0_CFGDATA
FILE    defs/reg440gx.def
;

^ permalink raw reply

* Re: [PATCH][RFT] please use this one
From: Kumar Gala @ 2005-10-21 15:23 UTC (permalink / raw)
  To: Rupert Eibauer; +Cc: linuxppc-dev
In-Reply-To: <200510211711.02997.rupert@ces.ch>


On Oct 21, 2005, at 10:11 AM, Rupert Eibauer wrote:

> On Friday 21 October 2005 16:28, Kumar Gala wrote:
>
>> The concept of PPC_HIGH_BATS is already some what handled with
>> CPU_FTR_HAS_HIGH_BATS.  I recommend you use this feature instead of
>> introducing another one as well as a compile time option.
>>
>
> CPU_FTR_HAS_HIGH_BATS only clears the high bats, but does
> not attempt to use them. My patch will use them.

I understand, I'm suggesting you expand CPU_FTR_HAS_HIGH_BATS to  
include your additional functionality.

- kumar

^ permalink raw reply

* Re: bdi2000 file for yosemite board
From: Wolfgang Denk @ 2005-10-21 15:59 UTC (permalink / raw)
  To: Peter Fercher; +Cc: linux-ppc-embedded

[-- Attachment #1: Type: text/plain, Size: 785 bytes --]

In message <008601c5d64a$743ebdc0$dbe5fed4@scsad.scs.ch> you wrote:
> 
> does anybody have a clue where to get a yosemite (ppc440ep eval board from
> embedded planet) .cfg and .reg (configuration and register definition) file
> for the bdi2000 programmer to reprogramm the flash (write u-boot into flash)

Please see attachment.

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
Digital computers are themselves more complex than most things people
build: They have very large numbers of states. This makes conceiving,
describing, and testing them hard. Software systems  have  orders-of-
magnitude more states than computers do.           - Fred Brooks, Jr.


[-- Attachment #2: yosemite.cfg --]
[-- Type: text/plain , Size: 4975 bytes --]

;bdiGDB configuration file for IBM 440GX Reference Board
; ------------------------------------------------------
;
[INIT]
; Setup TLB
WTLB    0xF0000095  0x0F00003F  ;Boot Space 256MB
WTLB    0x00000094  0x0000003F  ;SDRAM 256MB @ 0x00000000
WTLB    0xd0000095  0x2000001B  ;PCI Page Entry
WTLB    0xe0000095  0x1400001B  ;Peripheral Page Entry
;
; Setup caches
WSPR    0x370   0x00000000      ;INV0
WSPR    0x371   0x00000000      ;INV1
WSPR    0x372   0x00000000      ;INV2
WSPR    0x373   0x00000000      ;INV3
WSPR    0x390   0x00000000      ;DNV0
WSPR    0x391   0x00000000      ;DNV1
WSPR    0x392   0x00000000      ;DNV2
WSPR    0x393   0x00000000      ;DNV3
WSPR    0x398   0x0001f800      ;DVLIM
WSPR    0x399   0x0001f800      ;IVLIM
;
; Setup Peripheral Bus
WDCR	0x12	0x00000010	;Select EBC0_B0AP
WDCR	0x13	0x04055200	;B0AP: Flash and SRAM
WDCR	0x12	0x00000000	;Select EBC0_B0CR
;WDCR	0x13	0xffc58000	;B0CR: 4MB at 0xFFC00000, r/w, 8bit
WDCR	0x13	0xffc5a000	;B0CR: 4MB at 0xFFC00000, r/w, 16bit
;WDCR	0x12	0x00000012	;Select EBC0_B2AP
;WDCR	0x13	0x05055200	;B2AP: 4 MB Flash
;WDCR	0x12	0x00000002	;Select EBC0_B2CR
;WDCR	0x13	0xff838000	;B2CR: 2MB at 0xFFE00000, r/w, 8bit
;
; Setup SDRAM Controller (DDR SDRAM)
WDCR	0x10	0x00000082	;Select SDRAM0_CLKTR
WDCR	0x11	0x40000000	;CLKTR: Advance 90 degrees
WDCR	0x10	0x00000080	;Select SDRAM0_TR0
WDCR	0x11	0x410a4012	;TR0:
WDCR	0x10	0x00000081	;Select SDRAM0_TR1
WDCR	0x11	0x8080080b	;TR1:
WDCR	0x10	0x00000040	;Select SDRAM0_B0CR
WDCR	0x11	0x000a4001	;B0CR:
WDCR	0x10	0x00000044	;Select SDRAM0_B1CR
WDCR	0x11	0x080a4001	;B1CR:
WDCR	0x10	0x00000030	;Select SDRAM0_RTR
WDCR	0x11	0x04080000	;RTR:
WDCR	0x10	0x00000020	;Select SDRAM0_CFG0
WDCR	0x11	0x34000000	;CFG0: enable SDRAM
WDCR	0x11	0x84000000	;CFG0: enable SDRAM
DELAY   100
;
; Setup default vector table
WSPR    0x03f   0x00000000      ;IVPR   vector base at 0x00000000
WSPR    0x190   0x00000100      ;IVOR0  Critical Input
WSPR    0x191   0x00000200      ;IVOR1  Machine Check
WSPR    0x192   0x00000300      ;IVOR2  Data Storage
WSPR    0x193   0x00000400      ;IVOR3  Instruction Storage
WSPR    0x194   0x00000500      ;IVOR4  External Input
WSPR    0x195   0x00000600      ;IVOR5  Alignment
WSPR    0x196   0x00000700      ;IVOR6  Program
WSPR    0x197   0x00000800      ;IVOR7  Reserved
WSPR    0x198   0x00000c00      ;IVOR8  System Call
WSPR    0x199   0x00000a00      ;IVOR9  Reserved
WSPR    0x19a   0x00001000      ;IVOR10 Decrementer
WSPR    0x19b   0x00001010      ;IVOR11 Fixed Interval Timer
WSPR    0x19c   0x00001020      ;IVOR12 Watchdog Timer
WSPR    0x19d   0x00001100      ;IVOR13 Data TLB Error
WSPR    0x19e   0x00001200      ;IVOR14 Instruction TLB Error
WSPR    0x19f   0x00000f00      ;IVOR15 Debug
;
; Clear DBCR1 and DBCR2
WSPR    0x135   0x00000000      ;DBCR1
WSPR    0x136   0x00000000      ;DBCR2


[TARGET]
JTAGCLOCK   0                   ;use 16 MHz JTAG clock
CPUTYPE     440 		;the used target CPU type
SCANMISC    8                   ;IR length is 8 bits for 440GX
WAKEUP      50                  ;wakeup time after reset
BREAKMODE   SOFT      	        ;SOFT or HARD, HARD uses PPC hardware breakpoint
STEPMODE    JTAG                ;JTAG or HWBP, HWBP uses one or two hardware breakpoints
;MMU         XLAT 0xC0000000     ;enable virtual address mode
;PTBASE      0x00000000          ;address where kernel/user stores pointer to page table
;SIO         7 9600              ;TCP port for serial IO
;REGLIST     ALL                 ;select register to transfer to GDB


[HOST]
IP          192.168.1.1
FILE        /tftpboot/yosemite/u-boot.bin
FORMAT      BIN
DUMP        /tftpboot/yosemite/dump.bin
PROMPT      440EP>


[FLASH]
; user flash at 0xff800000, AM29LV033C (4M x 8)
;WORKSPACE   0xFF800000  ;workspace in SRAM for fast programming algorithm
WORKSPACE   0x00100000  ;workspace in SDRAM for fast programming algorithm
CHIPTYPE    AM29BX16    ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16)
CHIPSIZE    0x200000    ;The size of one flash chip in bytes
BUSWIDTH    16          ;The width of the flash memory bus in bits (8 | 16 | 32)
FILE        /tftpboot/yosemite/u-boot.bin
FORMAT      BIN 0xFFF80000
ERASE       0xFFF80000  ;erase sector 4
ERASE       0xFFF90000  ;erase sector 4
ERASE       0xFFFA0000  ;erase sector 4
ERASE       0xFFFB0000  ;erase sector 4
ERASE       0xFFFC0000  ;erase sector 4
ERASE       0xFFFD0000  ;erase sector 5
ERASE       0xFFFE0000  ;erase sector 6
ERASE       0xFFFF0000  ;erase sector 7

[REGS]
IDCR1	0x010	0x011	;SDRAM0_CFGADDR and SDRAM0_CFGDATA
IDCR2	0x012	0x013	;EBC0_CFGADDR   and EBC0_CFGDATA
IDCR3	0x014	0x015	;EBM0_CFGADDR   and EBM0_CFGDATA
IDCR4	0x016	0x017	;PPM0_CFGADDR   and PPM0_CFGDATA
IDCR5	0x00C	0x00D	;CPR0_CFGADDR   and CPR0_CFGDATA
IDCR6	0x00E	0x00F	;SDR0_CFGADDR   and SDR0_CFGDATA
DMM1    0xD0000000      ;PCI        (should map to 2_000_0000)
DMM2    0xE0000000      ;Peripheral (should map to 1_400_0000)
FILE    /tftpboot/BDI2000/reg440gx.def

^ permalink raw reply

* Three-Speed Ethernet support on MPC8560 (TSEC)
From: Nathael PAJANI @ 2005-10-21 16:05 UTC (permalink / raw)
  To: linuxppc-embedded

Kumar Gala wrote:

 >> I will now go on with the Three-Speed Ethernet Controler, and there
 >> actually seem to be no support for it, but maybe I did not look at
 >> the right place?
 >
 >
 > The TSEC has been supported for a long time.  The driver is call
 > gianfar (drivers/net/gianfar*).
 >

OK, I found it, and remembered that at the begining of the port I 
wondered what the "struct platform_device ppc_sys_platform_devices[]" 
was for, now I know. and I'll try this for the FCC3 too.

There is a problem though, which I already had (and fixed) with the 
boot-loader: The gigabit ethernet is not set up correctly: Everything is 
fine with a Gigabit switch, but with a Fast ethernet switch there is no 
communication.
I'll look for this on monday!

Thanks a lot for the help !

^ permalink raw reply

* Re: Three-Speed Ethernet support on MPC8560 (TSEC)
From: Pantelis Antoniou @ 2005-10-21 17:18 UTC (permalink / raw)
  To: linuxppc-embedded; +Cc: Nathael PAJANI
In-Reply-To: <B6774C27-2E9C-4660-8D5C-4EBE5FEF698D@freescale.com>

On Friday 21 October 2005 16:39, Kumar Gala wrote:
> 
> On Oct 21, 2005, at 7:21 AM, Nathael PAJANI wrote:
> 
> > Hi all!
> >
> > I'm working on a port of linux (2.6.13-2) on an Actis-computer board,
> > based on the Freescale MPC8560 Processor.
> >
> > I solved the problems I had with the init process, and I actually have
> > the console (SCC1) and one ethernet controler (FCC3) running.
> >
> > I will now go on with the Three-Speed Ethernet Controler, and there
> > actually seem to be no support for it, but maybe I did not look at the
> > right place?
> 
> The TSEC has been supported for a long time.  The driver is call  
> gianfar (drivers/net/gianfar*).
> 
> > I got another question, about the FCC driver: it uses a "big"  
> > structure
> > "fcc_enet_t" wich seems to be aimed at stats. This is initialised,  
> > but I
> > did not find where this is used. Is it?
> 
> The FCC enet driver has been completely rewritten recently and is in  
> the process of being accepted into the kernel.  Hopefully one of the  
> guys with more knowledge on the details will be able to help you on  
> the specifics.
>

fcc_enet_t is in the CPM parameter area. It is used but the statistics
it provides are not, since we properly update the linux net device stats
manually.
 
> - kumar
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> 

Regards

Pantelis

^ permalink raw reply

* Re: v2.6.13.4 : Bad page state at prep_new_page when booting with quik
From: Marc Zyngier @ 2005-10-21 18:08 UTC (permalink / raw)
  To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <1129869509.6265.32.camel@gaston>

>>>>> "BenH" == Benjamin Herrenschmidt <benh@kernel.crashing.org> writes:

BenH> I'd suggest dumping to 8 or so first words of sysctrl_regs and checking
BenH> what difference is there.

Here you go :

BootX :

*fde69000 = 10000000
*fde69004 = 00000000
*fde69008 = 04000000
*fde6900c = 00000000
*fde69010 = 04101102
*fde69014 = 00000000
*fde69018 = 00000345
*fde6901c = 00000000

Quik:

*fdeff000 = 10000000
*fdeff004 = 00000000
*fdeff008 = 04000000
*fdeff00c = 00000000
*fdeff010 = 04101102
*fdeff014 = 00000000
*fdeff018 = 00000345
*fdeff01c = 00000000

Except for the ioremap address being different, not much to see
here...

BenH> It could be something else tho ... like some problem with
BenH> quik...

I fear that... But even in such a case ,understanding what confuses
the kernel would help a lot...

Thanks for your help,

	M.
-- 
And if you don't know where you're going, any road will take you there...

^ permalink raw reply

* Re: [PATCH][RFT] please use this one
From: Rupert Eibauer @ 2005-10-21 18:43 UTC (permalink / raw)
  To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <B34FF652-6E5D-437D-812C-763B2D10C7CA@freescale.com>

On Friday 21 October 2005 17:23, Kumar Gala wrote:
> 
> On Oct 21, 2005, at 10:11 AM, Rupert Eibauer wrote:
> 
> > On Friday 21 October 2005 16:28, Kumar Gala wrote:
> >
> >> The concept of PPC_HIGH_BATS is already some what handled with
> >> CPU_FTR_HAS_HIGH_BATS.  I recommend you use this feature instead of
> >> introducing another one as well as a compile time option.
> >>
> >
> > CPU_FTR_HAS_HIGH_BATS only clears the high bats, but does
> > not attempt to use them. My patch will use them.
> 
> I understand, I'm suggesting you expand CPU_FTR_HAS_HIGH_BATS to  
> include your additional functionality.

How do you mean that exactly?

Do you mean making the feature always-on (not selectable in Kconfig)?
Having CONFIG_PPC_LARGE_BATS and CONFIG_HIGH_PATS always-on would
be ok for me, but for PHYS_64BIT should be left up to the platform
to decide if it should be presented to the user or not.

Do you think the other two features, CPU_FTR_BIG_PHYS and 
CPU_FTR_LARGE_BATS should be merged into one bit? They could for now, 
because there is no processor supporting only one of them.

Rupert

> 
> - kumar

^ permalink raw reply

* Re: [PATCH][RFT] please use this one
From: Kumar Gala @ 2005-10-21 18:34 UTC (permalink / raw)
  To: Rupert Eibauer; +Cc: linuxppc-dev
In-Reply-To: <200510212043.18615.rupert@ces.ch>


On Oct 21, 2005, at 1:43 PM, Rupert Eibauer wrote:

> On Friday 21 October 2005 17:23, Kumar Gala wrote:
>
>>
>> On Oct 21, 2005, at 10:11 AM, Rupert Eibauer wrote:
>>
>>
>>> On Friday 21 October 2005 16:28, Kumar Gala wrote:
>>>
>>>
>>>> The concept of PPC_HIGH_BATS is already some what handled with
>>>> CPU_FTR_HAS_HIGH_BATS.  I recommend you use this feature instead of
>>>> introducing another one as well as a compile time option.
>>>>
>>>>
>>>
>>> CPU_FTR_HAS_HIGH_BATS only clears the high bats, but does
>>> not attempt to use them. My patch will use them.
>>>
>>
>> I understand, I'm suggesting you expand CPU_FTR_HAS_HIGH_BATS to
>> include your additional functionality.
>>
>
> How do you mean that exactly?
>
> Do you mean making the feature always-on (not selectable in Kconfig)?
> Having CONFIG_PPC_LARGE_BATS and CONFIG_HIGH_PATS always-on would
> be ok for me, but for PHYS_64BIT should be left up to the platform
> to decide if it should be presented to the user or not.

Yes, I think just making support for BATS 4-7 always on and use  
CONFIG_FTR_HAS_HIGH_BATS for any runtime fixup.

> Do you think the other two features, CPU_FTR_BIG_PHYS and
> CPU_FTR_LARGE_BATS should be merged into one bit? They could for now,
> because there is no processor supporting only one of them.

Yes, this should still be a config option.  Merging  
CPU_FTR_LARGE_BATS into CPU_FTR_BIG_PHYS should be ok.

- kumar

^ permalink raw reply

* Re: v2.6.13.4 : Bad page state at prep_new_page when booting with quik
From: Marc Zyngier @ 2005-10-21 18:52 UTC (permalink / raw)
  To: Mark Guertin; +Cc: linuxppc-dev
In-Reply-To: <6337E791-EB1F-47E5-8518-FE0D83987705@macdiscussion.com>

>>>>> "Mark" == Mark Guertin <mguertin@macdiscussion.com> writes:

Mark> Not sure what quick version you are using, but the guys at  
Mark> shiner.info have been hacking on it for a while (including some bug  
Mark> fixes) .. so you might want to try out alternate versions if you  
Mark> haven't already.

Mark> http://shiner.info/?files/Yellow%20Dog%20Linux%204/quik

Hmmm, checking...

maz@strange-fruit:~$ dpkg -l quik
Desired=Unknown/Install/Remove/Purge/Hold
| Status=Not/Installed/Config-files/Unpacked/Failed-config/Half-installed
|/ Err?=(none)/Hold/Reinst-required/X=both-problems (Status,Err: uppercase=bad)
||/ Name           Version        Description
+++-==============-==============-============================================
ii  quik           2.1-6          Bootloader for PowerMac or CHRP systems

Looks like I already have the latest...

Thanks anyway.

	M.
-- 
And if you don't know where you're going, any road will take you there...

^ permalink raw reply

* Re: v2.6.13.4 : Bad page state at prep_new_page when booting with quik
From: Mark Guertin @ 2005-10-21 18:36 UTC (permalink / raw)
  To: maz; +Cc: linuxppc-dev
In-Reply-To: <wrpek6eeo94.fsf@wild-wind.fr.eu.org>

Not sure what quick version you are using, but the guys at  
shiner.info have been hacking on it for a while (including some bug  
fixes) .. so you might want to try out alternate versions if you  
haven't already.

http://shiner.info/?files/Yellow%20Dog%20Linux%204/quik

Mark

On 21-Oct-05, at 2:08 PM, Marc Zyngier wrote:

>>>>>> "BenH" == Benjamin Herrenschmidt <benh@kernel.crashing.org>  
>>>>>> writes:
>>>>>>
>
> BenH> I'd suggest dumping to 8 or so first words of sysctrl_regs  
> and checking
> BenH> what difference is there.
>
> Here you go :
>
> BootX :
>
> *fde69000 = 10000000
> *fde69004 = 00000000
> *fde69008 = 04000000
> *fde6900c = 00000000
> *fde69010 = 04101102
> *fde69014 = 00000000
> *fde69018 = 00000345
> *fde6901c = 00000000
>
> Quik:
>
> *fdeff000 = 10000000
> *fdeff004 = 00000000
> *fdeff008 = 04000000
> *fdeff00c = 00000000
> *fdeff010 = 04101102
> *fdeff014 = 00000000
> *fdeff018 = 00000345
> *fdeff01c = 00000000
>
> Except for the ioremap address being different, not much to see
> here...
>
> BenH> It could be something else tho ... like some problem with
> BenH> quik...
>
> I fear that... But even in such a case ,understanding what confuses
> the kernel would help a lot...
>
> Thanks for your help,
>
>     M.
> -- 
> And if you don't know where you're going, any road will take you  
> there...
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>

^ permalink raw reply

* [PATCH] (revised again) merge types.h
From: Becky Bruce @ 2005-10-21 20:57 UTC (permalink / raw)
  To: linuxppc64-dev, linuxppc-dev

Hopefully, this is the last revision of this patch :)

powerpc: Merge types.h

This patch merges types.h into include/asm-powerpc. At this point, there are 
no significant changes.  On 64-bit, we've picked up a #include of 
linux/config.h. 

This patch has been built on several different 32 and 64-bit platforms,
and booted on mpc8540_ads.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>

---
commit 995fc5087d7f02d7e570c9a904a16453e1d8d307
tree 8326faf3664a5c2912ab28f822d9ab7e84fc8a1b
parent 4746820969c846263fca3f0b54e0c1af883b67ed
author Becky Bruce <becky.bruce@freescale.com> Wed, 19 Oct 2005 11:12:13 -0500
committer Becky Bruce <becky.bruce@freescale.com> Wed, 19 Oct 2005 11:12:13 -0500

 include/asm-powerpc/types.h |  106 +++++++++++++++++++++++++++++++++++++++++++
 include/asm-ppc/types.h     |   69 ------------------------------
 include/asm-ppc64/types.h   |   79 ----------------------------------
 3 files changed, 106 insertions(+), 148 deletions(-)

diff --git a/include/asm-powerpc/types.h b/include/asm-powerpc/types.h
new file mode 100644
--- /dev/null
+++ b/include/asm-powerpc/types.h
@@ -0,0 +1,106 @@
+#ifndef _ASM_POWERPC_TYPES_H
+#define _ASM_POWERPC_TYPES_H
+
+#ifndef __ASSEMBLY__
+
+/*
+ * This file is never included by application software unless
+ * explicitly requested (e.g., via linux/types.h) in which case the
+ * application is Linux specific so (user-) name space pollution is
+ * not a major issue.  However, for interoperability, libraries still
+ * need to be careful to avoid a name clashes.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#ifdef __powerpc64__
+typedef unsigned int umode_t;
+#else
+typedef unsigned short umode_t;
+#endif
+
+/*
+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
+ * header files exported to user space
+ */
+
+typedef __signed__ char __s8;
+typedef unsigned char __u8;
+
+typedef __signed__ short __s16;
+typedef unsigned short __u16;
+
+typedef __signed__ int __s32;
+typedef unsigned int __u32;
+
+#ifdef __powerpc64__
+typedef __signed__ long __s64;
+typedef unsigned long __u64;
+#else
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+typedef __signed__ long long __s64;
+typedef unsigned long long __u64;
+#endif
+#endif /* __powerpc64__ */
+
+typedef struct {
+	__u32 u[4];
+} __attribute((aligned(16))) __vector128;
+
+#endif /* __ASSEMBLY__ */
+
+#ifdef __KERNEL__
+/*
+ * These aren't exported outside the kernel to avoid name space clashes
+ */
+#ifdef __powerpc64__
+#define BITS_PER_LONG 64
+#else
+#define BITS_PER_LONG 32
+#endif
+
+#ifndef __ASSEMBLY__
+
+#include <linux/config.h>
+
+typedef signed char s8;
+typedef unsigned char u8;
+
+typedef signed short s16;
+typedef unsigned short u16;
+
+typedef signed int s32;
+typedef unsigned int u32;
+
+#ifdef __powerpc64__
+typedef signed long s64;
+typedef unsigned long u64;
+#else
+typedef signed long long s64;
+typedef unsigned long long u64;
+#endif
+
+typedef __vector128 vector128;
+
+typedef u32 dma_addr_t;
+typedef u64 dma64_addr_t;
+
+typedef struct {
+	unsigned long entry;
+	unsigned long toc;
+	unsigned long env;
+} func_descr_t;
+
+#ifdef CONFIG_LBD
+typedef u64 sector_t;
+#define HAVE_SECTOR_T
+#endif
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_POWERPC_TYPES_H */
diff --git a/include/asm-ppc/types.h b/include/asm-ppc/types.h
deleted file mode 100644
--- a/include/asm-ppc/types.h
+++ /dev/null
@@ -1,69 +0,0 @@
-#ifndef _PPC_TYPES_H
-#define _PPC_TYPES_H
-
-#ifndef __ASSEMBLY__
-
-typedef __signed__ char __s8;
-typedef unsigned char __u8;
-
-typedef __signed__ short __s16;
-typedef unsigned short __u16;
-
-typedef __signed__ int __s32;
-typedef unsigned int __u32;
-
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
-typedef __signed__ long long __s64;
-typedef unsigned long long __u64;
-#endif
-
-typedef struct {
-	__u32 u[4];
-} __vector128;
-
-/*
- * XXX allowed outside of __KERNEL__ for now, until glibc gets
- * a proper set of asm headers of its own.  -- paulus
- */
-typedef unsigned short umode_t;
-
-#endif /* __ASSEMBLY__ */
-
-#ifdef __KERNEL__
-/*
- * These aren't exported outside the kernel to avoid name space clashes
- */
-#define BITS_PER_LONG 32
-
-#ifndef __ASSEMBLY__
-
-#include <linux/config.h>
-
-typedef signed char s8;
-typedef unsigned char u8;
-
-typedef signed short s16;
-typedef unsigned short u16;
-
-typedef signed int s32;
-typedef unsigned int u32;
-
-typedef signed long long s64;
-typedef unsigned long long u64;
-
-typedef __vector128 vector128;
-
-/* DMA addresses are 32-bits wide */
-typedef u32 dma_addr_t;
-typedef u64 dma64_addr_t;
-
-#ifdef CONFIG_LBD
-typedef u64 sector_t;
-#define HAVE_SECTOR_T
-#endif
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* __KERNEL__ */
-
-#endif
diff --git a/include/asm-ppc64/types.h b/include/asm-ppc64/types.h
deleted file mode 100644
--- a/include/asm-ppc64/types.h
+++ /dev/null
@@ -1,79 +0,0 @@
-#ifndef _PPC64_TYPES_H
-#define _PPC64_TYPES_H
-
-#ifndef __ASSEMBLY__
-
-/*
- * This file is never included by application software unless
- * explicitly requested (e.g., via linux/types.h) in which case the
- * application is Linux specific so (user-) name space pollution is
- * not a major issue.  However, for interoperability, libraries still
- * need to be careful to avoid a name clashes.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-typedef unsigned int umode_t;
-
-/*
- * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
- * header files exported to user space
- */
-
-typedef __signed__ char __s8;
-typedef unsigned char __u8;
-
-typedef __signed__ short __s16;
-typedef unsigned short __u16;
-
-typedef __signed__ int __s32;
-typedef unsigned int __u32;
-
-typedef __signed__ long __s64;
-typedef unsigned long __u64;
-
-typedef struct {
-	__u32 u[4];
-} __attribute((aligned(16))) __vector128;
-
-#endif /* __ASSEMBLY__ */
-
-#ifdef __KERNEL__
-/*
- * These aren't exported outside the kernel to avoid name space clashes
- */
-#define BITS_PER_LONG 64
-
-#ifndef __ASSEMBLY__
-
-typedef signed char s8;
-typedef unsigned char u8;
-
-typedef signed short s16;
-typedef unsigned short u16;
-
-typedef signed int s32;
-typedef unsigned int u32;
-
-typedef signed long s64;
-typedef unsigned long u64;
-
-typedef __vector128 vector128;
-
-typedef u32 dma_addr_t;
-typedef u64 dma64_addr_t;
-
-typedef struct {
-	unsigned long entry;
-	unsigned long toc;
-	unsigned long env;
-} func_descr_t;
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* __KERNEL__ */
-
-#endif /* _PPC64_TYPES_H */

^ permalink raw reply

* [PATCH] powerpc: Fix types.h
From: Becky Bruce @ 2005-10-21 21:16 UTC (permalink / raw)
  To: linuxppc64-dev, linuxppc-dev

Powerpc: Fix types.h

I noticed that Paul had already pulled the version of types.h that
is missing the config.h include into the merge tree - this patch adds 
it back in.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>

---
commit ffaa354bbf9c75b1101167137662ba37bb6cdb02
tree 4b9df364146754813e7425efab1d6ac322ee2abc
parent b30219b583bf29e7f6a1236f07e5727626979d6c
author Becky Bruce <becky.bruce@freescale.com> Fri, 21 Oct 2005 16:11:26 -0500
committer Becky Bruce <becky.bruce@freescale.com> Fri, 21 Oct 2005 16:11:26 -0500

 include/asm-powerpc/types.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/include/asm-powerpc/types.h b/include/asm-powerpc/types.h
--- a/include/asm-powerpc/types.h
+++ b/include/asm-powerpc/types.h
@@ -64,6 +64,8 @@ typedef struct {
 
 #ifndef __ASSEMBLY__
 
+#include <linux/config.h>
+
 typedef signed char s8;
 typedef unsigned char u8;
 

^ permalink raw reply

* Re: v2.6.13.4 : Bad page state at prep_new_page when booting with quik
From: Benjamin Herrenschmidt @ 2005-10-21 22:42 UTC (permalink / raw)
  To: maz; +Cc: linuxppc-dev
In-Reply-To: <wrpek6eeo94.fsf@wild-wind.fr.eu.org>

On Fri, 2005-10-21 at 20:08 +0200, Marc Zyngier wrote:

> I fear that... But even in such a case ,understanding what confuses
> the kernel would help a lot...
> 
> Thanks for your help,

Hrm... another thing you can do is have a look at the init_bandit()
routine. It does:

	/* read the word at offset 0x50 */
	out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + BANDIT_MAGIC);
	udelay(2);
	magic = in_le32(bp->cfg_data);

What is the value of "magic" in both cases ?

As for the rest, well, printing out the various addresses where the
kernel is copied and/or decompresses itself may help...

Have you tried also netbooting directly vmlinux.coff ? (boot enet: might
work on OldWorld OF, you'll need a bootp server) That works with some
oldworlds, not all, depends if they have a working ethernet driver in
OF.

Ben.

^ permalink raw reply

* Re: v2.6.13.4 : Bad page state at prep_new_page when booting with quik
From: Marc Zyngier @ 2005-10-22  8:44 UTC (permalink / raw)
  To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <1129934528.7919.15.camel@gaston>

>>>>> "BenH" == Benjamin Herrenschmidt <benh@kernel.crashing.org> writes:

BenH> Hrm... another thing you can do is have a look at the
BenH> init_bandit() routine. It does:

[...]

BenH> What is the value of "magic" in both cases ?

It says 0x17 in both case...

BenH> As for the rest, well, printing out the various addresses where
BenH> the kernel is copied and/or decompresses itself may help...

Will try that next. I also started diving into quik sources...

One more data point : kernel loaded with quik works just fine on a
7500 with a 604e@200 CPU. So it looks like it is some particular
firmware/hardware combinaison that triggers this failure mode.

BenH> Have you tried also netbooting directly vmlinux.coff ? (boot
BenH> enet: might work on OldWorld OF, you'll need a bootp server)
BenH> That works with some oldworlds, not all, depends if they have a
BenH> working ethernet driver in OF.

Nope. The poor thing doesn't even have an integrated ethernet to start
with (nor its official Apple counterpart)...

Stay tuned ;-)

	M.
-- 
And if you don't know where you're going, any road will take you there...

^ permalink raw reply


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