* Re: [patch 02/10] powerpc: Move CONFIG_PPC64 into CPU selection
From: Paul Mackerras @ 2007-06-12 6:33 UTC (permalink / raw)
To: arnd; +Cc: linuxppc-dev
In-Reply-To: <20070611233353.734704855@arndb.de>
arnd@arndb.de writes:
> Currently, PPC64 is a top level configuration option in
> arch/powerpc/Kconfig, which is somewhat unconventional.
It makes a lot of sense to me to have 32 vs. 64 bits as a high level
binary selector that conditions the things that follow. I don't think
it makes sense to push it down into the CPU selection menu.
Paul.
^ permalink raw reply
* Re: [patch 01/10] powerpc: split out CPU specific options into a new Kconfig file
From: Arnd Bergmann @ 2007-06-12 7:42 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Stephen Rothwell, paulus
In-Reply-To: <20070612140214.1a7dfd9d.sfr@canb.auug.org.au>
On Tuesday 12 June 2007, Stephen Rothwell wrote:
> On Tue, 12 Jun 2007 01:28:25 +0200 arnd@arndb.de wrote:
> >
> > -config VIRT_CPU_ACCOUNTING
> > -=A0=A0=A0=A0=A0bool "Deterministic task and CPU time accounting"
>=20
> I am not sure that this belongs with all the rest.
It's selected by arch/powerpc/platforms/embedded6xx/Kconfig.
How about moving it to arch/powerpc/platforms/Kconfig?
Arnd <><
^ permalink raw reply
* Re: [patch 06/10] powerpc: multiplatformize embedded6xx Kconfig
From: Arnd Bergmann @ 2007-06-12 7:46 UTC (permalink / raw)
To: linuxppc-dev; +Cc: paulus
In-Reply-To: <F72846CE-5742-4413-A2EB-AC1B4080048E@kernel.crashing.org>
On Tuesday 12 June 2007, Kumar Gala wrote:
> > -config EMBEDDED6xx
> > -=A0=A0=A0=A0=A0bool "Embedded 6xx/7xx/7xxx-based board"
> > -=A0=A0=A0=A0=A0depends on PPC32 && (BROKEN||BROKEN_ON_SMP)
> > -
>=20
> Do we know why this was marked BROKEN?
I don't know. As far as I can tell, (BROKEN||BROKEN_ON_SMP) is the
same as simply BROKEN_ON_SMP, which makes the option only show
up when SMP is disabled.
My patch doesn't change that behaviour, I just moved the dependency
down to the individual boards.
Arnd <><
^ permalink raw reply
* Re: [patch 02/10] powerpc: Move CONFIG_PPC64 into CPU selection
From: Arnd Bergmann @ 2007-06-12 8:08 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Mackerras
In-Reply-To: <18030.15937.699275.958545@cargo.ozlabs.ibm.com>
On Tuesday 12 June 2007, Paul Mackerras wrote:
> > Currently, PPC64 is a top level configuration option in
> > arch/powerpc/Kconfig, which is somewhat unconventional.
>=20
> It makes a lot of sense to me to have 32 vs. 64 bits as a high level
> binary selector that conditions the things that follow. =A0I don't think
> it makes sense to push it down into the CPU selection menu.
Can you eleborate, other than stating the exact opposite of what
my comment said?
I don't mind removing this patch from the series, but I'd like to
understand the reason. I've always thought of the top-level option
as a temporary ugly hack that should eventually go away ;-)
Other than subjective feelings, my reasons for this patch were:
* No other architecture I have seen uses bool options in the top-level
menu, so it would be more consistant to move it to the cpu type
selection menu.
* we have six (depending on how you count) PPC CPU families
supported by Linux (4xx, 6xx, 8xx, e200, e500, ppc64), each
of them incompatible with the others, meaning that you can run
common user space but not a common kernel. Having the list in
as the first Kconfig choice seems logical to me, because
all other options more or less depend on these.
* The only major difference between ppc64 and the others is the
object format of the kernel binary. My impression when playing
with the cpu selection menu was that we have a lot more stuff
depending on 6xx than on ppc64.
* Given the choice between the equivalent
> config PPC64
> bool
>
> choice
> depends on !PPC64
> config 4xx
> config 6xx
> config 8xx
> config E200
> config E500
> endchoice
and
> choice
> config PPC64
> config 4xx
> config 6xx
> config 8xx
> config E200
> config E500
> endchoice
I find the latter easier to understand regarding further options
depending on each of them in the individual platforms, e.g. each
of the platforms/foo/Kconfig files depends on exactly one of these
six options.=20
Arnd <><
^ permalink raw reply
* [PATCH 1/5] Add the explanation and sample of RapidIO DTS sector to the document of booting-without-of.txt file.
From: Zhang Wei @ 2007-06-12 9:02 UTC (permalink / raw)
To: mporter; +Cc: linuxppc-dev, paulus, linux-kernel
In-Reply-To: <11816389393593-git-send-email-wei.zhang@freescale.com>
Add the explanation and a sample of RapidIO DTS sector to the document of booting-without-of.txt file.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
---
Documentation/powerpc/booting-without-of.txt | 41 ++++++++++++++++++++++++++
1 files changed, 41 insertions(+), 0 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index b49ce16..359c899 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -1729,6 +1729,47 @@ platforms are moved over to use the flattened-device-tree model.
More devices will be defined as this spec matures.
+ k) RapidIO
+
+ Required properties:
+
+ - device_type : Should be "rapidio"
+ - compatible : Should be "fsl,rapidio-v0.0" or "fsl,rapidio-v1.0"
+ and so on. The version number is got from IP Block Revision
+ Register of RapidIO controller.
+ - #address-cells : Address representation for "rapidio" devices.
+ This field represents the number of cells needed to represent
+ the RapidIO address of the registers. For supporting more than
+ 36-bits RapidIO address, this field should be <2>.
+ See 1) above for more details on defining #address-cells.
+ - reg : Offset and length of the register set for the device
+ - ranges : Should be defined as specified in 1) to describe the
+ translation of addresses for memory mapped RapidIO memory
+ space.
+ - interrupt-parent : the phandle for the interrupt controller that
+ services interrupts for this device.
+ - interrupts : <a b> where a is the interrupt number and b is a
+ field that represents an encoding of the sense and level
+ information for the interrupt. This should be encoded based on
+ the information in section 2) depending on the type of interrupt
+ controller you have. For this sector, interrupts order should be
+ <err_irq bell_outb_irq bell_inb_irq msg1_tx_irq msg1_rx_irq
+ msg2_tx_irq msg2_rx_irq ... msgN_tx_irq msgN_rx_irq>.
+
+ Example:
+
+ srio@c0000{
+ device_type = "rapidio";
+ compatible = "fsl,rapidio-v1.0";
+ #address-cells = <2>;
+ reg = <c0000 20000>;
+ ranges = <0 0 c0000000 20000000>;
+ interrupt-parent = <&mpic>;
+ /* err_irq bell_outb_irq bell_inb_irq msg1_tx_irq msg1_rx_irq
+ msg2_tx_irq msg2_rx_irq */
+ interrupts = <30 2 31 2 32 2 35 2 36 2 37 2 38 2>;
+ };
+
VII - Specifying interrupt information for devices
===================================================
--
1.5.1
^ permalink raw reply related
* [PATCH 2/5] Add RapidIO sector to MPC8641HPCN board dts file.
From: Zhang Wei @ 2007-06-12 9:02 UTC (permalink / raw)
To: mporter; +Cc: linuxppc-dev, paulus, linux-kernel
In-Reply-To: <1181638939310-git-send-email-wei.zhang@freescale.com>
Add RapidIO sector to the MPC8641HPCN board dts file.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
---
arch/powerpc/boot/dts/mpc8641_hpcn.dts | 13 +++++++++++++
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 04626b1..e2ce06e 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -329,6 +329,19 @@
>;
};
+ srio@c0000 {
+ device_type = "rapidio";
+ compatible = "fsl,rapidio-v1.0";
+ #address-cells = <2>;
+ reg = <c0000 20000>;
+ ranges = <0 0 c0000000 20000000>;
+ interrupt-parent = <&mpic>;
+ /* err_irq bell_outb_irq bell_inb_irq
+ msg1_tx_irq msg1_rx_irq
+ msg2_tx_irq msg2_rx_irq */
+ interrupts = <30 2 31 2 32 2 35 2 36 2 37 2 38 2>;
+ };
+
mpic: pic@40000 {
clock-frequency = <0>;
interrupt-controller;
--
1.5.1
^ permalink raw reply related
* [PATCH 4/5] Add RapidIO support to powerpc architecture.
From: Zhang Wei @ 2007-06-12 9:02 UTC (permalink / raw)
To: mporter; +Cc: linuxppc-dev, paulus, linux-kernel
In-Reply-To: <11816389402216-git-send-email-wei.zhang@freescale.com>
This patch adds the RapidIO support to the powerpc architecture.
Some files are moved from ppc. OF-tree and OF-device support are added.
New silicons such as MPC8548, MPC8641 with serial RapidIO controller are all supported.
Memory driver hardware operations are added.
Global mport variables are changed to master port private variables.
Multi master ports are supported.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
---
arch/powerpc/Kconfig | 8 +
arch/powerpc/kernel/Makefile | 1 +
arch/powerpc/kernel/rio.c | 64 ++
arch/powerpc/sysdev/Makefile | 1 +
arch/powerpc/sysdev/fsl_rio.c | 1446 +++++++++++++++++++++++++++++++++++++++++
arch/powerpc/sysdev/fsl_rio.h | 20 +
6 files changed, 1540 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/kernel/rio.c
create mode 100644 arch/powerpc/sysdev/fsl_rio.c
create mode 100644 arch/powerpc/sysdev/fsl_rio.h
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index e683668..a41aaac 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -742,6 +742,14 @@ source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
+config RAPIDIO
+ bool "RapidIO support" if MPC8540 || MPC8560 || MPC8641 || MPC8548
+ help
+ If you say Y here, the kernel will include drivers and
+ infrastructure code to support RapidIO interconnect devices.
+
+source "drivers/rapidio/Kconfig"
+
source "drivers/pci/hotplug/Kconfig"
endmenu
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 3e779f0..9ed2367 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -69,6 +69,7 @@ pci64-$(CONFIG_PPC64) += pci_64.o pci_dn.o
pci32-$(CONFIG_PPC32) := pci_32.o
obj-$(CONFIG_PCI) += $(pci64-y) $(pci32-y)
obj-$(CONFIG_PCI_MSI) += msi.o
+obj-$(CONFIG_RAPIDIO) += rio.o
kexec-$(CONFIG_PPC64) := machine_kexec_64.o
kexec-$(CONFIG_PPC32) := machine_kexec_32.o
obj-$(CONFIG_KEXEC) += machine_kexec.o crash.o $(kexec-y)
diff --git a/arch/powerpc/kernel/rio.c b/arch/powerpc/kernel/rio.c
new file mode 100644
index 0000000..7275c32
--- /dev/null
+++ b/arch/powerpc/kernel/rio.c
@@ -0,0 +1,64 @@
+/*
+ * RapidIO PowerPC support
+ *
+ * Copyright (C) 2007 Freescale Simconductor, Inc. All rights reserved.
+ * Zhang Wei <wei.zhang@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * New RapidIO peer-to-peer network initialize with of-device supoort.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/rio.h>
+
+#include <asm/rio.h>
+#include <asm/of_device.h>
+#include <asm/of_platform.h>
+
+#include <../sysdev/fsl_rio.h>
+
+
+/* The probe function for RapidIO peer-to-peer network.
+ */
+static int __devinit of_rio_rpn_probe(struct of_device *dev,
+ const struct of_device_id *match)
+{
+ int rc;
+ printk(KERN_INFO "Setting up RapidIO peer-to-peer network %s\n",
+ dev->node->full_name);
+
+ rc = fsl_rio_setup(dev);
+ if (rc)
+ goto out;
+
+ /* Enumerate all registered ports */
+ rc = rio_init_mports();
+out:
+ return rc;
+};
+
+static struct of_device_id of_rio_rpn_ids[] = {
+ {
+ .type = "rapidio",
+ },
+ {},
+};
+
+static struct of_platform_driver of_rio_rpn_driver = {
+ .name = "of-rio",
+ .match_table = of_rio_rpn_ids,
+ .probe = of_rio_rpn_probe,
+};
+
+static __init int of_rio_rpn_init(void)
+{
+ return of_register_platform_driver(&of_rio_rpn_driver);
+}
+
+subsys_initcall(of_rio_rpn_init);
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index c3ce0bd..5d6d66b 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_U3_DART) += dart_iommu.o
obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
obj-$(CONFIG_FSL_SOC) += fsl_soc.o
obj-$(CONFIG_FSL_PCIE) += fsl_pcie.o
+obj-$(CONFIG_RAPIDIO) += fsl_rio.o
obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
mv64x60-$(CONFIG_PCI) += mv64x60_pci.o
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
new file mode 100644
index 0000000..6d43068
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -0,0 +1,1446 @@
+/*
+ * PowerPC RapidIO support
+ *
+ * Copyright (C) 2007 Freescale Simconductor, Inc. All rights reserved.
+ * Zhang Wei <wei.zhang@freescale.com>
+ *
+ * Copyright 2005 MontaVista Software, Inc.
+ * Matt Porter <mporter@kernel.crashing.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This file is moved from arch/ppc/ppc85xx_rio.c. And the OF-tree support
+ * is added. New silicons such as MPC8548, MPC8641 are all supported.
+ * Memory driver hardware operations are added.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/dma-mapping.h>
+#include <linux/interrupt.h>
+#include <linux/rio.h>
+#include <linux/rio_drv.h>
+
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
+#include <asm/of_platform.h>
+#include "fsl_soc.h"
+
+/* RapidIO definition irq, which read from OF-tree */
+#define IRQ_RIO_BELL(m) (((struct rio_priv *)(m->priv))->bellirq)
+#define IRQ_RIO_TX(m) (((struct rio_priv *)(m->priv))->txirq)
+#define IRQ_RIO_RX(m) (((struct rio_priv *)(m->priv))->rxirq)
+
+#define ERR(fmt, arg...) \
+ printk(KERN_ERR "RIO %s: " fmt, __FUNCTION__, ## arg)
+#define INFO(fmt...) printk(KERN_INFO "RIO: " fmt)
+#define IS_64BIT_RES ((sizeof(resource_size_t) == 8) ? 1 : 0)
+
+#define RIO_ATMU_REGS_OFFSET 0x10c00
+#define RIO_P_MSG_REGS_OFFSET 0x11000
+#define RIO_S_MSG_REGS_OFFSET 0x13000
+#define RIO_ESCSR 0x158
+#define RIO_CCSR 0x15c
+#define RIO_ISR_AACR 0x10120
+#define RIO_ISR_AACR_AA 0x1 /* Accept All ID */
+#define RIO_MAINT_WIN_SIZE 0x400000
+#define RIO_DBELL_WIN_SIZE 0x1000
+#define RIO_MAX_INB_ATMU 4
+#define RIO_MAX_OUTB_ATMU 8
+#define RIO_INB_ATMU_REGS_OFFSET 0x10de0
+#define RIO_ATMU_EN_MASK 0x80000000
+
+#define RIO_NREAD 0x4
+#define RIO_NWRITE 0x4
+#define RIO_NWRITE_R 0x5
+#define RIO_NREAD_R 0x5
+
+#define RIO_MSG_OMR_MUI 0x00000002
+#define RIO_MSG_OSR_TE 0x00000080
+#define RIO_MSG_OSR_QOI 0x00000020
+#define RIO_MSG_OSR_QFI 0x00000010
+#define RIO_MSG_OSR_MUB 0x00000004
+#define RIO_MSG_OSR_EOMI 0x00000002
+#define RIO_MSG_OSR_QEI 0x00000001
+
+#define RIO_MSG_IMR_MI 0x00000002
+#define RIO_MSG_ISR_TE 0x00000080
+#define RIO_MSG_ISR_QFI 0x00000010
+#define RIO_MSG_ISR_DIQI 0x00000001
+
+#define RIO_MSG_DESC_SIZE 32
+#define RIO_MSG_BUFFER_SIZE 4096
+#define RIO_MIN_TX_RING_SIZE 2
+#define RIO_MAX_TX_RING_SIZE 2048
+#define RIO_MIN_RX_RING_SIZE 2
+#define RIO_MAX_RX_RING_SIZE 2048
+
+#define DOORBELL_DMR_DI 0x00000002
+#define DOORBELL_DSR_TE 0x00000080
+#define DOORBELL_DSR_QFI 0x00000010
+#define DOORBELL_DSR_DIQI 0x00000001
+#define DOORBELL_TID_OFFSET 0x02
+#define DOORBELL_SID_OFFSET 0x04
+#define DOORBELL_INFO_OFFSET 0x06
+
+#define DOORBELL_MESSAGE_SIZE 0x08
+#define DBELL_SID(x) (*(u16 *)(x + DOORBELL_SID_OFFSET))
+#define DBELL_TID(x) (*(u16 *)(x + DOORBELL_TID_OFFSET))
+#define DBELL_INF(x) (*(u16 *)(x + DOORBELL_INFO_OFFSET))
+
+struct rio_atmu_regs {
+ u32 rowtar;
+ u32 rowtear;
+ u32 rowbar;
+ u32 pad2;
+ u32 rowar;
+ u32 pad3[3];
+};
+
+struct rio_inb_atmu_regs {
+ u32 riwtar;
+ u32 pad1;
+ u32 riwbar;
+ u32 pad2;
+ u32 riwar;
+ u32 pad3[3];
+};
+
+struct rio_msg_regs {
+ u32 omr;
+ u32 osr;
+ u32 pad1;
+ u32 odqdpar;
+ u32 pad2;
+ u32 osar;
+ u32 odpr;
+ u32 odatr;
+ u32 odcr;
+ u32 pad3;
+ u32 odqepar;
+ u32 pad4[13];
+ u32 imr;
+ u32 isr;
+ u32 pad5;
+ u32 ifqdpar;
+ u32 pad6;
+ u32 ifqepar;
+ u32 pad7[226];
+ u32 odmr;
+ u32 odsr;
+ u32 res0[4];
+ u32 oddpr;
+ u32 oddatr;
+ u32 res1[3];
+ u32 odretcr;
+ u32 res2[12];
+ u32 dmr;
+ u32 dsr;
+ u32 pad8;
+ u32 dqdpar;
+ u32 pad9;
+ u32 dqepar;
+ u32 pad10[26];
+ u32 pwmr;
+ u32 pwsr;
+ u32 pad11;
+ u32 pwqbar;
+};
+
+struct rio_tx_desc {
+ u32 res1;
+ u32 saddr;
+ u32 dport;
+ u32 dattr;
+ u32 res2;
+ u32 res3;
+ u32 dwcnt;
+ u32 res4;
+};
+
+struct rio_dbell_ring {
+ void *virt;
+ dma_addr_t phys;
+};
+
+struct rio_msg_tx_ring {
+ void *virt;
+ dma_addr_t phys;
+ void *virt_buffer[RIO_MAX_TX_RING_SIZE];
+ dma_addr_t phys_buffer[RIO_MAX_TX_RING_SIZE];
+ int tx_slot;
+ int size;
+ void *dev_id;
+};
+
+struct rio_msg_rx_ring {
+ void *virt;
+ dma_addr_t phys;
+ void *virt_buffer[RIO_MAX_RX_RING_SIZE];
+ int rx_slot;
+ int size;
+ void *dev_id;
+};
+
+struct rio_priv {
+ void __iomem *regs_win;
+ struct rio_atmu_regs __iomem *atmu_regs;
+ struct rio_atmu_regs __iomem *maint_atmu_regs;
+ struct rio_atmu_regs __iomem *dbell_atmu_regs;
+ void __iomem *dbell_win;
+ void __iomem *maint_win;
+ struct rio_msg_regs __iomem *msg_regs;
+ struct rio_dbell_ring dbell_ring;
+ struct rio_msg_tx_ring msg_tx_ring;
+ struct rio_msg_rx_ring msg_rx_ring;
+ int bellirq;
+ int txirq;
+ int rxirq;
+};
+
+/**
+ * fsl_rio_doorbell_send - Send a PowerPC doorbell message
+ * @index: ID of RapidIO interface
+ * @destid: Destination ID of target device
+ * @data: 16-bit info field of RapidIO doorbell message
+ *
+ * Sends a PowerPC doorbell message. Returns %0 on success or
+ * %-EINVAL on failure.
+ */
+static int fsl_rio_doorbell_send(struct rio_mport *mport, int index, u16 destid, u16 data)
+{
+ struct rio_priv *priv = mport->priv;
+ pr_debug("fsl_doorbell_send: index %d destid 0x%04x data 0x%04x\n",
+ index, destid, data);
+
+ switch (mport->phy_type) {
+ case RIO_PHY_SERIAL:
+ /* In the later version silicons, such as MPC8548, MPC8641,
+ * below operations is must be.
+ */
+ out_be32(&priv->msg_regs->odmr, 0x00000000);
+ out_be32(&priv->msg_regs->odretcr, 0x00000004);
+ out_be32(&priv->msg_regs->oddpr, destid << 16);
+ out_be32(&priv->msg_regs->oddatr,data );
+ out_be32(&priv->msg_regs->odmr, 0x00000001);
+ break;
+ case RIO_PHY_PARALLEL:
+ out_be32(&priv->dbell_atmu_regs->rowtar, destid << 22);
+ out_be16(priv->dbell_win, data);
+ break;
+ }
+
+ return 0;
+}
+
+/**
+ * fsl_local_config_read - Generate a PowerPC local config space read
+ * @index: ID of RapdiIO interface
+ * @offset: Offset into configuration space
+ * @len: Length (in bytes) of the maintenance transaction
+ * @data: Value to be read into
+ *
+ * Generates a PowerPC local configuration space read. Returns %0 on
+ * success or %-EINVAL on failure.
+ */
+static int fsl_local_config_read(struct rio_mport *mport, int index, u32 offset, int len, u32 * data)
+{
+ struct rio_priv *priv = mport->priv;
+ pr_debug("fsl_local_config_read: index %d offset 0x%08x\n", index,
+ offset);
+ *data = in_be32(priv->regs_win + offset);
+
+ return 0;
+}
+
+/**
+ * fsl_local_config_write - Generate a PowerPC local config space write
+ * @index: ID of RapdiIO interface
+ * @offset: Offset into configuration space
+ * @len: Length (in bytes) of the maintenance transaction
+ * @data: Value to be written
+ *
+ * Generates a PowerPC local configuration space write. Returns %0 on
+ * success or %-EINVAL on failure.
+ */
+static int fsl_local_config_write(struct rio_mport *mport, int index, u32 offset, int len, u32 data)
+{
+ struct rio_priv *priv = mport->priv;
+ pr_debug("fsl_local_config_write: index %d offset 0x%08x data 0x%08x\n",
+ index, offset, data);
+ out_be32(priv->regs_win + offset, data);
+
+ return 0;
+}
+
+/**
+ * fsl_rio_config_read - Generate a PowerPC read maintenance transaction
+ * @index: ID of RapdiIO interface
+ * @destid: Destination ID of transaction
+ * @hopcount: Number of hops to target device
+ * @offset: Offset into configuration space
+ * @len: Length (in bytes) of the maintenance transaction
+ * @val: Location to be read into
+ *
+ * Generates a PowerPC read maintenance transaction. Returns %0 on
+ * success or %-EINVAL on failure.
+ */
+static int fsl_rio_config_read(struct rio_mport *mport, int index, u16 destid,
+ u8 hopcount, u32 offset, int len, u32 * val)
+{
+ void *data;
+ struct rio_priv *priv = mport->priv;
+
+ pr_debug("fsl_rio_config_read: index %d destid %d hopcount %d "
+ "offset 0x%08x len %d\n",
+ index, destid, hopcount, offset, len);
+ out_be32(&priv->maint_atmu_regs->rowtar,
+ ((destid & 0x3ff) << 22) | (hopcount << 12)
+ | ((offset & ~0x3) >> 9));
+ out_be32(&priv->maint_atmu_regs->rowtear, (destid & 0xfc00) >> 10);
+
+ data = priv->maint_win + offset;
+ switch (len) {
+ case 1:
+ *val = in_8(data);
+ break;
+ case 2:
+ *val = in_be16(data);
+ break;
+ default:
+ *val = in_be32(data);
+ break;
+ }
+
+ return 0;
+}
+
+/**
+ * fsl_rio_config_write - Generate a PowerPC write maintenance transaction
+ * @index: ID of RapdiIO interface
+ * @destid: Destination ID of transaction
+ * @hopcount: Number of hops to target device
+ * @offset: Offset into configuration space
+ * @len: Length (in bytes) of the maintenance transaction
+ * @val: Value to be written
+ *
+ * Generates an PowerPC write maintenance transaction. Returns %0 on
+ * success or %-EINVAL on failure.
+ */
+static int fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid,
+ u8 hopcount, u32 offset, int len, u32 val)
+{
+ void *data;
+ struct rio_priv *priv = mport->priv;
+ pr_debug("fsl_rio_config_write: index %d destid %d hopcount %d"
+ "offset 0x%08x len %d val 0x%08x\n",
+ index, destid, hopcount, offset, len, val);
+ out_be32(&priv->maint_atmu_regs->rowtar,
+ ((destid & 0x3ff) << 22) | (hopcount << 12)
+ | ((offset & ~0x3) >> 9));
+ out_be32(&priv->maint_atmu_regs->rowtear, (destid & 0xfc00) >> 10);
+
+ data = priv->maint_win + offset;
+ switch (len) {
+ case 1:
+ out_8(data, val);
+ break;
+ case 2:
+ out_be16(data, val);
+ break;
+ default:
+ out_be32(data, val);
+ break;
+ }
+
+ return 0;
+}
+
+/**
+ * fsl_rio_map_inb_mem -- Mapping inbound memory region.
+ * @lstart: Local memory space start address.
+ * @rstart: RapidIO space start address.
+ * @size: The mapping region size.
+ * @flags: Flags for mapping.
+ *
+ * Return: 0 -- Success.
+ *
+ * This function will create the inbound mapping
+ * from rstart to lstart.
+ */
+static int fsl_rio_map_inb_mem(struct rio_mport *mport, resource_size_t lstart,
+ resource_size_t rstart, resource_size_t size,
+ u32 flags)
+{
+ int i;
+ struct rio_priv *priv = mport->priv;
+ volatile struct rio_inb_atmu_regs __iomem *inbatmu =
+ (struct rio_inb_atmu_regs *)
+ (priv->regs_win + RIO_INB_ATMU_REGS_OFFSET) - 1;
+ int size_ffs;
+ resource_size_t align;
+
+ align = (size < 0x1000) ? 0x1000 : 1 << (__ilog2(size - 1) + 1);
+
+ /* Align the size */
+ if ((lstart + size) > (_ALIGN_DOWN(lstart, align) + align)) {
+ size_ffs = __ffs(_ALIGN_DOWN(lstart + size - 1, align));
+ size = 1 << (size_ffs + (((_ALIGN_DOWN(lstart, 1 << size_ffs) +
+ (1 << size_ffs)) < (lstart + size)) ? 1 : 0));
+ } else
+ size = align;
+
+ if ((lstart & (size - 1)) != (rstart & (size - 1))) {
+ ERR("The local address 0x%x can not be aligned to the same size"
+ " 0x%x with the RapidIO space address 0x%x!\n", lstart,
+ size, rstart);
+ return -EINVAL;
+ }
+
+ /* Search for free inbound ATMU */
+ for (i = 1;
+ (i <= RIO_MAX_INB_ATMU) && (inbatmu->riwar & RIO_ATMU_EN_MASK);
+ i++, inbatmu--)
+ ;
+
+ if (i > RIO_MAX_INB_ATMU) {
+ ERR("No free inbound ATMU!\n");
+ return -EBUSY;
+ }
+ out_be32(&inbatmu->riwtar, ((IS_64BIT_RES ? (lstart >> 32)
+ & 0xf : 0) << 20) | ((lstart >> 12) & 0xfffff));
+ out_be32(&inbatmu->riwbar, ((IS_64BIT_RES ? (rstart >> 32)
+ & 0x3 : 0) << 20) | ((rstart >> 12) & 0xfffff));
+ out_be32(&inbatmu->riwar, 0x80000000 | (0xf << 20)
+ | (RIO_NREAD_R << 16) | (RIO_NWRITE_R << 12)
+ | (__ilog2(size) - 1));
+ return 0;
+}
+
+/**
+ * fsl_rio_map_outb_mem -- Mapping outbound memory region.
+ * @lstart: Local memory space start address.
+ * @rstart: RapidIO space start address.
+ * @size: The mapping region size.
+ * @tid: The target RapidIO device id.
+ * @flags: Flags for mapping.
+ *
+ * Return: 0 -- Success.
+ *
+ * This function will create the outbound mapping
+ * from lstart to rstart.
+ */
+static int fsl_rio_map_outb_mem(struct rio_mport *mport, resource_size_t lstart,
+ resource_size_t rstart, resource_size_t size,
+ u16 tid, u32 flags)
+{
+ int i;
+ struct rio_priv *priv = mport->priv;
+ volatile struct rio_atmu_regs __iomem *outbatmu =
+ (struct rio_atmu_regs *)
+ (priv->regs_win + RIO_ATMU_REGS_OFFSET) + 1;
+ int size_ffs;
+ resource_size_t align;
+
+ align = (size < 0x1000) ? 0x1000 : 1 << (__ilog2(size - 1) + 1);
+
+ /* Align the size */
+ if ((lstart + size) > (_ALIGN_DOWN(lstart, align) + align)) {
+ size_ffs = __ffs(_ALIGN_DOWN(lstart + size - 1, align));
+ size = 1 << (size_ffs + (((_ALIGN_DOWN(lstart, 1 << size_ffs) +
+ (1 << size_ffs)) < (lstart + size)) ? 1 : 0));
+ } else
+ size = align;
+
+ if ((lstart & (size - 1)) != (rstart & (size - 1))) {
+ ERR("The local address 0x%x can not be aligned to the same size"
+ " 0x%x with the RapidIO space address 0x%x!\n", lstart,
+ size, rstart);
+ return -EINVAL;
+ }
+
+ /* Search for free outbound ATMU */
+ for (i = 1;
+ (i <= RIO_MAX_OUTB_ATMU) && (outbatmu->rowar & RIO_ATMU_EN_MASK);
+ i++, outbatmu++)
+ ;
+
+ if (i > RIO_MAX_OUTB_ATMU) {
+ ERR("No free outbound ATMU!\n");
+ return -EBUSY;
+ }
+ out_be32(&outbatmu->rowtar, ((tid & 0x3ff) << 22)
+ | ((IS_64BIT_RES ? (rstart >> 32) & 0x3 : 0) << 20)
+ | ((rstart >> 12) & 0xfffff));
+ if (mport->phy_type == RIO_PHY_SERIAL)
+ out_be32(&outbatmu->rowtear, tid >> 10);
+ out_be32(&outbatmu->rowbar, ((IS_64BIT_RES ?
+ (lstart >> 32) & 0xf : 0) << 20)
+ | ((lstart >> 12) & 0xfffff));
+ out_be32(&outbatmu->rowar, 0x80000000 | (RIO_NREAD << 16)
+ | (RIO_NWRITE_R << 12) | (__ilog2(size) - 1));
+ return 0;
+}
+
+/**
+ * fsl_rio_unmap_inb_mem -- Unmapping inbound memory region.
+ * @lstart: Local memory space start address.
+ */
+static void fsl_rio_unmap_inb_mem(struct rio_mport *mport, resource_size_t lstart)
+{
+ int i;
+ struct rio_priv *priv = mport->priv;
+ struct rio_inb_atmu_regs __iomem *inbatmu = (struct rio_inb_atmu_regs *)
+ (priv->regs_win + RIO_INB_ATMU_REGS_OFFSET) - 1;
+
+ /* Search for inbound ATMU */
+ for (i = 1; i <= RIO_MAX_INB_ATMU ; i++, inbatmu--) {
+ u32 tar = ((IS_64BIT_RES ? (lstart >> 32) & 0xf : 0) << 20)
+ | ((lstart >> 12) & 0xfffff);
+ if (inbatmu->riwtar == tar) {
+ out_be32(&inbatmu->riwar, ~(RIO_ATMU_EN_MASK));
+ return;
+ }
+ }
+}
+
+/**
+ * fsl_rio_unmap_inb_mem -- Unmapping outbound memory region.
+ * @lstart: Local memory space start address.
+ */
+static void fsl_rio_unmap_outb_mem(struct rio_mport *mport, resource_size_t lstart)
+{
+ int i;
+ struct rio_priv *priv = mport->priv;
+ struct rio_atmu_regs __iomem *outbatmu = (struct rio_atmu_regs *)
+ (priv->regs_win + RIO_ATMU_REGS_OFFSET) + 1;
+
+ /* Search for outbound ATMU */
+ for (i = 1; i <= RIO_MAX_OUTB_ATMU ; i++, outbatmu++) {
+ u32 bar = ((IS_64BIT_RES ? (lstart >> 32) & 0xf : 0) << 20)
+ | ((lstart >> 12) & 0xfffff);
+ if (outbatmu->rowbar == bar) {
+ out_be32(&outbatmu->rowar, ~(RIO_ATMU_EN_MASK));
+ return;
+ }
+ }
+}
+
+/**
+ * rio_hw_add_outb_message - Add message to the PowerPC outbound message queue
+ * @mport: Master port with outbound message queue
+ * @rdev: Target of outbound message
+ * @mbox: Outbound mailbox
+ * @buffer: Message to add to outbound queue
+ * @len: Length of message
+ *
+ * Adds the @buffer message to the PowerPC outbound message queue. Returns
+ * %0 on success or %-EINVAL on failure.
+ */
+int rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev,
+ int mbox, void *buffer, size_t len)
+{
+ struct rio_priv *priv = mport->priv;
+ struct rio_tx_desc *desc =
+ (struct rio_tx_desc *)priv->msg_tx_ring.virt + priv->msg_tx_ring.tx_slot;
+ int ret = 0;
+
+ pr_debug("RIO: rio_hw_add_outb_message(): "
+ "destid 0x%04x mbox %d buffer %p len 0x%08x\n",
+ rdev->destid, mbox, buffer, len);
+
+ if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) {
+ ret = -EINVAL;
+ goto out;
+ }
+
+ /* Copy and clear rest of buffer */
+ memcpy(priv->msg_tx_ring.virt_buffer[priv->msg_tx_ring.tx_slot], buffer, len);
+ if (len < (RIO_MAX_MSG_SIZE - 4))
+ memset(priv->msg_tx_ring.virt_buffer[priv->msg_tx_ring.tx_slot]
+ + len, 0, RIO_MAX_MSG_SIZE - len);
+
+ switch(mport->phy_type) {
+ case RIO_PHY_SERIAL:
+ /* Set mbox field for message, and set destid */
+ desc->dport = (rdev->destid << 16) | ( mbox & 0x3);
+
+ /* Enable EOMI interrupt and priority */
+ desc->dattr = 0x28000000;
+
+ /* Set mbox field for message */
+ desc->dport = mbox & 0x3;
+ break;
+ case RIO_PHY_PARALLEL:
+ /* Enable EOMI interrupt, set priority, and set destid */
+ desc->dattr = 0x28000000 | (rdev->destid << 2);
+ break;
+ }
+
+ /* Set transfer size aligned to next power of 2 (in double words) */
+ desc->dwcnt = is_power_of_2(len) ? len : 1 << get_bitmask_order(len);
+
+ /* Set snooping and source buffer address */
+ desc->saddr = 0x00000004 | priv->msg_tx_ring.phys_buffer[priv->msg_tx_ring.tx_slot];
+
+ /* Increment enqueue pointer */
+ setbits32(&priv->msg_regs->omr, RIO_MSG_OMR_MUI);
+
+ /* Go to next descriptor */
+ if (++priv->msg_tx_ring.tx_slot == priv->msg_tx_ring.size)
+ priv->msg_tx_ring.tx_slot = 0;
+
+ out:
+ return ret;
+}
+
+EXPORT_SYMBOL_GPL(rio_hw_add_outb_message);
+
+/**
+ * fsl_rio_tx_handler - PowerPC outbound message interrupt handler
+ * @irq: Linux interrupt number
+ * @dev_instance: Pointer to interrupt-specific data
+ *
+ * Handles outbound message interrupts. Executes a register outbound
+ * mailbox event handler and acks the interrupt occurence.
+ */
+static irqreturn_t fsl_rio_tx_handler(int irq, void *dev_instance)
+{
+ int osr;
+ struct rio_mport *port = (struct rio_mport *)dev_instance;
+ struct rio_priv *priv = port->priv;
+
+ osr = in_be32(&priv->msg_regs->osr);
+
+ if (unlikely(osr & RIO_MSG_OSR_TE)) {
+ pr_info("RIO: outbound message transmission error\n");
+ out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_TE);
+ goto out;
+ }
+
+ if (unlikely(osr & RIO_MSG_OSR_QOI)) {
+ pr_info("RIO: outbound message queue overflow\n");
+ out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_QOI);
+ goto out;
+ }
+
+ if (osr & RIO_MSG_OSR_EOMI) {
+ u32 dqp = in_be32(&priv->msg_regs->odqdpar);
+ int slot = (dqp - priv->msg_tx_ring.phys) >> 5;
+ port->outb_msg[0].mcback(port, priv->msg_tx_ring.dev_id, -1, slot);
+
+ /* Ack the end-of-message interrupt */
+ out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_EOMI);
+ }
+
+ out:
+ return IRQ_HANDLED;
+}
+
+/**
+ * rio_open_outb_mbox - Initialize PowerPC outbound mailbox
+ * @mport: Master port implementing the outbound message unit
+ * @dev_id: Device specific pointer to pass on event
+ * @mbox: Mailbox to open
+ * @entries: Number of entries in the outbound mailbox ring
+ *
+ * Initializes buffer ring, request the outbound message interrupt,
+ * and enables the outbound message unit. Returns %0 on success and
+ * %-EINVAL or %-ENOMEM on failure.
+ */
+int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
+{
+ int i, j, rc = 0;
+ struct rio_priv *priv = mport->priv;
+
+ if ((entries < RIO_MIN_TX_RING_SIZE) ||
+ (entries > RIO_MAX_TX_RING_SIZE) || (!is_power_of_2(entries))) {
+ rc = -EINVAL;
+ goto out;
+ }
+
+ /* Initialize shadow copy ring */
+ priv->msg_tx_ring.dev_id = dev_id;
+ priv->msg_tx_ring.size = entries;
+
+ for (i = 0; i < priv->msg_tx_ring.size; i++) {
+ priv->msg_tx_ring.virt_buffer[i] =
+ dma_alloc_coherent(NULL, RIO_MSG_BUFFER_SIZE,
+ &priv->msg_tx_ring.phys_buffer[i],
+ GFP_KERNEL);
+ if (!priv->msg_tx_ring.virt_buffer[i]) {
+ rc = -ENOMEM;
+ for (j = 0; j < priv->msg_tx_ring.size; j++)
+ if (priv->msg_tx_ring.virt_buffer[j])
+ dma_free_coherent(NULL,
+ RIO_MSG_BUFFER_SIZE,
+ priv->msg_tx_ring.
+ virt_buffer[j],
+ priv->msg_tx_ring.
+ phys_buffer[j]);
+ goto out;
+ }
+ }
+
+ /* Initialize outbound message descriptor ring */
+ priv->msg_tx_ring.virt = dma_alloc_coherent(NULL,
+ priv->msg_tx_ring.size *
+ RIO_MSG_DESC_SIZE,
+ &priv->msg_tx_ring.phys,
+ GFP_KERNEL);
+ if (!priv->msg_tx_ring.virt) {
+ rc = -ENOMEM;
+ goto out_dma;
+ }
+ priv->msg_tx_ring.tx_slot = 0;
+
+ /* Point dequeue/enqueue pointers at first entry in ring */
+ out_be32(&priv->msg_regs->odqdpar, priv->msg_tx_ring.phys);
+ out_be32(&priv->msg_regs->odqepar, priv->msg_tx_ring.phys);
+
+ /* Configure for snooping */
+ out_be32(&priv->msg_regs->osar, 0x00000004);
+
+ /* Clear interrupt status */
+ out_be32(&priv->msg_regs->osr, 0x000000b3);
+
+ /* Hook up outbound message handler */
+ rc = request_irq(IRQ_RIO_TX(mport), fsl_rio_tx_handler, 0, "msg_tx",
+ mport);
+ if (rc < 0)
+ goto out_irq;
+
+ /*
+ * Configure outbound message unit
+ * Snooping
+ * Interrupts (all enabled, except QEIE)
+ * Chaining mode
+ * Disable
+ */
+ out_be32(&priv->msg_regs->omr, 0x00100220);
+
+ /* Set number of entries */
+ setbits32(&priv->msg_regs->omr,
+ ((get_bitmask_order(entries) - 2) << 12));
+
+ /* Now enable the unit */
+ setbits32(&priv->msg_regs->omr, 0x1);
+
+ out:
+ return rc;
+
+ out_irq:
+ dma_free_coherent(NULL, priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE,
+ priv->msg_tx_ring.virt, priv->msg_tx_ring.phys);
+
+ out_dma:
+ for (i = 0; i < priv->msg_tx_ring.size; i++)
+ dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
+ priv->msg_tx_ring.virt_buffer[i],
+ priv->msg_tx_ring.phys_buffer[i]);
+
+ return rc;
+}
+
+/**
+ * rio_close_outb_mbox - Shut down PowerPC outbound mailbox
+ * @mport: Master port implementing the outbound message unit
+ * @mbox: Mailbox to close
+ *
+ * Disables the outbound message unit, free all buffers, and
+ * frees the outbound message interrupt.
+ */
+void rio_close_outb_mbox(struct rio_mport *mport, int mbox)
+{
+ struct rio_priv *priv = mport->priv;
+ /* Disable inbound message unit */
+ out_be32(&priv->msg_regs->omr, 0);
+
+ /* Free ring */
+ dma_free_coherent(NULL, priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE,
+ priv->msg_tx_ring.virt, priv->msg_tx_ring.phys);
+
+ /* Free interrupt */
+ free_irq(IRQ_RIO_TX(mport), mport);
+}
+
+/**
+ * fsl_rio_rx_handler - PowerPC inbound message interrupt handler
+ * @irq: Linux interrupt number
+ * @dev_instance: Pointer to interrupt-specific data
+ *
+ * Handles inbound message interrupts. Executes a registered inbound
+ * mailbox event handler and acks the interrupt occurence.
+ */
+static irqreturn_t fsl_rio_rx_handler(int irq, void *dev_instance)
+{
+ int isr;
+ struct rio_mport *port = (struct rio_mport *)dev_instance;
+ struct rio_priv *priv = port->priv;
+
+ isr = in_be32(&priv->msg_regs->isr);
+
+ if (unlikely(isr & RIO_MSG_ISR_TE)) {
+ pr_info("RIO: inbound message reception error\n");
+ out_be32(&priv->msg_regs->isr, RIO_MSG_ISR_TE);
+ goto out;
+ }
+
+ /* XXX Need to check/dispatch until queue empty */
+ if (isr & RIO_MSG_ISR_DIQI) {
+ /*
+ * We implement *only* mailbox 0, but can receive messages
+ * for any mailbox/letter to that mailbox destination. So,
+ * make the callback with an unknown/invalid mailbox number
+ * argument.
+ */
+ port->inb_msg[0].mcback(port, priv->msg_rx_ring.dev_id, -1, -1);
+
+ /* Ack the queueing interrupt */
+ out_be32(&priv->msg_regs->isr, RIO_MSG_ISR_DIQI);
+ }
+
+ out:
+ return IRQ_HANDLED;
+}
+
+/**
+ * rio_open_inb_mbox - Initialize PowerPC inbound mailbox
+ * @mport: Master port implementing the inbound message unit
+ * @dev_id: Device specific pointer to pass on event
+ * @mbox: Mailbox to open
+ * @entries: Number of entries in the inbound mailbox ring
+ *
+ * Initializes buffer ring, request the inbound message interrupt,
+ * and enables the inbound message unit. Returns %0 on success
+ * and %-EINVAL or %-ENOMEM on failure.
+ */
+int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
+{
+ int i, rc = 0;
+ struct rio_priv *priv = mport->priv;
+
+ if ((entries < RIO_MIN_RX_RING_SIZE) ||
+ (entries > RIO_MAX_RX_RING_SIZE) || (!is_power_of_2(entries))) {
+ rc = -EINVAL;
+ goto out;
+ }
+
+ /* Initialize client buffer ring */
+ priv->msg_rx_ring.dev_id = dev_id;
+ priv->msg_rx_ring.size = entries;
+ priv->msg_rx_ring.rx_slot = 0;
+ for (i = 0; i < priv->msg_rx_ring.size; i++)
+ priv->msg_rx_ring.virt_buffer[i] = NULL;
+
+ /* Initialize inbound message ring */
+ priv->msg_rx_ring.virt = dma_alloc_coherent(NULL,
+ priv->msg_rx_ring.size *
+ RIO_MAX_MSG_SIZE,
+ &priv->msg_rx_ring.phys,
+ GFP_KERNEL);
+ if (!priv->msg_rx_ring.virt) {
+ rc = -ENOMEM;
+ goto out;
+ }
+
+ /* Point dequeue/enqueue pointers at first entry in ring */
+ out_be32(&priv->msg_regs->ifqdpar, (u32) priv->msg_rx_ring.phys);
+ out_be32(&priv->msg_regs->ifqepar, (u32) priv->msg_rx_ring.phys);
+
+ /* Clear interrupt status */
+ out_be32(&priv->msg_regs->isr, 0x00000091);
+
+ /* Hook up inbound message handler */
+ rc = request_irq(IRQ_RIO_RX(mport), fsl_rio_rx_handler, 0,
+ "msg_rx", mport);
+ if (rc < 0) {
+ dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
+ priv->msg_tx_ring.virt_buffer[i],
+ priv->msg_tx_ring.phys_buffer[i]);
+ goto out;
+ }
+
+ /*
+ * Configure inbound message unit:
+ * Snooping
+ * 4KB max message size
+ * Unmask all interrupt sources
+ * Disable
+ */
+ out_be32(&priv->msg_regs->imr, 0x001b0060);
+
+ /* Set number of queue entries */
+ setbits32(&priv->msg_regs->imr,
+ ((get_bitmask_order(entries) - 2) << 12));
+
+ /* Now enable the unit */
+ setbits32(&priv->msg_regs->imr, 0x1);
+
+ out:
+ return rc;
+}
+
+/**
+ * rio_close_inb_mbox - Shut down PowerPC inbound mailbox
+ * @mport: Master port implementing the inbound message unit
+ * @mbox: Mailbox to close
+ *
+ * Disables the inbound message unit, free all buffers, and
+ * frees the inbound message interrupt.
+ */
+void rio_close_inb_mbox(struct rio_mport *mport, int mbox)
+{
+ struct rio_priv *priv = mport->priv;
+ /* Disable inbound message unit */
+ out_be32(&priv->msg_regs->imr, 0);
+
+ /* Free ring */
+ dma_free_coherent(NULL, priv->msg_rx_ring.size * RIO_MAX_MSG_SIZE,
+ priv->msg_rx_ring.virt, priv->msg_rx_ring.phys);
+
+ /* Free interrupt */
+ free_irq(IRQ_RIO_RX(mport), mport);
+}
+
+/**
+ * rio_hw_add_inb_buffer - Add buffer to the PowerPC inbound message queue
+ * @mport: Master port implementing the inbound message unit
+ * @mbox: Inbound mailbox number
+ * @buf: Buffer to add to inbound queue
+ *
+ * Adds the @buf buffer to the PowerPC inbound message queue. Returns
+ * %0 on success or %-EINVAL on failure.
+ */
+int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf)
+{
+ int rc = 0;
+ struct rio_priv *priv = mport->priv;
+
+ pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n",
+ priv->msg_rx_ring.rx_slot);
+
+ if (unlikely(priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot])) {
+ ERR("error adding inbound buffer %d, buffer exists\n",
+ priv->msg_rx_ring.rx_slot);
+ rc = -EINVAL;
+ goto out;
+ }
+
+ priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot] = buf;
+ if (++priv->msg_rx_ring.rx_slot == priv->msg_rx_ring.size)
+ priv->msg_rx_ring.rx_slot = 0;
+
+ out:
+ return rc;
+}
+
+EXPORT_SYMBOL_GPL(rio_hw_add_inb_buffer);
+
+/**
+ * rio_hw_get_inb_message - Fetch inbound message from the PowerPC message unit
+ * @mport: Master port implementing the inbound message unit
+ * @mbox: Inbound mailbox number
+ *
+ * Gets the next available inbound message from the inbound message queue.
+ * A pointer to the message is returned on success or NULL on failure.
+ */
+void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox)
+{
+ u32 phys_buf;
+ void *virt_buf = NULL;
+ void *buf = NULL;
+ int buf_idx;
+ struct rio_priv *priv = mport->priv;
+
+ phys_buf = in_be32(&priv->msg_regs->ifqdpar);
+
+ /* If no more messages, then bail out */
+ if (phys_buf == in_be32(&priv->msg_regs->ifqepar))
+ goto out2;
+
+ virt_buf = priv->msg_rx_ring.virt + (phys_buf - priv->msg_rx_ring.phys);
+ buf_idx = (phys_buf - priv->msg_rx_ring.phys) / RIO_MAX_MSG_SIZE;
+ buf = priv->msg_rx_ring.virt_buffer[buf_idx];
+
+ if (unlikely(!buf)) {
+ ERR("inbound message copy failed, no buffers\n");
+ goto out1;
+ }
+
+ /* Copy max message size, caller is expected to allocate that big */
+ memcpy(buf, virt_buf, RIO_MAX_MSG_SIZE);
+
+ /* Clear the available buffer */
+ priv->msg_rx_ring.virt_buffer[buf_idx] = NULL;
+
+ out1:
+ setbits32(&priv->msg_regs->imr, RIO_MSG_IMR_MI);
+
+ out2:
+ return buf;
+}
+
+EXPORT_SYMBOL_GPL(rio_hw_get_inb_message);
+
+/**
+ * fsl_rio_dbell_handler - PowerPC doorbell interrupt handler
+ * @irq: Linux interrupt number
+ * @dev_instance: Pointer to interrupt-specific data
+ *
+ * Handles doorbell interrupts. Parses a list of registered
+ * doorbell event handlers and executes a matching event handler.
+ */
+static irqreturn_t fsl_rio_dbell_handler(int irq, void *dev_instance)
+{
+ int dsr;
+ struct rio_mport *port = (struct rio_mport *)dev_instance;
+ struct rio_priv *priv = port->priv;
+
+ dsr = in_be32(&priv->msg_regs->dsr);
+
+ if (dsr & DOORBELL_DSR_TE) {
+ pr_info("RIO: doorbell reception error\n");
+ out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_TE);
+ goto out;
+ }
+
+ if (dsr & DOORBELL_DSR_QFI) {
+ pr_info("RIO: doorbell queue full\n");
+ out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_QFI);
+ goto out;
+ }
+
+ /* XXX Need to check/dispatch until queue empty */
+ if (dsr & DOORBELL_DSR_DIQI) {
+ u32 dmsg =
+ (u32) priv->dbell_ring.virt +
+ (in_be32(&priv->msg_regs->dqdpar) & 0xfff);
+ struct rio_dbell *dbell;
+ int found = 0;
+
+ pr_debug("RIO: processing doorbell, sid 0x%02x tid 0x%02x "
+ "info 0x%04x\n", DBELL_SID(dmsg),
+ DBELL_TID(dmsg), DBELL_INF(dmsg));
+
+ list_for_each_entry(dbell, &port->dbells, node) {
+ if ((dbell->res->start <= DBELL_INF(dmsg)) &&
+ (dbell->res->end >= DBELL_INF(dmsg))) {
+ found = 1;
+ break;
+ }
+ }
+ if (found) {
+ dbell->dinb(port, dbell->dev_id, DBELL_SID(dmsg), DBELL_TID(dmsg),
+ DBELL_INF(dmsg));
+ } else {
+ pr_debug("RIO: spurious doorbell, sid 0x%02x "
+ "tid 0x%02x info %4.4x\n",
+ DBELL_SID(dmsg), DBELL_TID(dmsg),
+ DBELL_INF(dmsg));
+ }
+ setbits32(&priv->msg_regs->dmr, DOORBELL_DMR_DI);
+ out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_DIQI);
+ }
+
+ out:
+ return IRQ_HANDLED;
+}
+
+/**
+ * fsl_rio_doorbell_init - PowerPC doorbell interface init
+ * @mport: Master port implementing the inbound doorbell unit
+ *
+ * Initializes doorbell unit hardware and inbound DMA buffer
+ * ring. Called from fsl_rio_setup(). Returns %0 on success
+ * or %-ENOMEM on failure.
+ */
+static int fsl_rio_doorbell_init(struct rio_mport *mport, phys_addr_t dbaddr)
+{
+ int rc = 0;
+ struct rio_priv *priv = mport->priv;
+
+ /* Map outbound doorbell window immediately after maintenance window */
+ priv->dbell_win = ioremap(dbaddr, RIO_DBELL_WIN_SIZE);
+ if (!priv->dbell_win) {
+ ERR("unable to map outbound doorbell window\n");
+ rc = -ENOMEM;
+ goto out;
+ }
+
+ /* Initialize inbound doorbells */
+ priv->dbell_ring.virt = dma_alloc_coherent(NULL,
+ 512 * DOORBELL_MESSAGE_SIZE,
+ &priv->dbell_ring.phys,
+ GFP_KERNEL);
+ if (!priv->dbell_ring.virt) {
+ ERR("unable allocate inbound doorbell ring\n");
+ rc = -ENOMEM;
+ iounmap(priv->dbell_win);
+ goto out;
+ }
+
+ /* Point dequeue/enqueue pointers at first entry in ring */
+ out_be32(&priv->msg_regs->dqdpar, (u32) priv->dbell_ring.phys);
+ out_be32(&priv->msg_regs->dqepar, (u32) priv->dbell_ring.phys);
+
+ /* Clear interrupt status */
+ out_be32(&priv->msg_regs->dsr, 0x00000091);
+
+ /* Hook up doorbell handler */
+ rc = request_irq(IRQ_RIO_BELL(mport), fsl_rio_dbell_handler, 0,
+ "dbell_rx", mport);
+ if (rc < 0) {
+ iounmap(priv->dbell_win);
+ dma_free_coherent(NULL, 512 * DOORBELL_MESSAGE_SIZE,
+ priv->dbell_ring.virt, priv->dbell_ring.phys);
+ ERR("unable to request inbound doorbell irq");
+ goto out;
+ }
+
+ /* Configure doorbells for snooping, 512 entries, and enable */
+ out_be32(&priv->msg_regs->dmr, 0x00108161);
+
+ out:
+ return rc;
+}
+
+u32 rio_get_mport_id(struct rio_mport *mport)
+{
+ u32 mport_id = 0;
+
+ rio_local_read_config_32(mport, 0x60, &mport_id);
+ mport_id = mport->sys_size ? (mport_id & 0xffff) : ((mport_id >> 16) & 0xff);
+ return mport_id;
+
+}
+
+static char *cmdline = NULL;
+
+static int fsl_rio_get_hdid(int index)
+{
+ /* XXX Need to parse multiple entries in some format */
+ if (!cmdline)
+ return -1;
+
+ return simple_strtol(cmdline, NULL, 0);
+}
+
+static int fsl_rio_get_cmdline(char *s)
+{
+ if (!s)
+ return 0;
+
+ cmdline = s;
+ return 1;
+}
+
+__setup("riohdid=", fsl_rio_get_cmdline);
+
+static struct rio_mem_ops fsl_mem_ops = {
+ .map_inb = fsl_rio_map_inb_mem,
+ .map_outb = fsl_rio_map_outb_mem,
+ .unmap_inb = fsl_rio_unmap_inb_mem,
+ .unmap_outb = fsl_rio_unmap_outb_mem,
+};
+
+static inline void fsl_rio_info(u32 ccsr)
+{
+ if (ccsr & 1) {
+ /* Serial phy */
+ INFO("Hardware port width: ");
+ switch (ccsr >> 30) {
+ case 0:
+ printk("1\n");
+ break;
+ case 1:
+ printk("4\n");
+ break;
+ default:
+ printk("Unknown\n");
+ break;;
+ }
+
+ INFO("Training connection status: ");
+ switch ((ccsr >> 27) & 7) {
+ case 0:
+ printk("Single-lane 0\n");
+ break;
+ case 1:
+ printk("Single-lane 2\n");
+ break;
+ case 2:
+ printk("Four-lane 2\n");
+ break;
+ default:
+ printk("Unknown\n");
+ }
+ } else {
+ /* Parallel phy */
+ if (ccsr & 0x80000000)
+ INFO("Output port operating in 8-bit mode\n");
+ if (ccsr & 0x08000000)
+ INFO("Input port operating in 8-bit mode\n");
+ }
+
+}
+
+static inline u8 hw_port_width(u32 ccsr)
+{
+ u8 pw = ccsr >> 30;
+ switch (pw) {
+ case 0:
+ return 1;
+ case 1:
+ return 4;
+ default:
+ return 0;
+ }
+}
+
+static int of_cells_get(struct device_node *np, const char *str)
+{
+ struct device_node *tmp = NULL;
+ const int *var = NULL;
+
+ var = of_get_property(np, str, NULL);
+ tmp = of_get_parent(np);
+
+ while (!var && tmp) {
+ var = (int *)of_get_property(tmp, str, NULL);
+ of_node_put(tmp);
+ tmp = of_get_parent(np);
+ }
+
+ return (var ? *var : 0);
+}
+
+/**
+ * fsl_rio_setup - Setup PowerPC RapidIO interface
+ *
+ * Initializes PowerPC RapidIO hardware interface, configures
+ * master port with system-specific info, and registers the
+ * master port with the RapidIO subsystem.
+ */
+int fsl_rio_setup(struct of_device *dev)
+{
+ struct rio_ops *ops = NULL;
+ struct rio_mport *port = NULL;
+ const u32 *dt_range;
+ int rlen = 0;
+ resource_size_t law_start = 0, law_size = 0;
+ struct resource regs;
+ int rc;
+ enum rio_phy_type phy_type;
+ void __iomem *regs_win = NULL;
+ struct rio_priv *priv = NULL;
+ u32 ccsr;
+ int paw, aw, psw;
+ struct device_node *pa;
+
+ if (!dev->node) {
+ ERR("Dev ofnode is NULL\n");
+ return -EFAULT;
+ }
+
+ dt_range = of_get_property(dev->node, "ranges", &rlen);
+ if (!dt_range) {
+ ERR("Can't get %s property 'ranges'\n", dev->node->full_name);
+ return -EFAULT;
+ }
+
+ aw = of_cells_get(dev->node, "#address-cells");
+ pa = of_get_parent(dev->node);
+ paw = of_cells_get(pa, "#address-cells");
+ psw = of_cells_get(pa, "#size-cells");
+ of_node_put(pa);
+
+ law_start = of_read_number(dt_range + aw, paw);
+ law_size = of_read_number(dt_range + aw + paw, psw);
+
+ rc = of_address_to_resource(dev->node, 0, ®s);
+ if (rc) {
+ ERR("Can't get %s property 'reg'\n", dev->node->full_name);
+ return -EFAULT;
+ }
+ INFO("Of-device full name %s\n", dev->node->full_name);
+ INFO("LAW start 0x%016llx, size 0x%016llx.\n", (u64)law_start,
+ (u64)law_size);
+ INFO("Regs start 0x%08x size 0x%08x\n", regs.start,
+ regs.end - regs.start + 1);
+
+ regs_win = ioremap(regs.start, regs.end - regs.start + 1);
+ if (!regs_win) {
+ ERR("Can't remap io for 'regs_win'\n");
+ rc = -ENOMEM;
+ goto err;
+ }
+
+ /* Probe the RapidIO phy type */
+ ccsr = in_be32(regs_win + RIO_CCSR);
+ if (ccsr & 1)
+ phy_type = RIO_PHY_SERIAL;
+ else
+ phy_type = RIO_PHY_PARALLEL;
+ INFO("Phy type: ");
+ switch (phy_type) {
+ case RIO_PHY_SERIAL:
+ printk("serial\n");
+ break;
+ case RIO_PHY_PARALLEL:
+ printk("parallel");
+ break;
+ default:
+ printk("Unknown type %d\n", phy_type);
+ rc = -EINVAL;
+ goto err;
+ };
+ fsl_rio_info(ccsr);
+
+
+ /* Checking the port training status */
+ if (in_be32((regs_win + RIO_ESCSR)) & 1) {
+ ERR("Port is not ready. Try to restart connection...\n");
+ switch (phy_type) {
+ case RIO_PHY_SERIAL:
+ /* Disable ports */
+ out_be32(regs_win + RIO_CCSR, 0);
+ /* Set 1x lane */
+ setbits32(regs_win + RIO_CCSR, 0x02000000);
+ /* Enable ports */
+ setbits32(regs_win + RIO_CCSR, 0x00600000);
+ break;
+ case RIO_PHY_PARALLEL:
+ /* Disable ports */
+ out_be32(regs_win + RIO_CCSR, 0x22000000);
+ /* Enable ports */
+ out_be32(regs_win + RIO_CCSR, 0x44000000);
+ break;
+ }
+ if (in_be32((regs_win + RIO_ESCSR)) & 1) {
+ ERR("Port restart failed.\n");
+ rc = -ENOLINK;
+ goto err;
+ }
+ INFO("Port restart success!");
+ ccsr = in_be32(regs_win + RIO_CCSR);
+ fsl_rio_info(ccsr);
+ }
+
+ ops = kzalloc(sizeof(struct rio_ops), GFP_KERNEL);
+ ops->lcread = fsl_local_config_read;
+ ops->lcwrite = fsl_local_config_write;
+ ops->cread = fsl_rio_config_read;
+ ops->cwrite = fsl_rio_config_write;
+ ops->dsend = fsl_rio_doorbell_send;
+
+ port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL);
+ if (!port) {
+ ERR("Can't alloc memory for 'port'\n");
+ rc = -ENOMEM;
+ goto err;
+ }
+ port->id = 0;
+ port->index = 0;
+
+ port->sys_size = (in_be32((regs_win + RIO_PEF_CAR))
+ & RIO_PEF_CTLS) >> 4;
+ INFO("RapidIO Common Transport System size: %d\n",
+ port->sys_size ? 65536 : 256);
+
+ port->phy_type = phy_type;
+
+ priv = kzalloc(sizeof(struct rio_priv), GFP_KERNEL);
+ if (!priv) {
+ ERR("Can't alloc memory for 'priv'\n");
+ rc = -ENOMEM;
+ goto err;
+ }
+ port->priv = priv;
+ priv->regs_win = regs_win;
+ INIT_LIST_HEAD(&port->dbells);
+ port->iores.start = law_start;
+ port->iores.end = law_start + law_size;
+ port->iores.flags = IORESOURCE_MEM;
+ port->iores.name = "rio_io_win";
+
+ priv->bellirq = irq_of_parse_and_map(dev->node, 2);
+ priv->txirq = irq_of_parse_and_map(dev->node, 3);
+ priv->rxirq = irq_of_parse_and_map(dev->node, 4);
+ INFO("bellirq: %d, txirq: %d, rxirq %d\n", priv->bellirq,
+ priv->txirq, priv->rxirq);
+
+ rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff);
+ rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0);
+ rio_init_mbox_res(&port->riores[RIO_OUTB_MBOX_RESOURCE], 0, 0);
+
+ strcpy(port->name, "RIO0 mport");
+
+ port->ops = ops;
+ port->mops = &fsl_mem_ops;
+ port->host_deviceid = fsl_rio_get_hdid(port->id);
+
+ rio_register_mport(port);
+
+ priv->atmu_regs = (struct rio_atmu_regs *)(regs_win +
+ RIO_ATMU_REGS_OFFSET);
+ priv->maint_atmu_regs = priv->atmu_regs + 1;
+ priv->dbell_atmu_regs = priv->atmu_regs + 2;
+ priv->msg_regs = (struct rio_msg_regs *)(regs_win +
+ ((port->phy_type == RIO_PHY_SERIAL)
+ ? RIO_S_MSG_REGS_OFFSET
+ : RIO_P_MSG_REGS_OFFSET));
+
+ /* Set to receive any dist ID for serial RapidIO controller. */
+ if (port->phy_type == RIO_PHY_SERIAL)
+ out_be32((regs_win + RIO_ISR_AACR), RIO_ISR_AACR_AA);
+
+ /* Configure maintenance transaction window */
+ if (!rio_request_io_region(port, NULL, law_start, RIO_MAINT_WIN_SIZE,
+ "maint_win", RIO_RESOURCE_MAINT, NULL)) {
+ rc = -EPERM;
+ ERR("request maint win error!\n");
+ goto err;
+ }
+ out_be32(&priv->maint_atmu_regs->rowbar,
+ (law_start >> 12) & 0xffffff);
+ out_be32(&priv->maint_atmu_regs->rowar, 0x80077000
+ | (__ilog2(RIO_MAINT_WIN_SIZE) - 1));
+
+ priv->maint_win = ioremap(law_start, RIO_MAINT_WIN_SIZE);
+
+ /* Configure outbound doorbell window */
+ if (!rio_request_io_region(port, NULL, law_start + RIO_MAINT_WIN_SIZE,
+ RIO_DBELL_WIN_SIZE,
+ "dbell_win", RIO_RESOURCE_DOORBELL, NULL)) {
+ rc = -EPERM;
+ ERR("request doorbell win error!\n");
+ goto err;
+ }
+ out_be32(&priv->dbell_atmu_regs->rowbar, ((law_start +
+ RIO_MAINT_WIN_SIZE) >> 12) & 0xfffff);
+ out_be32(&priv->dbell_atmu_regs->rowar, 0x80042000
+ | (__ilog2(RIO_DBELL_WIN_SIZE) - 1));
+ rc = fsl_rio_doorbell_init(port, law_start + RIO_MAINT_WIN_SIZE);
+ if (rc)
+ goto err;
+
+ return 0;
+
+err:
+ if (regs_win)
+ iounmap(regs_win);
+ if (ops)
+ kfree(ops);
+ if (port)
+ kfree(port);
+ if (priv)
+ kfree(priv);
+ return rc;
+}
diff --git a/arch/powerpc/sysdev/fsl_rio.h b/arch/powerpc/sysdev/fsl_rio.h
new file mode 100644
index 0000000..cb3f36a
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_rio.h
@@ -0,0 +1,20 @@
+/*
+ * Freescale PowerPC RapidIO definitions
+ *
+ * Copyright (C) 2007 Freescale Simconductor, Inc. All rights reserved.
+ * Zhang Wei <wei.zhang@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __POWERPC_SYSDEV_FSL_RIO_H
+#define __POWERPC_SYSDEV_FSL_RIO_H
+
+#include <linux/init.h>
+
+extern int fsl_rio_setup(struct of_device *of_dev);
+
+#endif /* __POWERPC_SYSDEV_FSL_RIO_H */
--
1.5.1
^ permalink raw reply related
* [PATCH 3/5] Add the platform device support with RapidIO to MPC8641HPCN platform.
From: Zhang Wei @ 2007-06-12 9:02 UTC (permalink / raw)
To: mporter; +Cc: linuxppc-dev, paulus, linux-kernel
In-Reply-To: <11816389401714-git-send-email-wei.zhang@freescale.com>
Add the platform device support with RapidIO to MPC8641HPCN platform.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
---
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 16 ++++++++++++++++
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 7034bca..f0ca5b3 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -28,6 +28,8 @@
#include <mm/mmu_decl.h>
#include <asm/udbg.h>
#include <asm/i8259.h>
+#include <asm/of_device.h>
+#include <asm/of_platform.h>
#include <asm/mpic.h>
@@ -467,3 +469,17 @@ define_machine(mpc86xx_hpcn) {
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};
+
+
+static struct of_device_id mpc86xx_of_ids[] = {
+ { .type = "soc", },
+ { .type = "rapidio", },
+ {},
+};
+
+static __init int mpc86xx_of_device_init(void)
+{
+ return of_platform_bus_probe(NULL, mpc86xx_of_ids, NULL);
+}
+
+device_initcall(mpc86xx_of_device_init);
--
1.5.1
^ permalink raw reply related
* [PATCH 0/5] Porting RapidIO driver from ppc to powerpc architecture and adding memory mapped RapidIO driver.
From: Zhang Wei @ 2007-06-12 9:02 UTC (permalink / raw)
To: mporter; +Cc: linuxppc-dev, paulus, linux-kernel
Hi, Matt Porter,
These patches are used for supporting RapidIO controllers of Freescale. I ported them from ppc architecture to powerpc architecture and added some new features, such as memory mapped driver.
[PATCH 1/5] Add the explanation and sample of RapidIO DTS sector to the document of booting-without-of.txt file.
[PATCH 2/5] Add RapidIO sector to MPC8641HPCN board dts file.
[PATCH 3/5] Add the platform device support with RapidIO to MPC8641HPCN platform.
[PATCH 4/5] Add RapidIO support to powerpc architecture.
[PATCH 5/5] Add the memory management driver to RapidIO.
Please see below descriptions of these patches:
1. Add the RapidIO driver of-device support.
2. Add the RapidIO driver support to MPC8641HPCN board.
3. Port the RapidIO from ppc to powerpc architecture.
4. Add Memory mapped RapidIO driver.
5. Add the support to multi master ports.
6. Add a simple bitmap RapidIO space allocator driver.
7. Change the RapidIO system size of menuconfig to automatically detection.
Thanks!
Best Regards,
Zhang Wei
^ permalink raw reply
* [PATCH] mpc5200: /dev/watchdog driver for GPT0
From: Domen Puncer @ 2007-06-12 8:59 UTC (permalink / raw)
To: linuxppc-embedded
Driver for internal mpc5200 watchdog on general purpose timer 0.
For IPB clock of 132 MHz the maximum timeout is about 32 seconds.
Signed-off-by: Domen Puncer <domen.puncer@telargo.com>
---
Hi!
I also have some generic GPT code that one could extend with
what he/she needs. Mail me if you'd find it useful.
drivers/char/watchdog/Kconfig | 4
drivers/char/watchdog/Makefile | 1
drivers/char/watchdog/mpc5200_wdt.c | 257 ++++++++++++++++++++++++++++++++++++
3 files changed, 262 insertions(+)
Index: work-powerpc.git/drivers/char/watchdog/Kconfig
===================================================================
--- work-powerpc.git.orig/drivers/char/watchdog/Kconfig
+++ work-powerpc.git/drivers/char/watchdog/Kconfig
@@ -521,6 +521,10 @@ config 8xx_WDT
tristate "MPC8xx Watchdog Timer"
depends on 8xx
+config MPC5200_WDT
+ tristate "MPC5200 Watchdog Timer"
+ depends on PPC_MPC52xx
+
config 83xx_WDT
tristate "MPC83xx Watchdog Timer"
depends on PPC_83xx
Index: work-powerpc.git/drivers/char/watchdog/Makefile
===================================================================
--- work-powerpc.git.orig/drivers/char/watchdog/Makefile
+++ work-powerpc.git/drivers/char/watchdog/Makefile
@@ -64,6 +64,7 @@ obj-$(CONFIG_SBC_EPX_C3_WATCHDOG) += sbc
# PowerPC Architecture
obj-$(CONFIG_8xx_WDT) += mpc8xx_wdt.o
+obj-$(CONFIG_MPC5200_WDT) += mpc5200_wdt.o
obj-$(CONFIG_83xx_WDT) += mpc83xx_wdt.o
obj-$(CONFIG_MV64X60_WDT) += mv64x60_wdt.o
obj-$(CONFIG_BOOKE_WDT) += booke_wdt.o
Index: work-powerpc.git/drivers/char/watchdog/mpc5200_wdt.c
===================================================================
--- /dev/null
+++ work-powerpc.git/drivers/char/watchdog/mpc5200_wdt.c
@@ -0,0 +1,257 @@
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/miscdevice.h>
+#include <linux/watchdog.h>
+#include <linux/io.h>
+#include <asm/of_platform.h>
+#include <asm/uaccess.h>
+#include <asm/mpc52xx.h>
+
+
+#define GPT_MODE_WDT (1<<15)
+#define GPT_MODE_CE (1<<12)
+#define GPT_MODE_MS_TIMER (0x4)
+
+
+struct mpc5200_wdt {
+ unsigned count; /* timer ticks before watchdog kicks in */
+ long ipb_freq;
+ struct miscdevice miscdev;
+ struct resource mem;
+ struct mpc52xx_gpt __iomem *regs;
+ struct mpc52xx_gpt saved_regs;
+};
+
+
+/* misc devices don't provide a way, to get back to 'dev' or 'miscdev' from
+ * file operations, which sucks. But there can be max 1 watchdog anyway, so...
+ */
+static struct mpc5200_wdt *wdt_global;
+
+
+/* helper to calculate timeout in timer counts */
+static void mpc5200_wdt_set_timeout(struct mpc5200_wdt *wdt, int timeout)
+{
+ /* use biggest prescaler of 64k */
+ wdt->count = (wdt->ipb_freq + 0xffff) / 0x10000 * timeout;
+
+ if (wdt->count > 0xffff)
+ wdt->count = 0xffff;
+}
+/* return timeout in seconds (calculated from timer count) */
+static int mpc5200_wdt_get_timeout(struct mpc5200_wdt *wdt)
+{
+ return wdt->count * 0x10000 / wdt->ipb_freq;
+}
+
+
+/* watchdog operations */
+static int mpc5200_wdt_start(struct mpc5200_wdt *wdt)
+{
+ /* disable */
+ out_be32(&wdt->regs->mode, 0);
+ /* set timeout, with maximum prescaler */
+ out_be32(&wdt->regs->count, 0x0 | wdt->count);
+ /* enable watchdog */
+ out_be32(&wdt->regs->mode, GPT_MODE_CE | GPT_MODE_WDT | GPT_MODE_MS_TIMER);
+
+ return 0;
+}
+static int mpc5200_wdt_ping(struct mpc5200_wdt *wdt)
+{
+ /* writing A5 to OCPW resets the watchdog */
+ out_be32(&wdt->regs->mode, 0xA5000000 | (0xffffff & in_be32(&wdt->regs->mode)));
+ return 0;
+}
+static int mpc5200_wdt_stop(struct mpc5200_wdt *wdt)
+{
+ out_be32(&wdt->regs->mode, 0);
+ return 0;
+}
+
+
+/* file operations */
+static ssize_t mpc5200_wdt_write(struct file *file, const char *data,
+ size_t len, loff_t *ppos)
+{
+ struct mpc5200_wdt *wdt = file->private_data;
+ mpc5200_wdt_ping(wdt);
+ return 0;
+}
+static struct watchdog_info mpc5200_wdt_info = {
+ .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
+ .identity = "mpc5200 watchdog on GPT0",
+};
+static int mpc5200_wdt_ioctl(struct inode *inode, struct file *file,
+ unsigned int cmd, unsigned long arg)
+{
+ struct mpc5200_wdt *wdt = file->private_data;
+ int __user *data = (int __user *)arg;
+ int timeout;
+ int ret = 0;
+
+ switch (cmd) {
+ case WDIOC_GETSUPPORT:
+ ret = copy_to_user(data, &mpc5200_wdt_info, sizeof(mpc5200_wdt_info));
+ if (ret)
+ ret = -EFAULT;
+ break;
+
+ case WDIOC_KEEPALIVE:
+ mpc5200_wdt_ping(wdt);
+ break;
+
+ case WDIOC_SETTIMEOUT:
+ ret = get_user(timeout, data);
+ if (ret)
+ break;
+ mpc5200_wdt_set_timeout(wdt, timeout);
+ mpc5200_wdt_start(wdt);
+ /* fall through and return the timeout */
+
+ case WDIOC_GETTIMEOUT:
+ timeout = mpc5200_wdt_get_timeout(wdt);
+ ret = put_user(timeout, data);
+ break;
+ }
+ return ret;
+}
+static int mpc5200_wdt_open(struct inode *inode, struct file *file)
+{
+ mpc5200_wdt_set_timeout(wdt_global, 30);
+ mpc5200_wdt_start(wdt_global);
+ file->private_data = wdt_global;
+ return 0;
+}
+static int mpc5200_wdt_release(struct inode *inode, struct file *file)
+{
+#if WATCHDOG_NOWAYOUT == 0
+ struct mpc5200_wdt *wdt = file->private_data;
+ mpc5200_wdt_stop(wdt);
+#endif
+ return 0;
+}
+
+static struct file_operations mpc5200_wdt_fops = {
+ .owner = THIS_MODULE,
+ .write = mpc5200_wdt_write,
+ .ioctl = mpc5200_wdt_ioctl,
+ .open = mpc5200_wdt_open,
+ .release = mpc5200_wdt_release,
+};
+
+/* module operations */
+static int mpc5200_wdt_probe(struct of_device *op, const struct of_device_id *match)
+{
+ struct mpc5200_wdt *wdt;
+ int err;
+ const void *has_wdt;
+ int size;
+
+ has_wdt = of_get_property(op->node, "has-wdt", NULL);
+ if (!has_wdt)
+ return -ENODEV;
+
+ wdt = kzalloc(sizeof(*wdt), GFP_KERNEL);
+ if (!wdt)
+ return -ENOMEM;
+
+ wdt->ipb_freq = mpc52xx_find_ipb_freq(op->node);
+
+ err = of_address_to_resource(op->node, 0, &wdt->mem);
+ if (err)
+ goto out_free;
+ size = wdt->mem.end - wdt->mem.start + 1;
+ if (!request_mem_region(wdt->mem.start, size, "mpc5200_wdt")) {
+ err = -ENODEV;
+ goto out_free;
+ }
+ wdt->regs = ioremap(wdt->mem.start, size);
+ if (!wdt->regs) {
+ err = -ENODEV;
+ goto out_release;
+ }
+
+ dev_set_drvdata(&op->dev, wdt);
+
+ wdt->miscdev = (struct miscdevice) {
+ .minor = WATCHDOG_MINOR,
+ .name = "watchdog",
+ .fops = &mpc5200_wdt_fops,
+ .parent = &op->dev,
+ };
+ wdt_global = wdt;
+ err = misc_register(&wdt->miscdev);
+ if (!err)
+ return 0;
+
+ iounmap(wdt->regs);
+ out_release:
+ release_mem_region(wdt->mem.start, size);
+ out_free:
+ kfree(wdt);
+ return err;
+}
+
+static int mpc5200_wdt_remove(struct of_device *op)
+{
+ struct mpc5200_wdt *wdt = dev_get_drvdata(&op->dev);
+
+ mpc5200_wdt_stop(wdt);
+ misc_deregister(&wdt->miscdev);
+ iounmap(wdt->regs);
+ release_mem_region(wdt->mem.start, wdt->mem.end - wdt->mem.start + 1);
+ kfree(wdt);
+
+ return 0;
+}
+static int mpc5200_wdt_suspend(struct of_device *op, pm_message_t state)
+{
+ struct mpc5200_wdt *wdt = dev_get_drvdata(&op->dev);
+ mpc5200_wdt_stop(wdt);
+ return 0;
+}
+static int mpc5200_wdt_resume(struct of_device *op)
+{
+ struct mpc5200_wdt *wdt = dev_get_drvdata(&op->dev);
+ mpc5200_wdt_start(wdt);
+ return 0;
+}
+static int mpc5200_wdt_shutdown(struct of_device *op)
+{
+ struct mpc5200_wdt *wdt = dev_get_drvdata(&op->dev);
+ mpc5200_wdt_stop(wdt);
+ return 0;
+}
+
+static struct of_device_id mpc5200_wdt_match[] = {
+ { .compatible = "mpc5200-gpt", },
+ {},
+};
+static struct of_platform_driver mpc5200_wdt_driver = {
+ .owner = THIS_MODULE,
+ .name = "mpc5200-gpt-wdt",
+ .match_table = mpc5200_wdt_match,
+ .probe = mpc5200_wdt_probe,
+ .remove = mpc5200_wdt_remove,
+ .suspend = mpc5200_wdt_suspend,
+ .resume = mpc5200_wdt_resume,
+ .shutdown = mpc5200_wdt_shutdown,
+};
+
+
+static int __init mpc5200_wdt_init(void)
+{
+ return of_register_platform_driver(&mpc5200_wdt_driver);
+}
+
+static void __exit mpc5200_wdt_exit(void)
+{
+ of_unregister_platform_driver(&mpc5200_wdt_driver);
+}
+
+module_init(mpc5200_wdt_init);
+module_exit(mpc5200_wdt_exit);
+
+MODULE_AUTHOR("Domen Puncer <domen.puncer@telargo.com>");
+MODULE_LICENSE("Dual BSD/GPL");
^ permalink raw reply
* [PATCH 5/5] Add the memory management driver to RapidIO.
From: Zhang Wei @ 2007-06-12 9:11 UTC (permalink / raw)
To: mporter; +Cc: linuxppc-dev, paulus, linux-kernel
Add the memory management driver to RapidIO.
The RapidIO system size is changed to automatically detection.
Add the memory mapping driver for RapidIO to RIO basic driver.
Multi master ports are supported.
The simple Bitmap RIO space allocator driver is added.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
---
drivers/net/rionet.c | 17 +-
drivers/rapidio/Kconfig | 18 +-
drivers/rapidio/Makefile | 1 +
drivers/rapidio/rio-access.c | 10 +-
drivers/rapidio/rio-scan.c | 53 +++--
drivers/rapidio/rio-sysfs.c | 3 +-
drivers/rapidio/rio.c | 479 ++++++++++++++++++++++++++++++++++-
drivers/rapidio/rio.h | 9 +-
drivers/rapidio/sallocator/Kconfig | 9 +
drivers/rapidio/sallocator/Makefile | 2 +
drivers/rapidio/sallocator/bitmap.c | 384 ++++++++++++++++++++++++++++
include/linux/rio.h | 71 +++++-
include/linux/rio_drv.h | 41 +++-
13 files changed, 1038 insertions(+), 59 deletions(-)
create mode 100644 drivers/rapidio/sallocator/Kconfig
create mode 100644 drivers/rapidio/sallocator/Makefile
create mode 100644 drivers/rapidio/sallocator/bitmap.c
diff --git a/drivers/net/rionet.c b/drivers/net/rionet.c
index df6b738..8dcda4d 100644
--- a/drivers/net/rionet.c
+++ b/drivers/net/rionet.c
@@ -78,7 +78,7 @@ static int rionet_capable = 1;
* could be made into a hash table to save memory depending
* on system trade-offs.
*/
-static struct rio_dev *rionet_active[RIO_MAX_ROUTE_ENTRIES];
+static struct rio_dev **rionet_active;
#define is_rionet_capable(pef, src_ops, dst_ops) \
((pef & RIO_PEF_INB_MBOX) && \
@@ -115,6 +115,7 @@ static int rionet_rx_clean(struct net_device *ndev)
rnet->rx_skb[i]->data = data;
skb_put(rnet->rx_skb[i], RIO_MAX_MSG_SIZE);
+ rnet->rx_skb[i]->dev = ndev;
rnet->rx_skb[i]->protocol =
eth_type_trans(rnet->rx_skb[i], ndev);
error = netif_rx(rnet->rx_skb[i]);
@@ -202,7 +203,8 @@ static int rionet_start_xmit(struct sk_buff *skb, struct net_device *ndev)
}
if (eth->h_dest[0] & 0x01) {
- for (i = 0; i < RIO_MAX_ROUTE_ENTRIES; i++)
+ for (i = 0; i < RIO_MAX_ROUTE_ENTRIES(rnet->mport->sys_size);
+ i++)
if (rionet_active[i])
rionet_queue_tx_msg(skb, ndev,
rionet_active[i]);
@@ -392,6 +394,8 @@ static void rionet_remove(struct rio_dev *rdev)
struct net_device *ndev = NULL;
struct rionet_peer *peer, *tmp;
+ free_pages((unsigned long)rionet_active, rdev->net->hport->sys_size ?
+ __ilog2(sizeof(void *)) + 4 : 0);
unregister_netdev(ndev);
kfree(ndev);
@@ -449,6 +453,15 @@ static int rionet_setup_netdev(struct rio_mport *mport)
goto out;
}
+ if (!(rionet_active = (struct rio_dev **)__get_free_pages(GFP_KERNEL,
+ mport->sys_size ? __ilog2(sizeof(void *)) + 4
+ : 0))) {
+ rc = -ENOMEM;
+ goto out;
+ }
+ memset((void *)rionet_active, 0, sizeof(void *) *
+ RIO_MAX_ROUTE_ENTRIES(mport->sys_size));
+
/* Set up private area */
rnet = (struct rionet_private *)ndev->priv;
rnet->mport = mport;
diff --git a/drivers/rapidio/Kconfig b/drivers/rapidio/Kconfig
index 4142115..f669108 100644
--- a/drivers/rapidio/Kconfig
+++ b/drivers/rapidio/Kconfig
@@ -1,14 +1,6 @@
#
# RapidIO configuration
#
-config RAPIDIO_8_BIT_TRANSPORT
- bool "8-bit transport addressing"
- depends on RAPIDIO
- ---help---
- By default, the kernel assumes a 16-bit addressed RapidIO
- network. By selecting this option, the kernel will support
- an 8-bit addressed network.
-
config RAPIDIO_DISC_TIMEOUT
int "Discovery timeout duration (seconds)"
depends on RAPIDIO
@@ -16,3 +8,13 @@ config RAPIDIO_DISC_TIMEOUT
---help---
Amount of time a discovery node waits for a host to complete
enumeration before giving up.
+
+config RAPIDIO_PROC_FS
+ bool "I/O and Memory resource debug"
+ depends on RAPIDIO && PROC_FS
+ default y
+ ---help---
+ Enable this option, it will create a /proc/riores node for
+ monitoring the RapidIO I/O and Memory resource.
+
+source "drivers/rapidio/sallocator/Kconfig"
diff --git a/drivers/rapidio/Makefile b/drivers/rapidio/Makefile
index 7c0e181..e5b2f11 100644
--- a/drivers/rapidio/Makefile
+++ b/drivers/rapidio/Makefile
@@ -4,3 +4,4 @@
obj-y += rio.o rio-access.o rio-driver.o rio-scan.o rio-sysfs.o
obj-$(CONFIG_RAPIDIO) += switches/
+obj-$(CONFIG_RAPIDIO) += sallocator/
diff --git a/drivers/rapidio/rio-access.c b/drivers/rapidio/rio-access.c
index 8b56bbd..a3824ba 100644
--- a/drivers/rapidio/rio-access.c
+++ b/drivers/rapidio/rio-access.c
@@ -48,7 +48,7 @@ int __rio_local_read_config_##size \
u32 data = 0; \
if (RIO_##size##_BAD) return RIO_BAD_SIZE; \
spin_lock_irqsave(&rio_config_lock, flags); \
- res = mport->ops->lcread(mport->id, offset, len, &data); \
+ res = mport->ops->lcread(mport, mport->id, offset, len, &data); \
*value = (type)data; \
spin_unlock_irqrestore(&rio_config_lock, flags); \
return res; \
@@ -71,7 +71,7 @@ int __rio_local_write_config_##size \
unsigned long flags; \
if (RIO_##size##_BAD) return RIO_BAD_SIZE; \
spin_lock_irqsave(&rio_config_lock, flags); \
- res = mport->ops->lcwrite(mport->id, offset, len, value); \
+ res = mport->ops->lcwrite(mport, mport->id, offset, len, value);\
spin_unlock_irqrestore(&rio_config_lock, flags); \
return res; \
}
@@ -108,7 +108,7 @@ int rio_mport_read_config_##size \
u32 data = 0; \
if (RIO_##size##_BAD) return RIO_BAD_SIZE; \
spin_lock_irqsave(&rio_config_lock, flags); \
- res = mport->ops->cread(mport->id, destid, hopcount, offset, len, &data); \
+ res = mport->ops->cread(mport, mport->id, destid, hopcount, offset, len, &data); \
*value = (type)data; \
spin_unlock_irqrestore(&rio_config_lock, flags); \
return res; \
@@ -131,7 +131,7 @@ int rio_mport_write_config_##size \
unsigned long flags; \
if (RIO_##size##_BAD) return RIO_BAD_SIZE; \
spin_lock_irqsave(&rio_config_lock, flags); \
- res = mport->ops->cwrite(mport->id, destid, hopcount, offset, len, value); \
+ res = mport->ops->cwrite(mport, mport->id, destid, hopcount, offset, len, value); \
spin_unlock_irqrestore(&rio_config_lock, flags); \
return res; \
}
@@ -166,7 +166,7 @@ int rio_mport_send_doorbell(struct rio_mport *mport, u16 destid, u16 data)
unsigned long flags;
spin_lock_irqsave(&rio_doorbell_lock, flags);
- res = mport->ops->dsend(mport->id, destid, data);
+ res = mport->ops->dsend(mport, mport->id, destid, data);
spin_unlock_irqrestore(&rio_doorbell_lock, flags);
return res;
diff --git a/drivers/rapidio/rio-scan.c b/drivers/rapidio/rio-scan.c
index f935c1f..1484a38 100644
--- a/drivers/rapidio/rio-scan.c
+++ b/drivers/rapidio/rio-scan.c
@@ -73,7 +73,7 @@ static u16 rio_get_device_id(struct rio_mport *port, u16 destid, u8 hopcount)
rio_mport_read_config_32(port, destid, hopcount, RIO_DID_CSR, &result);
- return RIO_GET_DID(result);
+ return RIO_GET_DID(port->sys_size, result);
}
/**
@@ -88,7 +88,7 @@ static u16 rio_get_device_id(struct rio_mport *port, u16 destid, u8 hopcount)
static void rio_set_device_id(struct rio_mport *port, u16 destid, u8 hopcount, u16 did)
{
rio_mport_write_config_32(port, destid, hopcount, RIO_DID_CSR,
- RIO_SET_DID(did));
+ RIO_SET_DID(port->sys_size, did));
}
/**
@@ -100,7 +100,8 @@ static void rio_set_device_id(struct rio_mport *port, u16 destid, u8 hopcount, u
*/
static void rio_local_set_device_id(struct rio_mport *port, u16 did)
{
- rio_local_write_config_32(port, RIO_DID_CSR, RIO_SET_DID(did));
+ rio_local_write_config_32(port, RIO_DID_CSR, RIO_SET_DID(port->sys_size,
+ did));
}
/**
@@ -351,8 +352,17 @@ static struct rio_dev *rio_setup_device(struct rio_net *net,
rswitch->switchid = next_switchid;
rswitch->hopcount = hopcount;
rswitch->destid = destid;
+ if (!(rswitch->route_table = kzalloc(sizeof(u16)*
+ RIO_MAX_ROUTE_ENTRIES(port->sys_size),
+ GFP_KERNEL))) {
+ kfree(rdev);
+ rdev = NULL;
+ kfree(rswitch);
+ goto out;
+ }
/* Initialize switch route table */
- for (rdid = 0; rdid < RIO_MAX_ROUTE_ENTRIES; rdid++)
+ for (rdid = 0; rdid < RIO_MAX_ROUTE_ENTRIES(port->sys_size);
+ rdid++)
rswitch->route_table[rdid] = RIO_INVALID_ROUTE;
rdev->rswitch = rswitch;
sprintf(rio_name(rdev), "%02x:s:%04x", rdev->net->id,
@@ -481,7 +491,7 @@ static u16 rio_get_host_deviceid_lock(struct rio_mport *port, u8 hopcount)
{
u32 result;
- rio_mport_read_config_32(port, RIO_ANY_DESTID, hopcount,
+ rio_mport_read_config_32(port, RIO_ANY_DESTID(port->sys_size), hopcount,
RIO_HOST_DID_LOCK_CSR, &result);
return (u16) (result & 0xffff);
@@ -572,14 +582,16 @@ static int rio_enum_peer(struct rio_net *net, struct rio_mport *port,
}
/* Attempt to acquire device lock */
- rio_mport_write_config_32(port, RIO_ANY_DESTID, hopcount,
+ rio_mport_write_config_32(port, RIO_ANY_DESTID(port->sys_size),
+ hopcount,
RIO_HOST_DID_LOCK_CSR, port->host_deviceid);
while ((tmp = rio_get_host_deviceid_lock(port, hopcount))
< port->host_deviceid) {
/* Delay a bit */
mdelay(1);
/* Attempt to acquire device lock again */
- rio_mport_write_config_32(port, RIO_ANY_DESTID, hopcount,
+ rio_mport_write_config_32(port, RIO_ANY_DESTID(port->sys_size),
+ hopcount,
RIO_HOST_DID_LOCK_CSR,
port->host_deviceid);
}
@@ -591,7 +603,8 @@ static int rio_enum_peer(struct rio_net *net, struct rio_mport *port,
}
/* Setup new RIO device */
- if ((rdev = rio_setup_device(net, port, RIO_ANY_DESTID, hopcount, 1))) {
+ if ((rdev = rio_setup_device(net, port, RIO_ANY_DESTID(port->sys_size),
+ hopcount, 1))) {
/* Add device to the global and bus/net specific list. */
list_add_tail(&rdev->net_list, &net->devices);
} else
@@ -599,7 +612,8 @@ static int rio_enum_peer(struct rio_net *net, struct rio_mport *port,
if (rio_is_switch(rdev)) {
next_switchid++;
- sw_inport = rio_get_swpinfo_inport(port, RIO_ANY_DESTID, hopcount);
+ sw_inport = rio_get_swpinfo_inport(port,
+ RIO_ANY_DESTID(port->sys_size), hopcount);
rio_route_add_entry(port, rdev->rswitch, RIO_GLOBAL_TABLE,
port->host_deviceid, sw_inport);
rdev->rswitch->route_table[port->host_deviceid] = sw_inport;
@@ -613,7 +627,8 @@ static int rio_enum_peer(struct rio_net *net, struct rio_mport *port,
}
num_ports =
- rio_get_swpinfo_tports(port, RIO_ANY_DESTID, hopcount);
+ rio_get_swpinfo_tports(port, RIO_ANY_DESTID(port->sys_size),
+ hopcount);
pr_debug(
"RIO: found %s (vid %4.4x did %4.4x) with %d ports\n",
rio_name(rdev), rdev->vid, rdev->did, num_ports);
@@ -625,13 +640,15 @@ static int rio_enum_peer(struct rio_net *net, struct rio_mport *port,
cur_destid = next_destid;
if (rio_sport_is_active
- (port, RIO_ANY_DESTID, hopcount, port_num)) {
+ (port, RIO_ANY_DESTID(port->sys_size), hopcount,
+ port_num)) {
pr_debug(
"RIO: scanning device on port %d\n",
port_num);
rio_route_add_entry(port, rdev->rswitch,
RIO_GLOBAL_TABLE,
- RIO_ANY_DESTID, port_num);
+ RIO_ANY_DESTID(port->sys_size),
+ port_num);
if (rio_enum_peer(net, port, hopcount + 1) < 0)
return -1;
@@ -736,7 +753,8 @@ rio_disc_peer(struct rio_net *net, struct rio_mport *port, u16 destid,
pr_debug(
"RIO: scanning device on port %d\n",
port_num);
- for (ndestid = 0; ndestid < RIO_ANY_DESTID;
+ for (ndestid = 0;
+ ndestid < RIO_ANY_DESTID(port->sys_size);
ndestid++) {
rio_route_get_entry(port, rdev->rswitch,
RIO_GLOBAL_TABLE,
@@ -797,7 +815,7 @@ static int rio_mport_is_active(struct rio_mport *port)
* network list of associated master ports. Returns a
* RIO network pointer on success or %NULL on failure.
*/
-static struct rio_net __devinit *rio_alloc_net(struct rio_mport *port)
+static struct rio_net *rio_alloc_net(struct rio_mport *port)
{
struct rio_net *net;
@@ -919,7 +937,9 @@ static void rio_build_route_tables(void)
list_for_each_entry(rdev, &rio_devices, global_list)
if (rio_is_switch(rdev))
- for (i = 0; i < RIO_MAX_ROUTE_ENTRIES; i++) {
+ for (i = 0;
+ i < RIO_MAX_ROUTE_ENTRIES(rdev->net->hport->sys_size);
+ i++) {
if (rio_route_get_entry
(rdev->net->hport, rdev->rswitch, RIO_GLOBAL_TABLE,
i, &sport) < 0)
@@ -983,7 +1003,8 @@ int rio_disc_mport(struct rio_mport *mport)
del_timer_sync(&rio_enum_timer);
pr_debug("done\n");
- if (rio_disc_peer(net, mport, RIO_ANY_DESTID, 0) < 0) {
+ if (rio_disc_peer(net, mport, RIO_ANY_DESTID(mport->sys_size),
+ 0) < 0) {
printk(KERN_INFO
"RIO: master port %d device has failed discovery\n",
mport->id);
diff --git a/drivers/rapidio/rio-sysfs.c b/drivers/rapidio/rio-sysfs.c
index eed9143..691c1be 100644
--- a/drivers/rapidio/rio-sysfs.c
+++ b/drivers/rapidio/rio-sysfs.c
@@ -43,7 +43,8 @@ static ssize_t routes_show(struct device *dev, struct device_attribute *attr, ch
if (!rdev->rswitch)
goto out;
- for (i = 0; i < RIO_MAX_ROUTE_ENTRIES; i++) {
+ for (i = 0; i < RIO_MAX_ROUTE_ENTRIES(rdev->net->hport->sys_size);
+ i++) {
if (rdev->rswitch->route_table[i] == RIO_INVALID_ROUTE)
continue;
str +=
diff --git a/drivers/rapidio/rio.c b/drivers/rapidio/rio.c
index f644807..5248774 100644
--- a/drivers/rapidio/rio.c
+++ b/drivers/rapidio/rio.c
@@ -23,10 +23,22 @@
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/slab.h>
+#include <linux/seq_file.h>
+#include <linux/fs.h>
+#include <linux/proc_fs.h>
+#include <linux/dma-mapping.h>
+#include <linux/hardirq.h>
#include "rio.h"
+#define ERR(fmt, arg...) \
+ printk(KERN_ERR "%s:%s: " fmt, __FILE__, __FUNCTION__, ## arg)
+
static LIST_HEAD(rio_mports);
+static LIST_HEAD(rio_inb_mems);
+static LIST_HEAD(rio_outb_mems);
+
+static DEFINE_SPINLOCK(rio_config_lock);
/**
* rio_local_get_device_id - Get the base/extended device id for a port
@@ -42,7 +54,7 @@ u16 rio_local_get_device_id(struct rio_mport *port)
rio_local_read_config_32(port, RIO_DID_CSR, &result);
- return (RIO_GET_DID(result));
+ return (RIO_GET_DID(port->sys_size, result));
}
/**
@@ -332,6 +344,350 @@ int rio_release_outb_dbell(struct rio_dev *rdev, struct resource *res)
}
/**
+ * rio_request_io_region -- request resource in RapidIO IO region
+ * @mport: Master port
+ * @devid: Device specific pointer to pass
+ * @start: IO resource start address
+ * @size: IO resource size
+ * @name: Resource name
+ * @flag: Flag for resource
+ * @res: Return resource which has been allocated. If res == NULL,
+ * the function will alloc the memory for return resource.
+ *
+ * Return: The resource which has been allocated.
+ */
+struct resource *rio_request_io_region(struct rio_mport *mport, void *devid,
+ resource_size_t start, resource_size_t size,
+ const char *name, unsigned long flags,
+ struct resource *res)
+{
+ if (!res && !(res = kmalloc(sizeof(struct resource), GFP_KERNEL))) {
+ ERR("No free memory for res alloc!\n");
+ goto err;
+ }
+ memset(res, 0, sizeof(struct resource));
+ size = (size < 0x1000) ? 0x1000 : 1 << (__ilog2(size - 1) + 1);
+
+ /* if start == 0 then auto locate the start address */
+ if (!start) {
+ if (allocate_resource(&mport->iores, res, size,
+ mport->iores.start, mport->iores.end,
+ size, NULL, NULL) < 0) {
+ ERR("allocte resource error!\n");
+ goto err;
+ }
+ res->name = name;
+ res->flags = flags;
+ } else {
+ rio_init_io_res(res, start, start + size - 1, name, flags);
+ if (request_resource(&mport->iores, res) < 0) {
+ ERR("Can't get SRIO IO resource!\n");
+ goto err;
+ }
+ }
+ return res;
+
+err:
+ if (res)
+ kfree(res);
+ return NULL;
+}
+EXPORT_SYMBOL_GPL(rio_request_io_region);
+
+/**
+ * rio_map_inb_region -- Mapping inbound memory region.
+ * @mport: Master port.
+ * @mem: Memory struction for mapping.
+ * @rflags: Flags for mapping.
+ *
+ * Return: 0 -- Success.
+ *
+ * This function will create the mapping from the mem->riores to mem->iores.
+ */
+int rio_map_inb_region(struct rio_mport *mport, struct rio_mem *mem, u32 rflags)
+{
+ int rc = 0;
+ unsigned long flags;
+
+ if (!mport->mops)
+ return -1;
+ spin_lock_irqsave(&rio_config_lock, flags);
+ rc = mport->mops->map_inb(mport, mem->iores.start, mem->riores.start, mem->size, rflags);
+ spin_unlock_irqrestore(&rio_config_lock, flags);
+ return rc;
+}
+
+/**
+ * rio_map_outb_region -- Mapping outbound memory region.
+ * @mport: Master port.
+ * @tid: Target RapidIO device id.
+ * @mem: Memory struction for mapping.
+ * @rflags: Flags for mapping.
+ *
+ * Return: 0 -- Success.
+ *
+ * This function will create the mapping from the mem->iores to mem->riores.
+ */
+int rio_map_outb_region(struct rio_mport *mport, u16 tid,
+ struct rio_mem *mem, u32 rflags)
+{
+ int rc = 0;
+ unsigned long flags;
+
+ if (!mport->mops)
+ return -1;
+ spin_lock_irqsave(&rio_config_lock, flags);
+ rc = mport->mops->map_outb(mport, mem->iores.start, mem->riores.start, mem->size, tid, rflags);
+ spin_unlock_irqrestore(&rio_config_lock, flags);
+ return rc;
+}
+
+/**
+ * rio_unmap_inb_region -- Unmap the inbound memory region
+ * @mport: Master port
+ * @mem: Memory struction for unmapping.
+ */
+void rio_unmap_inb_region(struct rio_mport *mport, struct rio_mem *mem)
+{
+ unsigned long flags;
+ if (!mport->mops)
+ return;
+ spin_lock_irqsave(&rio_config_lock, flags);
+ mport->mops->unmap_inb(mport, mem->iores.start);
+ spin_unlock_irqrestore(&rio_config_lock, flags);
+}
+
+/**
+ * rio_unmap_outb_region -- Unmap the outbound memory region
+ * @mport: Master port
+ * @mem: Memory struction for unmapping.
+ */
+void rio_unmap_outb_region(struct rio_mport *mport, struct rio_mem *mem)
+{
+ unsigned long flags;
+ if (!mport->mops)
+ return;
+ spin_lock_irqsave(&rio_config_lock, flags);
+ mport->mops->unmap_outb(mport, mem->iores.start);
+ spin_unlock_irqrestore(&rio_config_lock, flags);
+}
+
+/**
+ * rio_release_inb_region -- Release the inbound region resource.
+ * @mport: Master port
+ * @mem: Inbound region descriptor
+ *
+ * Return 0 is successed.
+ */
+int rio_release_inb_region(struct rio_mport *mport, struct rio_mem *mem)
+{
+ int rc = 0;
+ if (!mem)
+ return rc;
+ rio_unmap_inb_region(mport, mem);
+ if (mem->virt)
+ dma_free_coherent(NULL, mem->size, mem->virt, mem->iores.start);
+
+ if (mem->iores.parent)
+ rc = release_resource(&mem->iores);
+ if (mem->riores.parent && !rc)
+ rc = release_resource(&mem->riores);
+
+ if (mem->node.prev)
+ list_del(&mem->node);
+
+ kfree(mem);
+
+ return rc;
+}
+
+/**
+ * rio_request_inb_region -- Request inbound memory region
+ * @mport: Master port
+ * @dev_id: Device specific pointer to pass
+ * @size: The request memory windows size
+ * @name: The region name
+ * @owner: The region owner driver id
+ *
+ * Retrun: The rio_mem struction for inbound memory descriptor.
+ *
+ * This function is used for request RapidIO space inbound region. If the size
+ * less than 4096 or not aligned to 2^N, it will be adjusted. The function will
+ * alloc a block of local DMA memory of the size for inbound region target and
+ * request a RapidIO region for inbound region source. Then the inbound region
+ * will be claimed in RapidIO space and the local DMA memory will be added to
+ * local inbound memory list. The rio_mem with the inbound relationship will
+ * be returned.
+ */
+struct rio_mem *rio_request_inb_region(struct rio_mport *mport, void *dev_id,
+ resource_size_t size, const char *name, u32 owner)
+{
+ struct rio_mem *rmem = NULL;
+ int ret;
+
+ rmem = kzalloc(sizeof(struct rio_mem), GFP_KERNEL);
+ if (!rmem)
+ goto err;
+
+ /* Align the size to 2^N */
+ size = (size < 0x1000) ? 0x1000 : 1 << (__ilog2(size - 1) + 1);
+
+ /* Alloc the RapidIO space */
+ ret = rio_space_request(mport, size, &rmem->riores);
+ if (ret) {
+ printk(KERN_ERR "RIO space request error! ret = %d\n", ret);
+ goto err;
+ }
+
+ rmem->riores.name = name;
+ rmem->size = rmem->riores.end - rmem->riores.start + 1;
+
+ /* Initialize inbound memory */
+ if (!(rmem->virt = dma_alloc_coherent(NULL, rmem->size,
+ &rmem->iores.start, GFP_KERNEL))) {
+ ERR("Inbound memory alloc error\n");
+ goto err;
+ }
+ rmem->iores.end = rmem->iores.start + rmem->size - 1;
+ rmem->owner = owner;
+
+ /* Map RIO space to local DMA memory */
+ if ((ret = rio_map_inb_region(mport, rmem, 0))) {
+ printk(KERN_ERR "RIO map inbound mem error, ret = %d\n", ret);
+ goto err;
+ }
+
+ /* Claim the region */
+ if ((ret = rio_space_claim(rmem))) {
+ printk(KERN_ERR "RIO inbound mem claim error, ret = %d\n", ret);
+ goto err;
+ }
+ list_add(&rmem->node, &rio_inb_mems);
+
+ return rmem;
+
+err:
+ rio_release_inb_region(mport, rmem);
+ return NULL;
+}
+
+/**
+ * rio_release_outb_region -- Release the outbound region resource.
+ * @mport: Master port
+ * @mem: Outbound region descriptor
+ *
+ * Return 0 is successed.
+ */
+int rio_release_outb_region(struct rio_mport *mport, struct rio_mem *mem)
+{
+ int rc = 0;
+ if (!mem)
+ return rc;
+ rio_unmap_outb_region(mport, mem);
+ rio_space_release(mem);
+ if (mem->virt)
+ iounmap(mem->virt);
+
+ if (mem->iores.parent)
+ rc = release_resource(&mem->iores);
+ if (mem->riores.parent && !rc)
+ rc = release_resource(&mem->riores);
+
+ if (mem->node.prev)
+ list_del(&mem->node);
+
+ kfree(mem);
+
+ return rc;
+}
+
+/** rio_prepare_io_mem -- Prepare IO region for RapidIO outbound mapping
+ * @mport: Master port
+ * @dev: RIO device specific pointer to pass
+ * @size: Request IO size
+ * @name: The request IO resource name
+ *
+ * Return: The rio_mem descriptor with IO region resource.
+ *
+ * This function request IO region firstly and ioremap it for preparing
+ * outbound window mapping. The function do not map the outbound region
+ * because ioremap can not located at the interrupt action function.
+ * The function can be called in the initialization for just prepared.
+ */
+struct rio_mem *rio_prepare_io_mem(struct rio_mport *mport,
+ struct rio_dev *dev, resource_size_t size, const char *name)
+{
+ struct rio_mem *rmem = NULL;
+
+ rmem = kzalloc(sizeof(struct rio_mem), GFP_KERNEL);
+ if (!rmem)
+ goto err;
+
+ /* Align the size to 2^N */
+ size = (size < 0x1000) ? 0x1000 : 1 << (__ilog2(size - 1) + 1);
+
+ /* Request RapidIO IO region */
+ if (!(rio_request_io_region(mport, dev, 0, size,
+ name, RIO_RESOURCE_MEM, &rmem->iores))) {
+ ERR("RIO io region request error!\n");
+ goto err;
+ }
+
+ rmem->virt = ioremap((phys_addr_t)(rmem->iores.start), size);
+ rmem->size = size;
+
+ list_add(&rmem->node, &rio_outb_mems);
+ return rmem;
+err:
+ rio_release_outb_region(mport, rmem);
+ return NULL;
+}
+
+/** rio_request_outb_region -- Request IO region and get outbound region
+ * for RapidIO outbound mapping
+ * @mport: Master port
+ * @dev_id: RIO device specific pointer to pass
+ * @size: Request IO size
+ * @name: The request IO resource name
+ * @owner: The outbound region owned driver
+ *
+ * Return: The rio_mem descriptor with IO region resource.
+ *
+ * This function request IO region firstly and ioremap it for preparing
+ * outbound window mapping. And it will find the RapidIO region owned by
+ * the driver id. Then map it. Be careful about that the ioremap can not
+ * be called in the interrupt event action function.
+ */
+struct rio_mem *rio_request_outb_region(struct rio_mport *mport, void *dev_id,
+ resource_size_t size, const char *name, u32 owner)
+{
+ struct rio_mem *rmem = NULL;
+ struct rio_dev *dev = dev_id;
+
+ if (!dev)
+ goto err;
+
+ rmem = rio_prepare_io_mem(mport, dev, size, name);
+ if (!rmem)
+ goto err;
+
+ if (rio_space_find_mem(mport, dev->destid, owner, &rmem->riores)) {
+ ERR("Can not find RIO region meet the ownerid %x\n", owner);
+ goto err;
+ }
+
+ /* Map the rio space to local */
+ if (rio_map_outb_region(mport, dev->destid, rmem, 0)) {
+ ERR("RIO map outb error!\n");
+ goto err;
+ }
+ return rmem;
+err:
+ rio_release_outb_region(mport, rmem);
+ return NULL;
+}
+
+/**
* rio_mport_get_feature - query for devices' extended features
* @port: Master port to issue transaction
* @local: Indicate a local master port or remote device access
@@ -476,8 +832,8 @@ int rio_init_mports(void)
port->iores.end - port->iores.start,
port->name)) {
printk(KERN_ERR
- "RIO: Error requesting master port region %8.8lx-%8.8lx\n",
- port->iores.start, port->iores.end - 1);
+ "RIO: Error requesting master port region %016llx-%016llx\n",
+ (u64)port->iores.start, (u64)port->iores.end - 1);
rc = -ENOMEM;
goto out;
}
@@ -486,6 +842,7 @@ int rio_init_mports(void)
rio_enum_mport(port);
else
rio_disc_mport(port);
+ rio_space_init(port);
}
out:
@@ -508,3 +865,119 @@ EXPORT_SYMBOL_GPL(rio_request_inb_mbox);
EXPORT_SYMBOL_GPL(rio_release_inb_mbox);
EXPORT_SYMBOL_GPL(rio_request_outb_mbox);
EXPORT_SYMBOL_GPL(rio_release_outb_mbox);
+
+#ifdef CONFIG_RAPIDIO_PROC_FS
+enum { MAX_IORES_LEVEL = 5 };
+
+struct riors {
+ struct rio_mport *mp;
+ int res;
+ struct resource *p;
+} riomres;
+
+static void *r_next(struct seq_file *m, void *v, loff_t *pos)
+{
+ struct resource *p = v;
+ struct riors *rs = m->private;
+
+ (*pos)++;
+ if (p->child)
+ return p->child;
+ while (!p->sibling && p->parent)
+ p = p->parent;
+ if (p->sibling)
+ return p->sibling;
+ else {
+ rs->res++;
+ if(rs->res >= RIO_MAX_MPORT_RESOURCES) {
+ rs->mp = list_entry(rs->mp->node.next, struct rio_mport, node);
+ rs->res = 0;
+ if (&rs->mp->node == &rio_mports)
+ return NULL;
+ }
+ seq_printf(m, "%2d: ", rs->res);
+ rs->p = &rs->mp->riores[rs->res];
+ p = rs->p;
+
+ return p;
+ }
+}
+
+static void *r_start(struct seq_file *m, loff_t *pos)
+{
+ struct riors *rs = m->private;
+ struct resource *p;
+
+ if (*pos) {
+ *pos = 0;
+ return NULL;
+ }
+
+ rs->mp = list_entry(rio_mports.next, struct rio_mport, node);
+ rs->res = -1;
+ rs->p = &rs->mp->iores;
+ p = rs->p;
+
+ seq_printf(m, "IO: ");
+
+ return p;
+}
+
+static void r_stop(struct seq_file *m, void *v)
+{
+}
+
+static int r_show(struct seq_file *m, void *v)
+{
+ struct riors *rs = m->private;
+ struct resource *root = rs->p;
+ struct resource *r = v, *p;
+ int width = root->end < 0x10000 ? 4 : 8;
+ int depth;
+
+ for (depth = 0, p = r; p->parent && depth < MAX_IORES_LEVEL; depth++, p = p->parent)
+ if (p == root)
+ break;
+ seq_printf(m, "%*s%0*llx-%0*llx : %s\n",
+ depth * 2, "",
+ width, (unsigned long long) r->start,
+ width, (unsigned long long) r->end,
+ r->name ? r->name : "<BAD>");
+ return 0;
+}
+
+static const struct seq_operations resource_op = {
+ .start = r_start,
+ .next = r_next,
+ .stop = r_stop,
+ .show = r_show,
+};
+
+static int riores_open(struct inode *inode, struct file *file)
+{
+ int res = seq_open(file, &resource_op);
+ if (!res) {
+ struct seq_file *m = file->private_data;
+ m->private = &riomres;
+ }
+ return res;
+}
+
+static const struct file_operations proc_riores_operations = {
+ .open = riores_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = seq_release,
+};
+
+static int __init rioresources_init(void)
+{
+ struct proc_dir_entry *entry;
+
+ entry = create_proc_entry("riores", 0, NULL);
+ if (entry)
+ entry->proc_fops = &proc_riores_operations;
+ return 0;
+}
+__initcall(rioresources_init);
+#endif
diff --git a/drivers/rapidio/rio.h b/drivers/rapidio/rio.h
index b242cee..7a3b62e 100644
--- a/drivers/rapidio/rio.h
+++ b/drivers/rapidio/rio.h
@@ -51,10 +51,5 @@ extern struct rio_route_ops __end_rio_route_ops[];
DECLARE_RIO_ROUTE_SECTION(.rio_route_ops, \
vid, did, add_hook, get_hook)
-#ifdef CONFIG_RAPIDIO_8_BIT_TRANSPORT
-#define RIO_GET_DID(x) ((x & 0x00ff0000) >> 16)
-#define RIO_SET_DID(x) ((x & 0x000000ff) << 16)
-#else
-#define RIO_GET_DID(x) (x & 0xffff)
-#define RIO_SET_DID(x) (x & 0xffff)
-#endif
+#define RIO_GET_DID(size, x) (size ? (x & 0xffff) : ((x & 0x00ff0000) >> 16))
+#define RIO_SET_DID(size, x) (size ? (x & 0xffff) : ((x & 0x000000ff) << 16))
diff --git a/drivers/rapidio/sallocator/Kconfig b/drivers/rapidio/sallocator/Kconfig
new file mode 100644
index 0000000..a33a1b8
--- /dev/null
+++ b/drivers/rapidio/sallocator/Kconfig
@@ -0,0 +1,9 @@
+choice
+ prompt "Default RapidIO Space Allocator"
+ depends on RAPIDIO
+ default RIO_SA_DEFAULT_BITMAP
+
+ config RIO_SA_DEFAULT_BITMAP
+ bool "Bitmap"
+
+endchoice
diff --git a/drivers/rapidio/sallocator/Makefile b/drivers/rapidio/sallocator/Makefile
new file mode 100644
index 0000000..2000425
--- /dev/null
+++ b/drivers/rapidio/sallocator/Makefile
@@ -0,0 +1,2 @@
+
+obj-$(CONFIG_RIO_SA_DEFAULT_BITMAP) += bitmap.o
diff --git a/drivers/rapidio/sallocator/bitmap.c b/drivers/rapidio/sallocator/bitmap.c
new file mode 100644
index 0000000..1de4e11
--- /dev/null
+++ b/drivers/rapidio/sallocator/bitmap.c
@@ -0,0 +1,384 @@
+/*
+ * RapidIO space allocator bitmap arithmetic.
+ *
+ * Copyright (C) 2007 Freescale Simconductor, Inc. All rights reserved.
+ * Zhang Wei <wei.zhang@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * The Bitmap allocator make the whole RapidIO device have the same fixed
+ * inbound memory window. And on the top of each device inbound window,
+ * there is a sect0 area, which will use for recording the individual
+ * driver owned memory space in device.
+ */
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/rio.h>
+#include <linux/rio_drv.h>
+#include <linux/rio_ids.h>
+#include <linux/rio_regs.h>
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/slab.h>
+#include <linux/seq_file.h>
+#include <linux/fs.h>
+#include <linux/proc_fs.h>
+#include <linux/dma-mapping.h>
+
+#include "../rio.h"
+
+#undef DEBUG
+
+#define RIO_SBLOCK_SIZE 4096
+
+#define ERR(fmt, arg...) \
+ printk(KERN_ERR "ERROR %s - %s: " fmt, __FILE__, __FUNCTION__, ## arg)
+#ifdef DEBUG
+#define DBG(fmt...) printk(fmt)
+#else
+#define DBG(fmt...) do {} while (0)
+#endif
+
+#define IS_64BIT_RES ((sizeof(resource_size_t) == 8) ? 1 : 0)
+#define SA_BITMAP_DRV_ID 0x4249544d
+#define SA_RIO_RESERVE_SPACE 0x4000000
+
+/* Definition for struct rio_res:ctrl */
+#define SA_RIO_RES_CTRL_EN 0x80000000
+struct rio_res {
+ u32 ctrl; /* Control words
+ * Bit 31: Enable bit.
+ */
+ u32 addr; /* The start addr bits [0-31] of RapidIO window */
+ u32 extaddr; /* The start addr bits [32-63] of RapidIO window */
+ u32 size; /* The size bits [0-31] of RapidIO window */
+ u32 extsize; /* The size bits [32-63] of RapidIO window */
+ u32 owner; /* The owner driver id */
+ u32 rev[2]; /* For align 32 bytes */
+};
+
+#define SA_BITMAP_MAX_INB_RES 32
+struct rio_sect0 {
+ u32 id; /* ID for Bitmap space allocater driver */
+ u32 rioid; /* RapidIO device id */
+ u32 width; /* The resource width for RIO space, 32 or 64 */
+ u8 rev1[56]; /* Align to 64 bytes */
+ struct rio_res inb_res[SA_BITMAP_MAX_INB_RES];
+ u8 rev2[4096 - 64 - SA_BITMAP_MAX_INB_RES * 32];
+ /* Fill for 4096 bytes */
+};
+
+/* if select 64bit resource, we can use 34-bit rio address, otherwise 32-bit */
+static int rio_addr_size;
+static struct resource *root;
+static struct rio_mem sect0mem; /* Sect 0 memory data */
+static struct rio_sect0 *sect0 = NULL;
+static struct rio_mem *sblock_buf = NULL;
+
+/**
+ * get_rio_addr_size -- get the RapidIO space address size.
+ *
+ * If it's a 64-bit system, the RapidIO space address size could be 34bit,
+ * otherwise, it should be 32 bit.
+ */
+static inline int get_rio_addr_size(void)
+{
+ return (sizeof(resource_size_t) == 8) ? 34 : 32;
+}
+
+/**
+ * rio_space_request -- request RapidIO space.
+ * @mport: RIO master port.
+ * @size: The request space size, must >= 4096.
+ * @new: The resource which required.
+ *
+ * Return:
+ * 0 -- Success
+ * -EINVAL -- size is wrong (<4096)
+ * -EFAULT -- new is NULL
+ * others -- return from allocate_resource()
+ *
+ * This function request a memory from RapidIO space.
+ */
+int rio_space_request(struct rio_mport *mport, resource_size_t size,
+ struct resource *new)
+{
+ int ret = 0;
+
+ /* Align the size to 2^N */
+ size = (size < 0x1000) ? 0x1000 : 1 << (__ilog2(size - 1) + 1);
+
+ if (!new) {
+ ERR("The res is NULL!\n");
+ ret = -EFAULT;
+ goto out;
+ }
+ memset(new, 0, sizeof(struct resource));
+
+ ret = allocate_resource(root, new, size, root->start, root->end,
+ size, NULL, 0);
+ if (ret) {
+ ERR("No more resource for size 0x%08x!\n", size);
+ goto out;
+ }
+
+out:
+ return ret;
+}
+
+#ifdef DEBUG
+/**
+ * rio_sa_dump_sect0 -- Dump the sect0 content.
+ * @psect0: The point of sect0
+ */
+static void rio_sa_dump_sect0(struct rio_sect0 *psect0)
+{
+ int i;
+
+ if (!psect0)
+ return;
+
+ printk("Rio Sect0 %p dump:\n", psect0);
+ printk("...id = 0x%08x, width = %d, rioid = %d \n",
+ psect0->id, psect0->width, psect0->rioid);
+ for (i = 0; i < SA_BITMAP_MAX_INB_RES; i++)
+ if (psect0->inb_res[i].ctrl & SA_RIO_RES_CTRL_EN)
+ printk("...inb_res[%d]: ctrl 0x%08x, owner 0x%08x\n"
+ "\t\textaddr 0x%08x, addr 0x%08x\n"
+ "\t\textsize 0x%08x, size 0x%08x\n", i,
+ psect0->inb_res[i].ctrl,
+ psect0->inb_res[i].owner,
+ psect0->inb_res[i].extaddr,
+ psect0->inb_res[i].addr,
+ psect0->inb_res[i].extsize,
+ psect0->inb_res[i].size);
+}
+#endif
+
+/**
+ * rio_space_claim -- Claim the memory in RapidIO space
+ * @mem: The memory should be claimed.
+ *
+ * When you get a memory space and get ready of it, you should claim it in
+ * RapidIO space. Then, the other device could get the memory by calling
+ * rio_space_find_mem().
+ */
+int rio_space_claim(struct rio_mem *mem)
+{
+ int i;
+
+ if (!sect0) {
+ ERR("Sect0 is NULL!\n");
+ return -EINVAL;
+ }
+#ifdef DEBUG
+ rio_sa_dump_sect0(sect0);
+#endif
+
+ for (i = 0; i < SA_BITMAP_MAX_INB_RES; i++)
+ if (!(sect0->inb_res[i].ctrl & SA_RIO_RES_CTRL_EN)) {
+ sect0->inb_res[i].ctrl |= SA_RIO_RES_CTRL_EN;
+ sect0->inb_res[i].addr = (u32)(mem->riores.start);
+ sect0->inb_res[i].size = (u32)(mem->riores.end
+ - mem->riores.start + 1);
+ if (IS_64BIT_RES) {
+ sect0->inb_res[i].extaddr =
+ (u64)mem->riores.start >> 32;
+ sect0->inb_res[i].extsize =
+ (u64)(mem->riores.end
+ - mem->riores.start + 1) >> 32;
+ }
+ sect0->inb_res[i].owner = mem->owner;
+ DBG("The new inbound rio mem added:\n");
+ DBG("...inb_res[%d]: ctrl 0x%08x, owner 0x%08x\n"
+ "\t\textaddr 0x%08x, addr 0x%08x\n"
+ "\t\textsize 0x%08x, size 0x%08x\n", i,
+ sect0->inb_res[i].ctrl,
+ sect0->inb_res[i].owner,
+ sect0->inb_res[i].extaddr,
+ sect0->inb_res[i].addr,
+ sect0->inb_res[i].extsize,
+ sect0->inb_res[i].size);
+ return 0;
+ }
+
+ ERR("No free inbound window!\n");
+ return -EBUSY;
+}
+
+/**
+ * rio_space_release -- remove the memory record from RapidIO space.
+ * It's the pair function of rio_space_claim().
+ *
+ * @inbmem: The memory should be release.
+ */
+void rio_space_release(struct rio_mem *inbmem)
+{
+ int i;
+
+ /* Remove it from sect0 inb_res array */
+ for (i = 0; i < SA_BITMAP_MAX_INB_RES; i++)
+ if ((sect0->inb_res[i].ctrl & SA_RIO_RES_CTRL_EN) &&
+ (((u64)sect0->inb_res[i].extaddr << 32 |
+ sect0->inb_res[i].addr)
+ == (u64)inbmem->riores.start)) {
+ sect0->inb_res[i].ctrl = 0;
+ sect0->inb_res[i].addr = 0;
+ sect0->inb_res[i].extaddr = 0;
+ sect0->inb_res[i].size = 0;
+ sect0->inb_res[i].extsize = 0;
+ }
+}
+
+/**
+ * rio_space_get_dev_mem -- get the whole owned inbound space of
+ * RapidIO device with did.
+ */
+static struct resource *rio_space_get_dev_mem(struct rio_mport *mport,
+ u16 did, struct resource *res)
+{
+ if(!res && !(res = kmalloc(sizeof(struct resource), GFP_KERNEL))) {
+ ERR("resource alloc error!\n");
+ return NULL;
+ }
+ memset(res, 0, sizeof(struct resource));
+
+ res->start = SA_RIO_RESERVE_SPACE + (did
+ << (rio_addr_size - __ilog2(RIO_ANY_DESTID(mport->sys_size)
+ + 1)));
+ res->end = res->start +
+ (1 << (rio_addr_size - __ilog2(RIO_ANY_DESTID(mport->sys_size)
+ + 1))) - 1;
+ res->flags = RIO_RESOURCE_MEM;
+
+ return res;
+}
+
+/**
+ * rio_space_find_mem -- Find the memory space (RIO) of the rio driver owned.
+ * @mport: RIO master port.
+ * @tid: The target RapidIO device id which will be searched.
+ * @owner: The driver id as the search keyword.
+ * @res: The result of finding.
+ *
+ * return:
+ * 0 -- Success
+ * -EFAULT -- Remote sect0 is a bad address
+ * -EPROTONOSUPPORT -- The remote space allocator protocol is not support
+ *
+ * This function will find the memory located in RapidIO space, which is owned
+ * by the driver. If the remote RapidIO device use the diffrent space allocator,
+ * it will return -EPROTONOSUPPORT.
+ */
+int rio_space_find_mem(struct rio_mport *mport, u16 tid,
+ u32 owner, struct resource *res)
+{
+ struct rio_sect0 __iomem *rsect0;
+ int i;
+ int ret = 0;
+ u32 width;
+
+ rio_space_get_dev_mem(mport, tid, &sblock_buf->riores);
+ sblock_buf->size = RIO_SBLOCK_SIZE;
+ rio_map_outb_region(mport, tid, sblock_buf, 0);
+
+ if (!sblock_buf->virt) {
+ ERR("Sect0 block buffer is NULL!\n");
+ ret = -EFAULT;
+ goto out;
+ }
+ rsect0 = sblock_buf->virt;
+
+ if (in_be32(&rsect0->id) != SA_BITMAP_DRV_ID) {
+ DBG("The target RapidIO space allocator is not rio_sa_bitmap! "
+ "id = 0x%x\n", rsect0->id);
+ ret = -EPROTONOSUPPORT;
+ goto out;
+ }
+
+#ifdef DEBUG
+ /* Dump remote sect0 for debug */
+ DBG("Dump the remote RIO dev %d sect0\n", tid);
+ rio_sa_dump_sect0(rsect0);
+#endif
+
+ width = in_be32(&rsect0->width);
+ if (sizeof(resource_size_t) * 8 < width)
+ printk(KERN_WARNING "WARNING: The system width %d is smaller "
+ "than the remote RapidIO space address width %d!",
+ sizeof(resource_size_t) * 8, width);
+
+ /* Find the rio space block */
+ for (i = 0; i < SA_BITMAP_MAX_INB_RES; i++)
+ if ((in_be32(&rsect0->inb_res[i].ctrl) & SA_RIO_RES_CTRL_EN)
+ && (in_be32(&rsect0->inb_res[i].owner) == owner )) {
+ if (!res) {
+ ERR("Resource NULL error!\n");
+ ret = -EFAULT;
+ goto out;
+ }
+ memset(res, 0, sizeof(struct resource));
+ res->start = (IS_64BIT_RES && (width > 32)) ?
+ in_be32(&rsect0->inb_res[i].extaddr) << 32 : 0
+ | rsect0->inb_res[i].addr;
+ res->end = res->start - 1 +
+ ((in_be32(&rsect0->inb_res[i].size)) |
+ ((IS_64BIT_RES && (width > 32)) ?
+ ((u64)(in_be32(&rsect0->inb_res[i].extsize))
+ << 32) : 0));
+ goto out;
+ }
+
+out:
+ rio_unmap_outb_region(mport, sblock_buf);
+ return ret;
+}
+
+/**
+ * rio_space_init -- RapidIO space allocator initialization function.
+ * @mport: The master port.
+ */
+int rio_space_init(struct rio_mport *mport)
+{
+ root = &mport->riores[RIO_INB_MEM_RESOURCE];
+ memset(root, 0, sizeof(struct resource));
+
+ rio_addr_size = get_rio_addr_size();
+
+ rio_space_get_dev_mem(mport, rio_get_mport_id(mport), root);
+ root->name = "rio_space_inb";
+
+ /* Alloc the sect 0 for space managerment */
+ memset(§0mem, 0, sizeof(struct rio_mem));
+ if(!(sect0mem.virt = dma_alloc_coherent(NULL, RIO_SBLOCK_SIZE,
+ §0mem.iores.start, GFP_KERNEL))) {
+ ERR("sect0 memory alloc error!\n");
+ return -ENOMEM;
+ }
+ sect0mem.iores.end = sect0mem.iores.start + RIO_SBLOCK_SIZE - 1;
+ sect0mem.size = RIO_SBLOCK_SIZE;
+
+ if(rio_space_request(mport, RIO_SBLOCK_SIZE, §0mem.riores))
+ return -ENOMEM;
+
+ sect0mem.riores.name = "sect 0";
+ sect0 = sect0mem.virt;
+ sect0->id = SA_BITMAP_DRV_ID;
+ sect0->rioid = rio_get_mport_id(mport);
+ sect0->width = rio_addr_size;
+
+ /* map outbond window to access rio inb */
+ rio_map_inb_region(mport, §0mem, 0);
+
+ /* Init sblock buffer for block seeking */
+ sblock_buf = rio_prepare_io_mem(mport, NULL, RIO_SBLOCK_SIZE,
+ "sblock_buf");
+ return 0;
+}
diff --git a/include/linux/rio.h b/include/linux/rio.h
index 68e3f68..d39d381 100644
--- a/include/linux/rio.h
+++ b/include/linux/rio.h
@@ -23,7 +23,6 @@
#include <linux/device.h>
#include <linux/rio_regs.h>
-#define RIO_ANY_DESTID 0xff
#define RIO_NO_HOPCOUNT -1
#define RIO_INVALID_DESTID 0xffff
@@ -39,11 +38,8 @@
entry is invalid (no route
exists for the device ID) */
-#ifdef CONFIG_RAPIDIO_8_BIT_TRANSPORT
-#define RIO_MAX_ROUTE_ENTRIES (1 << 8)
-#else
-#define RIO_MAX_ROUTE_ENTRIES (1 << 16)
-#endif
+#define RIO_MAX_ROUTE_ENTRIES(size) (size ? (1 << 16) : (1 << 8))
+#define RIO_ANY_DESTID(size) (size ? 0xffff : 0xff)
#define RIO_MAX_MBOX 4
#define RIO_MAX_MSG_SIZE 0x1000
@@ -69,6 +65,8 @@
#define RIO_DOORBELL_RESOURCE 0
#define RIO_INB_MBOX_RESOURCE 1
#define RIO_OUTB_MBOX_RESOURCE 2
+#define RIO_INB_MEM_RESOURCE 3
+#define RIO_OUTB_MEM_RESOURCE 4
extern struct bus_type rio_bus_type;
extern struct list_head rio_devices; /* list of all devices */
@@ -149,6 +147,11 @@ struct rio_dbell {
void *dev_id;
};
+enum rio_phy_type {
+ RIO_PHY_PARALLEL,
+ RIO_PHY_SERIAL,
+};
+
/**
* struct rio_mport - RIO master port info
* @dbells: List of doorbell events
@@ -174,9 +177,16 @@ struct rio_mport {
struct rio_msg outb_msg[RIO_MAX_MBOX];
int host_deviceid; /* Host device ID */
struct rio_ops *ops; /* maintenance transaction functions */
+ struct rio_mem_ops *mops; /* Memory functions */
unsigned char id; /* port ID, unique among all ports */
unsigned char index; /* port index, unique among all port
interfaces of the same type */
+ unsigned int sys_size; /* RapidIO common transport system size.
+ * 0 - Small size. 256 devices.
+ * 1 - Large size, 65536 devices.
+ */
+ enum rio_phy_type phy_type; /* RapidIO phy type */
+ void *priv; /* Master port private data */
unsigned char name[40];
};
@@ -211,7 +221,7 @@ struct rio_switch {
u16 switchid;
u16 hopcount;
u16 destid;
- u8 route_table[RIO_MAX_ROUTE_ENTRIES];
+ u16 *route_table;
int (*add_entry) (struct rio_mport * mport, u16 destid, u8 hopcount,
u16 table, u16 route_destid, u8 route_port);
int (*get_entry) (struct rio_mport * mport, u16 destid, u8 hopcount,
@@ -229,18 +239,19 @@ struct rio_switch {
* @dsend: Callback to send a doorbell message.
*/
struct rio_ops {
- int (*lcread) (int index, u32 offset, int len, u32 * data);
- int (*lcwrite) (int index, u32 offset, int len, u32 data);
- int (*cread) (int index, u16 destid, u8 hopcount, u32 offset, int len,
+ int (*lcread) (struct rio_mport *, int index, u32 offset, int len, u32 * data);
+ int (*lcwrite) (struct rio_mport *, int index, u32 offset, int len, u32 data);
+ int (*cread) (struct rio_mport *, int index, u16 destid, u8 hopcount, u32 offset, int len,
u32 * data);
- int (*cwrite) (int index, u16 destid, u8 hopcount, u32 offset, int len,
+ int (*cwrite) (struct rio_mport *, int index, u16 destid, u8 hopcount, u32 offset, int len,
u32 data);
- int (*dsend) (int index, u16 destid, u16 data);
+ int (*dsend) (struct rio_mport *, int index, u16 destid, u16 data);
};
#define RIO_RESOURCE_MEM 0x00000100
#define RIO_RESOURCE_DOORBELL 0x00000200
#define RIO_RESOURCE_MAILBOX 0x00000400
+#define RIO_RESOURCE_MAINT 0x00000800
#define RIO_RESOURCE_CACHEABLE 0x00010000
#define RIO_RESOURCE_PCI 0x00020000
@@ -309,6 +320,42 @@ struct rio_route_ops {
u16 table, u16 route_destid, u8 * route_port);
};
+/**
+ * Struct for RIO memory definition.
+ * @node: Node in list of memories
+ * @virt: The virtual address for mapped memory accessing.
+ * @owner: The owner id of this memory.
+ * @size: The size of memory space, it should same to iores and riores.
+ * @iores: The resource of local IO region for mapping.
+ * @riores: The resource of mapped RapidIO space region.
+ */
+struct rio_mem {
+ struct list_head node;
+ void *virt;
+ u32 owner;
+ resource_size_t size;
+ struct resource iores;
+ struct resource riores;
+};
+
+/**
+ * Struct for RIO memory definition.
+ * @map_inb: The function for mapping inbound memory window.
+ * @map_outb: The function for mapping outbound memory window.
+ * @unmap_inb: The function for unmapping inbound memory window.
+ * @unmap_outb: The function for unmapping outbound memory window.
+ */
+struct rio_mem_ops {
+ int (*map_inb) (struct rio_mport *, resource_size_t lstart,
+ resource_size_t rstart,
+ resource_size_t size, u32 flags);
+ int (*map_outb) (struct rio_mport *, resource_size_t lstart,
+ resource_size_t rstart,
+ resource_size_t size, u16 tid, u32 flags);
+ void (*unmap_inb) (struct rio_mport *, resource_size_t lstart);
+ void (*unmap_outb) (struct rio_mport *, resource_size_t lstart);
+};
+
/* Architecture and hardware-specific functions */
extern int rio_init_mports(void);
extern void rio_register_mport(struct rio_mport *);
diff --git a/include/linux/rio_drv.h b/include/linux/rio_drv.h
index 7adb2a1..70f778b 100644
--- a/include/linux/rio_drv.h
+++ b/include/linux/rio_drv.h
@@ -334,6 +334,16 @@ static inline void rio_init_dbell_res(struct resource *res, u16 start, u16 end)
res->flags = RIO_RESOURCE_DOORBELL;
}
+static inline void rio_init_io_res(struct resource *res, resource_size_t start,
+ resource_size_t end, const char *name, unsigned long flag)
+{
+ memset(res, 0, sizeof(struct resource));
+ res->start = start;
+ res->end = end;
+ res->name = name;
+ res->flags = flag;
+}
+
/**
* RIO_DEVICE - macro used to describe a specific RIO device
* @dev: the 16 bit RIO device ID
@@ -408,13 +418,33 @@ extern int rio_request_inb_dbell(struct rio_mport *, void *, u16, u16,
extern int rio_release_inb_dbell(struct rio_mport *, u16, u16);
extern struct resource *rio_request_outb_dbell(struct rio_dev *, u16, u16);
extern int rio_release_outb_dbell(struct rio_dev *, struct resource *);
+extern struct resource *rio_request_io_region(struct rio_mport *, void *,
+ u32, u32, const char *, unsigned long,
+ struct resource *);
+extern struct rio_mem *rio_prepare_io_mem(struct rio_mport *, struct rio_dev *,
+ resource_size_t, const char *);
/* Memory region management */
-int rio_claim_resource(struct rio_dev *, int);
-int rio_request_regions(struct rio_dev *, char *);
-void rio_release_regions(struct rio_dev *);
-int rio_request_region(struct rio_dev *, int, char *);
-void rio_release_region(struct rio_dev *, int);
+extern struct rio_mem *rio_request_inb_region(struct rio_mport *, void *,
+ resource_size_t, const char *, u32);
+extern struct rio_mem *rio_request_outb_region(struct rio_mport *,
+ void *, resource_size_t, const char *, u32);
+extern int rio_release_inb_region(struct rio_mport *, struct rio_mem *);
+extern int rio_release_outb_region(struct rio_mport *, struct rio_mem *);
+
+/* Memory low-level mapping functions */
+extern int rio_map_inb_region(struct rio_mport *, struct rio_mem *, u32);
+extern int rio_map_outb_region(struct rio_mport *, u16, struct rio_mem *, u32);
+extern void rio_unmap_inb_region(struct rio_mport *, struct rio_mem *);
+extern void rio_unmap_outb_region(struct rio_mport *, struct rio_mem *);
+
+/* Memory Allocator */
+extern int rio_space_request(struct rio_mport *, resource_size_t,
+ struct resource *);
+extern int rio_space_find_mem(struct rio_mport *, u16, u32, struct resource *);
+extern int rio_space_init(struct rio_mport *);
+extern int rio_space_claim(struct rio_mem *);
+extern void rio_space_release(struct rio_mem *);
/* LDM support */
int rio_register_driver(struct rio_driver *);
@@ -464,6 +494,7 @@ extern u16 rio_local_get_device_id(struct rio_mport *port);
extern struct rio_dev *rio_get_device(u16 vid, u16 did, struct rio_dev *from);
extern struct rio_dev *rio_get_asm(u16 vid, u16 did, u16 asm_vid, u16 asm_did,
struct rio_dev *from);
+extern u32 rio_get_mport_id(struct rio_mport *);
#endif /* __KERNEL__ */
#endif /* LINUX_RIO_DRV_H */
--
1.5.1
^ permalink raw reply related
* [PATCH v3]: Fix e500 v2 core reboot bug
From: Zang Roy-r61911 @ 2007-06-12 9:08 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev list, Paul Mackerras
In-Reply-To: <1180406209.8139.13.camel@localhost.localdomain>
From: roy zang <tie-fei.zang@freescale.com>
Fix the reset bug on 8548CDS board.
>From MPC8548CDS with e500 v2 core, a new reset control register is added.
This register is used for the cpu reset.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
---
I will update the booting-without-of.txt and apply
this method to 8544/8641 in next serial patches.
arch/powerpc/boot/dts/mpc8548cds.dts | 6 ++++++
arch/powerpc/platforms/85xx/misc.c | 30 ++++++++++++++++++++++++++++++
2 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index ad96381..0550a3c 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -177,6 +177,12 @@
interrupt-parent = <&mpic>;
};
+ global-utilities@e0000 { //global utilities reg
+ compatible = "fsl,mpc8548-guts";
+ reg = <e0000 1000>;
+ fsl,has-rstcr;
+ };
+
pci1: pci@8000 {
interrupt-map-mask = <1f800 0 0 7>;
interrupt-map = <
diff --git a/arch/powerpc/platforms/85xx/misc.c b/arch/powerpc/platforms/85xx/misc.c
index 3e62fcb..6d9451c 100644
--- a/arch/powerpc/platforms/85xx/misc.c
+++ b/arch/powerpc/platforms/85xx/misc.c
@@ -13,11 +13,41 @@
#include <linux/irq.h>
#include <linux/module.h>
#include <asm/irq.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <sysdev/fsl_soc.h>
+
+static __be32 __iomem *rstcr;
extern void abort(void);
+static int __init mpc85xx_rstcr(void)
+{
+ struct device_node *np;
+ np = of_find_node_by_name(NULL, "global-utilities");
+ if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
+ const u32 *prop = of_get_property(np, "reg", NULL);
+ if (prop) {
+ /* map reset control register
+ * 0xE00B0 is offset of reset control register
+ */
+ rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
+ if (!rstcr)
+ printk (KERN_EMERG "Error: reset control register not mapped, spinning!\n");
+ }
+ else
+ printk (KERN_INFO "rstcr compatible register does not exist!\n");
+ }
+ return 0;
+}
+
+arch_initcall(mpc85xx_rstcr);
+
void mpc85xx_restart(char *cmd)
{
local_irq_disable();
+ if (rstcr)
+ /* set reset control register */
+ out_be32(rstcr, 0x2); /* HRESET_REQ */
abort();
}
--
1.5.1
^ permalink raw reply related
* [PATCH 1/1] Add support for MSI on Axon-based Cell systems
From: Michael Ellerman @ 2007-06-12 9:33 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Milton Miller, Arnd Bergmann
This patch adds support for the setup and decoding of MSIs
on Axon-based Cell systems.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
---
Updated to address everyone's comments I think.
arch/powerpc/platforms/cell/Makefile | 2 +
arch/powerpc/platforms/cell/axon_msi.c | 491 ++++++++++++++++++++++++++++++++
2 files changed, 493 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/cell/Makefile b/arch/powerpc/platforms/cell/Makefile
index 869af89..6615d40 100644
--- a/arch/powerpc/platforms/cell/Makefile
+++ b/arch/powerpc/platforms/cell/Makefile
@@ -23,3 +23,5 @@ obj-$(CONFIG_SPU_BASE) += spu_callbacks.o spu_base.o \
$(spu-priv1-y) \
$(spu-manage-y) \
spufs/
+
+obj-$(CONFIG_PCI_MSI) += axon_msi.o
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c
new file mode 100644
index 0000000..63a32b4
--- /dev/null
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -0,0 +1,491 @@
+/*
+ * Copyright 2007, Michael Ellerman, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/debugfs.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/msi.h>
+#include <linux/reboot.h>
+
+#include <asm/dcr.h>
+#include <asm/machdep.h>
+#include <asm/prom.h>
+
+
+/*
+ * MSIC registers, specified as offsets from dcr_base
+ */
+#define MSIC_CTRL_REG 0x0
+
+/* Base Address registers specify FIFO location in BE memory */
+#define MSIC_BASE_ADDR_HI_REG 0x3
+#define MSIC_BASE_ADDR_LO_REG 0x4
+
+/* Hold the read/write offsets into the FIFO */
+#define MSIC_READ_OFFSET_REG 0x5
+#define MSIC_WRITE_OFFSET_REG 0x6
+
+
+/* Flags */
+#define MSIC_ENABLE 0x0001
+#define MSIC_FIFO_FULL_ENABLE 0x0002
+#define MSIC_IRQ_ENABLE 0x0008
+#define MSIC_FULL_STOP_ENABLE 0x0010
+
+/* Size configuration constants */
+#define MSIC_SIZE_MASK 0x0180
+#define MSIC_SIZE_SHIFT (7)
+#define MSIC_SIZE_32K 0x0
+#define MSIC_SIZE_64K 0x1
+#define MSIC_SIZE_128K 0x2
+#define MSIC_SIZE_256K 0x3
+
+#define MSIC_FIFO_ENTRY_SIZE 0x10
+
+/* The size we're actually using */
+#define MSIC_FIFO_SIZE MSIC_SIZE_32K
+
+/* Different representations of the fifo size */
+#define MSIC_FIFO_SHIFT (MSIC_FIFO_SIZE + 15)
+#define MSIC_FIFO_BYTES (1 << MSIC_FIFO_SHIFT)
+#define MSIC_FIFO_ORDER max(MSIC_FIFO_SHIFT - PAGE_SHIFT, 0)
+
+/* FIFO locations should always be 16-byte aligned */
+#define MSIC_FIFO_MASK ((MSIC_FIFO_BYTES - 1) & ~0xFu)
+
+
+struct axon_msic {
+ struct device_node *dn;
+ struct irq_host *irq_host;
+ __le32 *fifo;
+ dcr_host_t dcr_host;
+ struct list_head list;
+ u32 read_offset;
+ u32 dcr_base;
+#ifdef DEBUG
+ u32 __iomem *trigger;
+#endif
+};
+
+void axon_msi_debug_setup(struct device_node *dn, struct axon_msic *msic);
+
+static LIST_HEAD(axon_msic_list);
+
+static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val)
+{
+ dcr_write(msic->dcr_host, msic->dcr_base + dcr_n, val);
+}
+
+static u32 msic_dcr_read(struct axon_msic *msic, unsigned int dcr_n)
+{
+ return dcr_read(msic->dcr_host, msic->dcr_base + dcr_n);
+}
+
+static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)
+{
+ struct axon_msic *msic = get_irq_data(irq);
+ u32 write_offset, msi;
+ int idx;
+
+ write_offset = msic_dcr_read(msic, MSIC_WRITE_OFFSET_REG);
+ pr_debug("axon_msi: original write_offset 0x%x\n", write_offset);
+
+ /* write_offset doesn't wrap properly, so we have to mask it */
+ write_offset &= MSIC_FIFO_MASK;
+
+ while (msic->read_offset != write_offset) {
+ idx = msic->read_offset / sizeof(__le32);
+ msi = le32_to_cpu(msic->fifo[idx]);
+ msi &= 0xFFFF;
+
+ pr_debug("axon_msi: woff %x roff %x msi %x\n",
+ write_offset, msic->read_offset, msi);
+
+ msic->read_offset += MSIC_FIFO_ENTRY_SIZE;
+ msic->read_offset &= MSIC_FIFO_MASK;
+
+ if (msi < NR_IRQS && irq_map[msi].host == msic->irq_host)
+ generic_handle_irq(msi);
+ else
+ pr_debug("axon_msi: invalid irq 0x%x!\n", msi);
+ }
+
+ msic_dcr_write(msic, MSIC_READ_OFFSET_REG, msic->read_offset);
+
+ desc->chip->eoi(irq);
+}
+
+static struct axon_msic *find_msi_translator(struct pci_dev *dev)
+{
+ struct irq_host *irq_host;
+ struct device_node *dn, *tmp;
+ const phandle *ph;
+ struct axon_msic *msic = NULL;
+
+ dn = pci_device_to_OF_node(dev);
+ if (!dn) {
+ dev_dbg(&dev->dev, "axon_msi: no pci_dn found\n");
+ return NULL;
+ }
+
+ for (; dn; tmp = of_get_parent(dn), of_node_put(dn), dn = tmp) {
+ ph = of_get_property(dn, "msi-translator", NULL);
+ if (ph)
+ break;
+ }
+
+ if (!ph) {
+ dev_dbg(&dev->dev,
+ "axon_msi: no msi-translator property found\n");
+ goto out_error;
+ }
+
+ tmp = dn;
+ dn = of_find_node_by_phandle(*ph);
+ if (!dn) {
+ dev_dbg(&dev->dev,
+ "axon_msi: msi-translator doesn't point to a node\n");
+ goto out_error;
+ }
+
+ irq_host = irq_find_host(dn);
+ if (!irq_host) {
+ dev_dbg(&dev->dev, "axon_msi: no irq_host found for node %s\n",
+ dn->full_name);
+ goto out_error;
+ }
+
+ msic = irq_host->host_data;
+
+out_error:
+ of_node_put(dn);
+ of_node_put(tmp);
+
+ return msic;
+}
+
+static int axon_msi_check_device(struct pci_dev *dev, int nvec, int type)
+{
+ if (!find_msi_translator(dev))
+ return -ENODEV;
+
+ return 0;
+}
+
+static int setup_msi_msg_address(struct pci_dev *dev, struct msi_msg *msg)
+{
+ struct device_node *dn, *tmp;
+ struct msi_desc *entry;
+ int len;
+ const u32 *prop;
+
+ dn = pci_device_to_OF_node(dev);
+ if (!dn) {
+ dev_dbg(&dev->dev, "axon_msi: no pci_dn found\n");
+ return -ENODEV;
+ }
+
+ entry = list_first_entry(&dev->msi_list, struct msi_desc, list);
+
+ for (; dn; tmp = of_get_parent(dn), of_node_put(dn), dn = tmp) {
+ if (entry->msi_attrib.is_64) {
+ prop = of_get_property(dn, "msi-address-64", &len);
+ if (prop)
+ break;
+ }
+
+ prop = of_get_property(dn, "msi-address-32", &len);
+ if (prop)
+ break;
+ }
+
+ if (!prop) {
+ dev_dbg(&dev->dev,
+ "axon_msi: no msi-address-(32|64) properties found\n");
+ return -ENOENT;
+ }
+
+ switch (len) {
+ case 8:
+ msg->address_hi = prop[0];
+ msg->address_lo = prop[1];
+ break;
+ case 4:
+ msg->address_hi = 0;
+ msg->address_lo = prop[0];
+ break;
+ default:
+ dev_dbg(&dev->dev,
+ "axon_msi: malformed msi-address-(32|64) property\n");
+ of_node_put(dn);
+ return -EINVAL;
+ }
+
+ of_node_put(dn);
+
+ return 0;
+}
+
+static int axon_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+{
+ unsigned int virq, rc;
+ struct msi_desc *entry;
+ struct msi_msg msg;
+ struct axon_msic *msic;
+
+ msic = find_msi_translator(dev);
+ if (!msic)
+ return -ENODEV;
+
+ rc = setup_msi_msg_address(dev, &msg);
+ if (rc)
+ return rc;
+
+ /* We rely on being able to stash a virq in a u16 */
+ BUILD_BUG_ON(NR_IRQS > 65536);
+
+ list_for_each_entry(entry, &dev->msi_list, list) {
+ virq = irq_create_direct_mapping(msic->irq_host);
+ if (virq == NO_IRQ) {
+ dev_warn(&dev->dev,
+ "axon_msi: virq allocation failed!\n");
+ return -1;
+ }
+ dev_dbg(&dev->dev, "axon_msi: allocated virq 0x%x\n", virq);
+
+ set_irq_msi(virq, entry);
+ msg.data = virq;
+ write_msi_msg(virq, &msg);
+ }
+
+ return 0;
+}
+
+static void axon_msi_teardown_msi_irqs(struct pci_dev *dev)
+{
+ struct msi_desc *entry;
+
+ dev_dbg(&dev->dev, "axon_msi: tearing down msi irqs");
+
+ list_for_each_entry(entry, &dev->msi_list, list) {
+ if (entry->irq == NO_IRQ)
+ continue;
+
+ set_irq_msi(entry->irq, NULL);
+ irq_dispose_mapping(entry->irq);
+ }
+}
+
+static struct irq_chip msic_irq_chip = {
+ .mask = mask_msi_irq,
+ .unmask = unmask_msi_irq,
+ .shutdown = unmask_msi_irq,
+ .typename = "AXON-MSI",
+};
+
+static int msic_host_map(struct irq_host *h, unsigned int virq,
+ irq_hw_number_t hw)
+{
+ set_irq_chip_and_handler(virq, &msic_irq_chip, handle_simple_irq);
+
+ return 0;
+}
+
+static int msic_host_match(struct irq_host *host, struct device_node *dn)
+{
+ struct axon_msic *msic = host->host_data;
+
+ return msic->dn == dn;
+}
+
+static struct irq_host_ops msic_host_ops = {
+ .match = msic_host_match,
+ .map = msic_host_map,
+};
+
+static int axon_msi_notify_reboot(struct notifier_block *nb,
+ unsigned long code, void *data)
+{
+ struct axon_msic *msic;
+ u32 tmp;
+
+ list_for_each_entry(msic, &axon_msic_list, list) {
+ tmp = msic_dcr_read(msic, MSIC_CTRL_REG);
+ tmp &= ~MSIC_ENABLE;
+ pr_debug("axon_msi: disabling %s\n", msic->dn->full_name);
+ msic_dcr_write(msic, MSIC_CTRL_REG, tmp);
+ }
+
+ return 0;
+}
+
+static struct notifier_block axon_msi_reboot_notifier = {
+ .notifier_call = axon_msi_notify_reboot
+};
+
+static int axon_msi_setup_one(struct device_node *dn)
+{
+ struct page *page;
+ struct axon_msic *msic;
+ unsigned int virq;
+ int dcr_len;
+
+ pr_debug("axon_msi: setting up dn %s\n", dn->full_name);
+
+ msic = kzalloc(sizeof(struct axon_msic), GFP_KERNEL);
+ if (!msic) {
+ printk(KERN_ERR "axon_msi: couldn't allocate msic for %s\n",
+ dn->full_name);
+ goto out;
+ }
+
+ msic->dcr_base = dcr_resource_start(dn, 0);
+ dcr_len = dcr_resource_len(dn, 0);
+
+ if (msic->dcr_base == 0 || dcr_len == 0) {
+ printk(KERN_ERR
+ "axon_msi: couldn't parse dcr properties on %s\n",
+ dn->full_name);
+ goto out;
+ }
+
+ msic->dcr_host = dcr_map(dn, msic->dcr_base, dcr_len);
+ if (!DCR_MAP_OK(msic->dcr_host)) {
+ printk(KERN_ERR "axon_msi: dcr_map failed for %s\n",
+ dn->full_name);
+ goto out_free_msic;
+ }
+
+ page = alloc_pages_node(of_node_to_nid(dn),
+ GFP_KERNEL, MSIC_FIFO_ORDER);
+ if (!page) {
+ printk(KERN_ERR "axon_msi: couldn't allocate fifo for %s\n",
+ dn->full_name);
+ goto out_free_msic;
+ }
+
+ msic->fifo = page_address(page);
+
+ msic->irq_host = irq_alloc_host(IRQ_HOST_MAP_NOMAP, NR_IRQS,
+ &msic_host_ops, 0);
+ if (!msic->irq_host) {
+ printk(KERN_ERR "axon_msi: couldn't allocate irq_host for %s\n",
+ dn->full_name);
+ goto out_free_fifo;
+ }
+
+ msic->irq_host->host_data = msic;
+
+ virq = irq_of_parse_and_map(dn, 0);
+ if (virq == NO_IRQ) {
+ printk(KERN_ERR "axon_msi: irq parse and map failed for %s\n",
+ dn->full_name);
+ goto out_free_host;
+ }
+
+ msic->dn = of_node_get(dn);
+
+ set_irq_data(virq, msic);
+ set_irq_chained_handler(virq, axon_msi_cascade);
+ pr_debug("axon_msi: irq 0x%x setup for axon_msi\n", virq);
+
+ /* Enable the MSIC hardware */
+ msic_dcr_write(msic, MSIC_BASE_ADDR_HI_REG, (u64)msic->fifo >> 32);
+ msic_dcr_write(msic, MSIC_BASE_ADDR_LO_REG,
+ (u64)msic->fifo & 0xFFFFFFFF);
+ msic_dcr_write(msic, MSIC_CTRL_REG, MSIC_IRQ_ENABLE | MSIC_ENABLE |
+ (MSIC_FIFO_SIZE << MSIC_SIZE_SHIFT));
+#ifdef DEBUG
+ axon_msi_debug_setup(dn, msic);
+#endif
+ list_add(&msic->list, &axon_msic_list);
+
+ printk(KERN_DEBUG "axon_msi: setup MSIC on %s\n", dn->full_name);
+
+ return 0;
+
+out_free_host:
+ kfree(msic->irq_host);
+out_free_fifo:
+ __free_pages(virt_to_page(msic->fifo), MSIC_FIFO_ORDER);
+out_free_msic:
+ kfree(msic);
+out:
+
+ return -1;
+}
+
+static int axon_msi_init(void)
+{
+ struct device_node *dn;
+ int found = 0;
+
+ pr_debug("axon_msi: initialising ...\n");
+
+ for_each_compatible_node(dn, NULL, "ibm,axon-msic") {
+ if (axon_msi_setup_one(dn) == 0)
+ found++;
+ }
+
+ if (found) {
+ ppc_md.setup_msi_irqs = axon_msi_setup_msi_irqs;
+ ppc_md.teardown_msi_irqs = axon_msi_teardown_msi_irqs;
+ ppc_md.msi_check_device = axon_msi_check_device;
+
+ register_reboot_notifier(&axon_msi_reboot_notifier);
+
+ pr_debug("axon_msi: registered callbacks!\n");
+ }
+
+ return 0;
+}
+arch_initcall(axon_msi_init);
+
+#ifdef DEBUG
+static void msic_set(void *data, u64 val)
+{
+ struct axon_msic *msic = data;
+
+ out_le32(msic->trigger, val);
+}
+
+static u64 msic_get(void *data)
+{
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(fops_msic, msic_get, msic_set, "%llu\n");
+
+void axon_msi_debug_setup(struct device_node *dn, struct axon_msic *msic)
+{
+ char name[8];
+ u64 addr;
+
+ addr = of_translate_address(dn, of_get_property(dn, "reg", NULL));
+ if (addr == OF_BAD_ADDR) {
+ pr_debug("axon_msi: couldn't translate reg property\n");
+ return;
+ }
+
+ msic->trigger = ioremap(addr, 0x4);
+ if (!msic->trigger) {
+ pr_debug("axon_msi: ioremap failed\n");
+ return;
+ }
+
+ snprintf(name, sizeof(name), "msic_%d", of_node_to_nid(dn));
+
+ if (!debugfs_create_file(name, 0600, NULL, msic, &fops_msic)) {
+ pr_debug("axon_msi: debugfs_create_file failed!\n");
+ return;
+ }
+}
+#endif
--
1.5.1.3.g7a33b
^ permalink raw reply related
* [PATCH] mpc5200: rtc driver
From: Domen Puncer @ 2007-06-12 9:38 UTC (permalink / raw)
To: linuxppc-embedded
Driver for internal rtc on mpc5200.
It isn't very useful, since its contents don't remain on
power off.
Can be used to set alarm for wake-up from deep-sleep or
one second periodic interrupt ;-)
Signed-off-by: Domen Puncer <domen.puncer@telargo.com>
---
drivers/rtc/Kconfig | 10 +
drivers/rtc/Makefile | 1
drivers/rtc/rtc-mpc5200.c | 282 ++++++++++++++++++++++++++++++++++++++
include/asm-powerpc/mpc5200_rtc.h | 49 ++++++
4 files changed, 342 insertions(+)
Index: work-powerpc.git/drivers/rtc/Kconfig
===================================================================
--- work-powerpc.git.orig/drivers/rtc/Kconfig
+++ work-powerpc.git/drivers/rtc/Kconfig
@@ -401,4 +401,14 @@ config RTC_DRV_RS5C313
help
If you say yes here you get support for the Ricoh RS5C313 RTC chips.
+config RTC_DRV_MPC5200
+ tristate "MPC5200 RTC"
+ depends on RTC_CLASS
+ help
+ If you say yes here you will get support for the
+ RTC built in MPC5200(b) CPU.
+
+ This driver can also be built as a module. If so, the module
+ will be called rtc-mpc5200.
+
endmenu
Index: work-powerpc.git/drivers/rtc/Makefile
===================================================================
--- work-powerpc.git.orig/drivers/rtc/Makefile
+++ work-powerpc.git/drivers/rtc/Makefile
@@ -41,3 +41,4 @@ obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020
obj-$(CONFIG_RTC_DRV_AT91RM9200)+= rtc-at91rm9200.o
obj-$(CONFIG_RTC_DRV_SH) += rtc-sh.o
obj-$(CONFIG_RTC_DRV_BFIN) += rtc-bfin.o
+obj-$(CONFIG_RTC_DRV_MPC5200) += rtc-mpc5200.o
Index: work-powerpc.git/drivers/rtc/rtc-mpc5200.c
===================================================================
--- /dev/null
+++ work-powerpc.git/drivers/rtc/rtc-mpc5200.c
@@ -0,0 +1,282 @@
+#include <linux/module.h>
+#include <linux/rtc.h>
+#include <asm/of_device.h>
+#include <asm/of_platform.h>
+#include <asm/io.h>
+#include <asm/mpc52xx.h>
+#include <asm/mpc5200_rtc.h>
+
+
+struct mpc5200_rtc_data {
+ unsigned irq;
+ unsigned irq_periodic;
+ struct mpc52xx_rtc __iomem *regs;
+ struct rtc_device *rtc;
+};
+
+static int mpc5200_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+ struct mpc5200_rtc_data *rtc = dev_get_drvdata(dev);
+ struct mpc52xx_rtc __iomem *regs = rtc->regs;
+ int tmp;
+
+ tm->tm_sec = in_8(®s->second);
+ tm->tm_min = in_8(®s->minute);
+
+ /* 12 hour format? */
+ if (in_8(®s->hour) & 0x20)
+ tm->tm_hour = (in_8(®s->hour) >> 1) + (in_8(®s->hour) & 1 ? 12 : 0);
+ else
+ tm->tm_hour = in_8(®s->hour);
+
+ tmp = in_8(®s->wday_mday);
+ tm->tm_mday = tmp & 0x1f;
+ tm->tm_mon = in_8(®s->month) - 1;
+ tm->tm_year = in_be16(®s->year) - 1900;
+ tm->tm_wday = (tmp >> 5) % 7;
+ tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
+ tm->tm_isdst = 0;
+
+ return 0;
+}
+
+static int mpc5200_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+ struct mpc5200_rtc_data *rtc = dev_get_drvdata(dev);
+ struct mpc52xx_rtc __iomem *regs = rtc->regs;
+
+ /* time */
+ out_8(®s->second_set, tm->tm_sec);
+ out_8(®s->minute_set, tm->tm_min);
+ out_8(®s->hour_set, tm->tm_hour);
+
+ /* set time sequence */
+ out_8(®s->set_time, 0x1);
+ out_8(®s->set_time, 0x3);
+ out_8(®s->set_time, 0x1);
+ out_8(®s->set_time, 0x0);
+
+ /* date */
+ out_8(®s->month_set, tm->tm_mon + 1);
+ out_8(®s->weekday_set, tm->tm_wday ? tm->tm_wday : 7);
+ out_8(®s->date_set, tm->tm_mday);
+ out_be16(®s->year_set, tm->tm_year + 1900);
+
+ /* set date sequence */
+ out_8(®s->set_date, 0x1);
+ out_8(®s->set_date, 0x3);
+ out_8(®s->set_date, 0x1);
+ out_8(®s->set_date, 0x0);
+
+ return 0;
+}
+
+static int mpc5200_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+ struct mpc5200_rtc_data *rtc = dev_get_drvdata(dev);
+ struct mpc52xx_rtc __iomem *regs = rtc->regs;
+
+ alrm->time.tm_sec = -1;
+ alrm->time.tm_min = in_8(®s->alm_min_set);
+ alrm->time.tm_hour = in_8(®s->alm_hour_set);
+
+ alrm->time.tm_mday = -1;
+ alrm->time.tm_mon = -1;
+ alrm->time.tm_year = -1;
+
+ alrm->enabled = in_8(®s->alm_enable);
+ alrm->pending = in_8(®s->alm_status);
+
+ return 0;
+}
+
+static int mpc5200_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+ struct mpc5200_rtc_data *rtc = dev_get_drvdata(dev);
+ struct mpc52xx_rtc __iomem *regs = rtc->regs;
+
+ out_8(®s->alm_min_set, alrm->time.tm_min);
+ out_8(®s->alm_hour_set, alrm->time.tm_hour);
+
+ out_8(®s->alm_enable, alrm->enabled);
+
+ return 0;
+}
+
+static irqreturn_t rtc_handler(int irq, void *dev)
+{
+ struct mpc5200_rtc_data *rtc = dev_get_drvdata((struct device *)dev);
+ struct mpc52xx_rtc __iomem *regs = rtc->regs;
+
+ if (in_8(®s->int_alm)) {
+ /* acknowledge */
+ out_8(®s->int_alm, 1);
+
+ rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
+ return IRQ_HANDLED;
+ }
+
+ return IRQ_NONE;
+}
+
+static irqreturn_t rtc_handler_upd(int irq, void *dev)
+{
+ struct mpc5200_rtc_data *rtc = dev_get_drvdata((struct device *)dev);
+ struct mpc52xx_rtc __iomem *regs = rtc->regs;
+
+ if (in_8(®s->int_sec) && (in_8(®s->int_enable) & 0x1)) {
+ /* acknowledge */
+ out_8(®s->int_sec, 1);
+
+ rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_UF);
+ return IRQ_HANDLED;
+ }
+
+ return IRQ_NONE;
+}
+
+static int mpc5200_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
+{
+ struct mpc5200_rtc_data *rtc = dev_get_drvdata(dev);
+ struct mpc52xx_rtc __iomem *regs = rtc->regs;
+
+ switch (cmd) {
+ /* alarm interrupt */
+ case RTC_AIE_ON:
+ out_8(®s->alm_enable, 1);
+ break;
+ case RTC_AIE_OFF:
+ out_8(®s->alm_enable, 0);
+ break;
+
+ /* update interrupt (periodic second in mpc5200 words) */
+ case RTC_UIE_ON:
+ out_8(®s->int_enable, (in_8(®s->int_enable) & ~0x8) | 0x1);
+ break;
+ case RTC_UIE_OFF:
+ out_8(®s->int_enable, in_8(®s->int_enable) & ~0x1);
+ break;
+
+ /* no periodic interrupts */
+ case RTC_IRQP_READ:
+ case RTC_IRQP_SET:
+ return -ENOTTY;
+
+ default:
+ return -ENOIOCTLCMD;
+ }
+ return 0;
+}
+
+static const struct rtc_class_ops mpc5200_rtc_ops = {
+ .read_time = mpc5200_rtc_read_time,
+ .set_time = mpc5200_rtc_set_time,
+ .read_alarm = mpc5200_rtc_read_alarm,
+ .set_alarm = mpc5200_rtc_set_alarm,
+ .ioctl = mpc5200_rtc_ioctl,
+};
+
+static int __devinit mpc5200_rtc_probe(struct of_device *op, const struct of_device_id *match)
+{
+ struct mpc5200_rtc_data *rtc;
+ int err = 0;
+
+ rtc = kzalloc(sizeof(*rtc), GFP_KERNEL);
+ if (!rtc) {
+ err = -ENOMEM;
+ goto out;
+ }
+
+ rtc->regs = mpc52xx_find_and_map("mpc5200-rtc");
+ if (!rtc->regs) {
+ printk(KERN_ERR "%s: couldn't map io space\n", __func__);
+ err = -ENOSYS;
+ goto out_free;
+ }
+
+ rtc->rtc = rtc_device_register("mpc5200-rtc", &op->dev,
+ &mpc5200_rtc_ops, THIS_MODULE);
+ if (IS_ERR(rtc->rtc)) {
+ err = PTR_ERR(rtc->rtc);
+ goto out_unmap;
+ }
+
+ dev_set_drvdata(&op->dev, rtc);
+
+ rtc->irq = irq_of_parse_and_map(op->node, 1);
+ if ((err = request_irq(rtc->irq, rtc_handler, IRQF_DISABLED, "mpc5200-rtc", &op->dev))) {
+ printk(KERN_ERR "%s: could not request irq: %i\n", __func__, rtc->irq);
+ goto out_dispose;
+ }
+
+ rtc->irq_periodic = irq_of_parse_and_map(op->node, 0);
+ if ((err = request_irq(rtc->irq_periodic, rtc_handler_upd, IRQF_DISABLED,
+ "mpc5200-rtc_upd", &op->dev))) {
+ printk(KERN_ERR "%s: could not request irq: %i\n", __func__, rtc->irq_periodic);
+ goto out_dispose2;
+ }
+
+ goto out;
+
+ out_dispose2:
+ irq_dispose_mapping(rtc->irq_periodic);
+ free_irq(rtc->irq, &op->dev);
+ out_dispose:
+ irq_dispose_mapping(rtc->irq);
+ out_unmap:
+ iounmap(rtc->regs);
+ out_free:
+ kfree(rtc);
+ out:
+ return err;
+}
+
+static int __devexit mpc5200_rtc_remove(struct of_device *op)
+{
+ struct mpc5200_rtc_data *rtc = dev_get_drvdata(&op->dev);
+ struct mpc52xx_rtc __iomem *regs = rtc->regs;
+
+ /* disable interrupt, so there are no nasty surprises */
+ out_8(®s->alm_enable, 0);
+ out_8(®s->int_enable, in_8(®s->int_enable) & ~0x1);
+
+ rtc_device_unregister(rtc->rtc);
+ iounmap(rtc->regs);
+ free_irq(rtc->irq, &op->dev);
+ free_irq(rtc->irq_periodic, &op->dev);
+ irq_dispose_mapping(rtc->irq);
+ irq_dispose_mapping(rtc->irq_periodic);
+ kfree(rtc);
+ dev_set_drvdata(&op->dev, NULL);
+
+ return 0;
+}
+
+static struct of_device_id mpc5200_rtc_match[] = {
+ { .type = "rtc", .compatible = "mpc5200-rtc", },
+ {},
+};
+
+static struct of_platform_driver mpc5200_rtc_driver = {
+ .owner = THIS_MODULE,
+ .name = "mpc5200-rtc",
+ .match_table = mpc5200_rtc_match,
+ .probe = mpc5200_rtc_probe,
+ .remove = mpc5200_rtc_remove,
+};
+
+static int __init mpc5200_rtc_init(void)
+{
+ return of_register_platform_driver(&mpc5200_rtc_driver);
+}
+
+static void __exit mpc5200_rtc_exit(void)
+{
+ of_unregister_platform_driver(&mpc5200_rtc_driver);
+}
+
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_AUTHOR("Domen Puncer <domen.puncer@telargo.com>");
+
+module_init(mpc5200_rtc_init);
+module_exit(mpc5200_rtc_exit);
Index: work-powerpc.git/include/asm-powerpc/mpc5200_rtc.h
===================================================================
--- /dev/null
+++ work-powerpc.git/include/asm-powerpc/mpc5200_rtc.h
@@ -0,0 +1,49 @@
+#ifndef _MPC5200_RTC_H_
+#define _MPC5200_RTC_H_
+
+/* RTC */
+struct mpc52xx_rtc {
+ u8 set_time; /* RTC + 0x00 */
+ u8 hour_set; /* RTC + 0x01 */
+ u8 minute_set; /* RTC + 0x02 */
+ u8 second_set; /* RTC + 0x03 */
+
+ u8 set_date; /* RTC + 0x04 */
+ u8 month_set; /* RTC + 0x05 */
+ u8 weekday_set; /* RTC + 0x06 */
+ u8 date_set; /* RTC + 0x07 */
+
+ u8 write_sw; /* RTC + 0x08 */
+ u8 sw_set; /* RTC + 0x09 */
+ u16 year_set; /* RTC + 0x0a */
+
+ u8 alm_enable; /* RTC + 0x0c */
+ u8 alm_hour_set; /* RTC + 0x0d */
+ u8 alm_min_set; /* RTC + 0x0e */
+ u8 int_enable; /* RTC + 0x0f */
+
+ u8 reserved1;
+ u8 hour; /* RTC + 0x11 */
+ u8 minute; /* RTC + 0x12 */
+ u8 second; /* RTC + 0x13 */
+
+ u8 month; /* RTC + 0x14 */
+ u8 wday_mday; /* RTC + 0x15 */
+ u16 year; /* RTC + 0x16 */
+
+ u8 int_alm; /* RTC + 0x18 */
+ u8 int_sw; /* RTC + 0x19 */
+ u8 alm_status; /* RTC + 0x1a */
+ u8 sw_minute; /* RTC + 0x1b */
+
+ u8 bus_error_1; /* RTC + 0x1c */
+ u8 int_day; /* RTC + 0x1d */
+ u8 int_min; /* RTC + 0x1e */
+ u8 int_sec; /* RTC + 0x1f */
+
+ u8 pterm; /* RTC + 0x20 */
+ u8 eterm; /* RTC + 0x21 */
+ u16 reserved2;
+};
+
+#endif /* _MPC5200_RTC_H_ */
^ permalink raw reply
* RE: Linux 2.6.x, MTD drivers and NAND flashes
From: Laurent Lagrange @ 2007-06-12 10:06 UTC (permalink / raw)
To: 'Gary Kenaley', 'Bill Gatliff'; +Cc: linuxppc-embedded
In-Reply-To: <DDBD7B17DB2ECE48BCD94C593F7255B4046EA149@monk.echelon.echcorp.com>
[-- Attachment #1: Type: text/plain, Size: 1149 bytes --]
Gary and Bill,
My need is to load a basic Linux kernel on boards to program multiple
NOR and NAND flashes with CRAMFS and JFFS2 (perhaps YAFFS) images.
I usually used mtd character accesses to do the job on NOR flashes.
But flash_eraseall and flashcp seem to be excellent tools.
I'll try them quickly.
Many thanks for your help
Bye
Laurent
> -----Message d'origine-----
> De : Gary Kenaley [mailto:gkenaley@echelon.com]
> Envoyé : lun. 11 juin 2007 21:00
> À : Bill Gatliff; Laurent Lagrange
> Cc : linuxppc-embedded@ozlabs.org
> Objet : RE: Linux 2.6.x, MTD drivers and NAND flashes
>
>
> Laurent,
>
> Can't you just use the flashcp copy command from the
> mtd-utils package?
> --------------------------------------------------------------
> ---------
> flash_eraseall -j /dev/mtd0
>
> mkfs.jffs2 -b -n --eraseblock=131072 --pagesize=2048 -p -r
> /test_root -v -o test_root.img
>
> flashcp test_root.img /dev/mtd0
>
>
> The other way is what Bill mentions:
> ------------------------------------
> flash_eraseall -j /dev/mtd0
> mount -t jffs2 /dev/mtdblock0 /tmp/mnt
> tar -xzf test_root.tgz -C /tmp/mnt
> umount /tmp/mnt
>
> Gary
[-- Attachment #2: winmail.dat --]
[-- Type: application/ms-tnef, Size: 2264 bytes --]
^ permalink raw reply
* Re: Xilinx git tree at source.mvista.com
From: Esben Nielsen @ 2007-06-12 10:29 UTC (permalink / raw)
To: Andrei Konovalov; +Cc: linuxppc-dev, linuxppc-embedded
In-Reply-To: <46555294.6040104@ru.mvista.com>
On Thu, 24 May 2007, Andrei Konovalov wrote:
> Hello,
>
> My Xilinx Virtex Development tree is now alive again.
>
> Please use the dev branch (master is just the ko copy):
> http://source.mvista.com/git/gitweb.cgi?p=linux-xilinx-26.git;a=shortlog;h=dev
I can not access the git-tree there: No such project :-(
Is that git-tree still alive? Or should I use another?
Any news on Xilinx's own git-tree?
Regards,
Esben
^ permalink raw reply
* Re: [PATCH] powerpc: Create "rom" (MTD) device prpmc2800
From: Segher Boessenkool @ 2007-06-12 10:50 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20070612044246.GC4198@localhost.localdomain>
> So, what you're suggesting is a subnode for each described partition?
I'm saying this is a reasonable way to describe the regions
of flash the firmware itself cares about.
This isn't anything new; it is done like this on some
Apple systems, for example.
> Seems an awfully verbose way of going about it,
Not verbose, but flexible, and in line with everything
else about the device tree.
> and I don't see what
> it buys us over the partitions/partition-names pair of properties.
It is extensible. It makes parsing trivial. It
represents a flash partition in a way similar to how
a "whole" flash device is represented.
Segher
^ permalink raw reply
* Re: [PATCH] powerpc: Create "rom" (MTD) device prpmc2800
From: Segher Boessenkool @ 2007-06-12 10:53 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev, linux-mtd, David Woodhouse, Milton Miller
In-Reply-To: <20070612044459.GD4198@localhost.localdomain>
>> So I think the best thing to have would be
>>
>> compatible "cfi-flash"
>> bank-width like you said
>> device-width width of a single flash device
>> reg complete address range of this thing
>>
>> and then the Linux OF CFI flash code / MTD code just keeps
>> on probing devices from that address range until it has it
>> filled.
>>
>> Sounds good / comments / anything I missed?
>
> Looks pretty sensible to me.
Great!
> Presumably the compatible property could
> also have more specific entries for the particular chip type.
Yes, of course.
> Of course, Ebony has flash which is JEDEC rather than CFI probed, so I
> have an interest in a binding for that, too.
For JEDEC flash, you probably want extra properties
for manufacturing ID and chip ID. Also, you need
to describe the block sizes in some way (on CFI, this
can be probed; on JEDEC, not). Anything else?
Segher
^ permalink raw reply
* Re: [patch 02/10] powerpc: Move CONFIG_PPC64 into CPU selection
From: Paul Mackerras @ 2007-06-12 11:11 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linuxppc-dev
In-Reply-To: <200706121008.01661.arnd@arndb.de>
Arnd Bergmann writes:
> Can you eleborate, other than stating the exact opposite of what
> my comment said?
It's mostly subjective, I guess. None of the reasons you've cited
seem at all compelling to me, and if we change this stuff then we'll
all get unnecessary questions next time we make a kernel. Anyway I
like it the way it is, and I'm the maintainer. :)
> * The only major difference between ppc64 and the others is the
> object format of the kernel binary.
I disagree with that. There are major differences at the
implementation level for a lot of things.
Paul.
^ permalink raw reply
* Re: [patch 01/10] powerpc: split out CPU specific options into a new Kconfig file
From: Paul Mackerras @ 2007-06-12 11:12 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linuxppc-dev, Stephen Rothwell
In-Reply-To: <200706120942.48045.arnd@arndb.de>
Arnd Bergmann writes:
> On Tuesday 12 June 2007, Stephen Rothwell wrote:
> > On Tue, 12 Jun 2007 01:28:25 +0200 arnd@arndb.de wrote:
> > >
> > > -config VIRT=5FCPU=5FACCOUNTING
> > > -=A0=A0=A0=A0=A0bool "Deterministic task and CPU time accounting"=
> >=20
> > I am not sure that this belongs with all the rest.
>=20
> It's selected by arch/powerpc/platforms/embedded6xx/Kconfig.
Where=3F I don't see it. VIRT=5FCPU=5FACCOUNTING is a 64-bit only opt=
ion,
at least until someone implements it for 32-bit.
Paul.
^ permalink raw reply
* Re: [patch 02/10] powerpc: Move CONFIG_PPC64 into CPU selection
From: Segher Boessenkool @ 2007-06-12 11:35 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, Arnd Bergmann
In-Reply-To: <18030.32600.921348.218117@cargo.ozlabs.ibm.com>
>> * The only major difference between ppc64 and the others is the
>> object format of the kernel binary.
>
> I disagree with that. There are major differences at the
> implementation level for a lot of things.
It would be good to converge the 32- and 64-bit implementations,
and/or allow a single kernel image to work on both 32-bit and
64-bit systems, The current situation is far removed from that,
so this patch is a bit premature in that aspect.
Segher
^ permalink raw reply
* Re: [patch 02/10] powerpc: Move CONFIG_PPC64 into CPU selection
From: Arnd Bergmann @ 2007-06-12 11:49 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <18030.32600.921348.218117@cargo.ozlabs.ibm.com>
On Tuesday 12 June 2007, Paul Mackerras wrote:
> It's mostly subjective, I guess. =A0None of the reasons you've cited
> seem at all compelling to me, and if we change this stuff then we'll
> all get unnecessary questions next time we make a kernel. =A0Anyway I
> like it the way it is, and I'm the maintainer.=20
Ok, fair enough. At least that means I didn't miss an obvious point.
I'll follow up with an updated patch set when no more comments about
the other patches come in.
Arnd <><
^ permalink raw reply
* Re: [patch 01/10] powerpc: split out CPU specific options into a new Kconfig file
From: Arnd Bergmann @ 2007-06-12 12:42 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Stephen Rothwell, Paul Mackerras
In-Reply-To: <18030.32673.259326.715305@cargo.ozlabs.ibm.com>
On Tuesday 12 June 2007, Paul Mackerras wrote:
> > On Tuesday 12 June 2007, Stephen Rothwell wrote:
> > > =A0 On Tue, 12 Jun 2007 01:28:25 +0200 arnd@arndb.de wrote:
> > > >
> > > > -config VIRT_CPU_ACCOUNTING
> > > > -=A0=A0=A0=A0=A0bool "Deterministic task and CPU time accounting"
> > >=20
> > > I am not sure that this belongs with all the rest.
> >=20
> > It's selected by arch/powerpc/platforms/embedded6xx/Kconfig.
>=20
> Where? =A0I don't see it. =A0VIRT_CPU_ACCOUNTING is a 64-bit only option,
> at least until someone implements it for 32-bit.
Sorry, I was confusing this with CONFIG_CHECK_CACHE_COHERENCY for
some weird reason.
My patch moves the entire CPU selection menu to a new file, without
changing any of the contents. If you like, I can add another
patch that moves VIRT_CPU_ACCOUNTING into the platform support or
the general setup menu.
Arnd <><
^ permalink raw reply
* Re: [PATCH 5/6]: 82xx: Add the support of Wind River SBC PowerQUICCII 82xx
From: Kumar Gala @ 2007-06-12 13:26 UTC (permalink / raw)
To: Mark Zhan; +Cc: linuxppc-dev
In-Reply-To: <1181628239.25503.15.camel@mark>
>> I don't believe the following are necessary. New MTD mapping
>> should be
>> defined in device tree.
>>
>
> Oh, here I just want to document the memory mapping for this board. I
> think, even we already have devtree, it is a good idea that we always
> document the H/W setting in platform header file, which will
> definitely
> make life easier.
There is no requirement that you use the device tree for MTD. If you
decided that for your board port that you just want it hard coded in
the code that is perfectly fine.
- k
^ permalink raw reply
* Re: 83xx GPIO/EXT int in arch/powerpc/
From: Kumar Gala @ 2007-06-12 13:31 UTC (permalink / raw)
To: Marc Leeman; +Cc: linuxppc-dev
In-Reply-To: <20070611162135.GS2591@chiana.homelinux.org>
> What is more disturbing though, is that a number of operations on the
> powerpc arch seems significantly slower wrt the ppc arch.
>
> ioremap and iounmap being the most important one: we are using a small
> driver that uses one of the UPMs in combination with GPIOs for HPI
> (Host
> Port Interface) for TI DSPs.
>
> Where the loading of a DSP took only 3 seconds, it went up to over a
> minute on powerpc (same driver code).
I'm confused what you are comparing here, 3 seconds on arch=ppc vs
over a minute on arch=powerpc?
> Changing the driver to ioremap and unmap 0xe2400000 only once at
> driver
> initialisation and unloading (not really relevant on this embedded
> system, shame on me) instead twice for every word greatly improves the
> time (around one second). However, this optimisation has the same
> effect
> on ppc too :-/
>
> Running the same application with the same modules on ppc and powerpc
> (transferring data from the network to an FPGA) has a 50% higher
> load on
> powerpc. The transfer is done with mapping user pages into the kernel
> and DMA'ing them over PCI. What all driver have in common is that
> there
> are quite some writes/reads to the IMMR configuration.
I'd expect the driver to be exactly the same (or close to it) for
arch=ppc vs arch=powerpc.
> Decreasing the read and writes to the LBC for HPI (0xe2400000)
> seems to
> improve the overall load.
>
> So my question would be if I need to specify a special section in the
> dts file for some reason; next to the U-Boot configuration that sends
> writes to this address through the UPMB?
>
> If not, is there any other reason that might account for these
> significant performance drops?
There shouldn't be, but if you are seeing this we really should
figure out what's going on.
What kernel is this on? What processor are you using?
- k
^ permalink raw reply
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