* Re: [PATCH] [USB POWERPC] ehci-fsl: add PPC_MPC837x to default y
From: Scott Wood @ 2008-02-21 20:09 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, linux-usb
In-Reply-To: <9AD13D2E-B57F-4F19-B89C-C8A83157E0F2@kernel.crashing.org>
Kumar Gala wrote:
> On Feb 21, 2008, at 1:50 PM, Anton Vorontsov wrote:
>
>> Without this patch it's impossible to select ehci-fsl on PPC_MPC837x.
>> Another option would be to convert USB_EHCI_FSL to verbose bool,
>> but I presume EHCI_FSL is purposely made silent.
>>
>> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
>> ---
>> drivers/usb/host/Kconfig | 2 +-
>> 1 files changed, 1 insertions(+), 1 deletions(-)
>>
>> diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
>> index d97b16b..33da056 100644
>> --- a/drivers/usb/host/Kconfig
>> +++ b/drivers/usb/host/Kconfig
>> @@ -72,7 +72,7 @@ config USB_EHCI_FSL
>> bool
>> depends on USB_EHCI_HCD
>> select USB_EHCI_ROOT_HUB_TT
>> - default y if MPC834x || PPC_MPC831x
>> + default y if MPC834x || PPC_MPC831x || PPC_MPC837x
>
> Can we just change this to FSL_SOC
Why do you want to bloat all freescale kernels, even on chips that don't
have this hardware?
There are very few cases where default y is justified. This isn't one
of them.
-Scott
^ permalink raw reply
* Re: [PATCH] [POWERPC] add target for building .dtb files
From: Grant Erickson @ 2008-02-21 20:03 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <20080221191955.10139.10496.stgit@trillian.secretlab.ca>
On 2/21/08 11:19 AM, Grant Likely wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
>
> ---
>
> Josh, is this what your were looking for?
>
> Cheers,
> g.
> ---
>
> arch/powerpc/Makefile | 2 +-
> arch/powerpc/boot/Makefile | 4 ++++
> 2 files changed, 5 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
> index ab5cfe8..dd80825 100644
> --- a/arch/powerpc/Makefile
> +++ b/arch/powerpc/Makefile
> @@ -164,7 +164,7 @@ boot := arch/$(ARCH)/boot
> $(BOOT_TARGETS): vmlinux
> $(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
>
> -bootwrapper_install:
> +bootwrapper_install %.dtb:
> $(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
>
> define archhelp
> diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
> index d57a67d..fb29f10 100644
> --- a/arch/powerpc/boot/Makefile
> +++ b/arch/powerpc/boot/Makefile
> @@ -311,6 +311,10 @@ $(obj)/treeImage.initrd.%: vmlinux $(dtstree)/%.dts
> $(wrapperbits)
> $(obj)/treeImage.%: vmlinux $(dtstree)/%.dts $(wrapperbits)
> $(call if_changed,wrap,treeboot-$*,$(dtstree)/$*.dts)
>
> +# Rule to build device tree blobs
> +$(obj)/%.dtb: $(dtstree)/%.dts $(obj)/dtc
> + $(obj)/dtc -O dtb -o $(obj)/$*.dtb -b 0 $(dtstree)/$*.dts
> +
Grant,
Would it be beneficial to provide a way to have environment- or
command-line-provided DTC arguments/flags such that the oft-required '-S
<size>' and '-R <reserved>' flags can be specified? Or, are there reasonable
size and reserved defaults appropriate for all platforms that can be
specified?
FWIW, generating a blob for Haleakala/Kilauea on the PPC405EX[r] using the
above command in the patch results in complaints about lack of space for the
"CHOSEN" node in u-boot.
Regards,
Grant
^ permalink raw reply
* Re: [PATCH] [POWERPC] add target for building .dtb files
From: Scott Wood @ 2008-02-21 20:14 UTC (permalink / raw)
To: Grant Erickson; +Cc: linuxppc-dev
In-Reply-To: <C3E318FD.D883%gerickson@nuovations.com>
Grant Erickson wrote:
>> diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
>> index d57a67d..fb29f10 100644
>> --- a/arch/powerpc/boot/Makefile
>> +++ b/arch/powerpc/boot/Makefile
>> @@ -311,6 +311,10 @@ $(obj)/treeImage.initrd.%: vmlinux $(dtstree)/%.dts
>> $(wrapperbits)
>> $(obj)/treeImage.%: vmlinux $(dtstree)/%.dts $(wrapperbits)
>> $(call if_changed,wrap,treeboot-$*,$(dtstree)/$*.dts)
>>
>> +# Rule to build device tree blobs
>> +$(obj)/%.dtb: $(dtstree)/%.dts $(obj)/dtc
>> + $(obj)/dtc -O dtb -o $(obj)/$*.dtb -b 0 $(dtstree)/$*.dts
>> +
>
> Grant,
>
> Would it be beneficial to provide a way to have environment- or
> command-line-provided DTC arguments/flags such that the oft-required '-S
> <size>' and '-R <reserved>' flags can be specified? Or, are there reasonable
> size and reserved defaults appropriate for all platforms that can be
> specified?
These aren't required for the bootwrapper, which is the main purpose of
the bootwrapper makefile...
> FWIW, generating a blob for Haleakala/Kilauea on the PPC405EX[r] using the
> above command in the patch results in complaints about lack of space for the
> "CHOSEN" node in u-boot.
U-boot should be fixed to not need this. It's ridiculous.
-Scott
^ permalink raw reply
* Re: [PATCH] [USB POWERPC] ehci-fsl: add PPC_MPC837x to default y
From: Anton Vorontsov @ 2008-02-21 20:30 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, linux-usb
In-Reply-To: <9AD13D2E-B57F-4F19-B89C-C8A83157E0F2@kernel.crashing.org>
On Thu, Feb 21, 2008 at 01:58:18PM -0600, Kumar Gala wrote:
>
> On Feb 21, 2008, at 1:50 PM, Anton Vorontsov wrote:
>
> >Without this patch it's impossible to select ehci-fsl on PPC_MPC837x.
> >Another option would be to convert USB_EHCI_FSL to verbose bool,
> >but I presume EHCI_FSL is purposely made silent.
> >
> >Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
> >---
> >drivers/usb/host/Kconfig | 2 +-
> >1 files changed, 1 insertions(+), 1 deletions(-)
> >
> >diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
> >index d97b16b..33da056 100644
> >--- a/drivers/usb/host/Kconfig
> >+++ b/drivers/usb/host/Kconfig
> >@@ -72,7 +72,7 @@ config USB_EHCI_FSL
> > bool
> > depends on USB_EHCI_HCD
> > select USB_EHCI_ROOT_HUB_TT
> >- default y if MPC834x || PPC_MPC831x
> >+ default y if MPC834x || PPC_MPC831x || PPC_MPC837x
>
> Can we just change this to FSL_SOC
Easily. But not "default y"... "depends on" instead, ok?
There are plenty of FSL chips without EHCI built-in, so with
default y we'll enable it wrongly.
- - - -
From: Anton Vorontsov <avorontsov@ru.mvista.com>
Subject: [USB POWERPC] ehci-fsl: handles other freescale processors
This patch converts USB_EHCI_FSL config option into the verbose
bool, so we'll able to select it for other freescale processors
with built-in EHCI controller.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
drivers/usb/host/Kconfig | 5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index d97b16b..bf8be2a 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -69,10 +69,9 @@ config USB_EHCI_BIG_ENDIAN_DESC
default y
config USB_EHCI_FSL
- bool
- depends on USB_EHCI_HCD
+ bool "Support for Freescale on-chip EHCI USB controller"
+ depends on USB_EHCI_HCD && FSL_SOC
select USB_EHCI_ROOT_HUB_TT
- default y if MPC834x || PPC_MPC831x
---help---
Variation of ARC USB block used in some Freescale chips.
--
1.5.2.2
^ permalink raw reply related
* Re: [PATCH] [POWERPC] 8xx: timebase frequency should not depend on bus-frequency
From: Anton Vorontsov @ 2008-02-21 21:13 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <47BDD9E2.5050007@freescale.com>
On Thu, Feb 21, 2008 at 02:06:58PM -0600, Scott Wood wrote:
[...]
> >>>+++ b/arch/powerpc/platforms/8xx/m8xx_setup.c
> >>>@@ -111,17 +111,12 @@ void __init mpc8xx_calibrate_decr(void)
> >>>
> >>> /* Processor frequency is MHz.
> >>> */
> >>>- ppc_tb_freq = 50000000;
> >>>- if (!get_freq("bus-frequency", &ppc_tb_freq)) {
> >>>- printk(KERN_ERR "WARNING: Estimating decrementer frequency "
> >>>- "(not found)\n");
> >>>- }
> >>>- ppc_tb_freq /= 16;
> >>> ppc_proc_freq = 50000000;
> >>> if (!get_freq("clock-frequency", &ppc_proc_freq))
> >>> printk(KERN_ERR "WARNING: Estimating processor frequency "
> >>> "(not found)\n");
> >>>
> >>>+ ppc_tb_freq = ppc_proc_freq / 16;
> >>Shouldn't we just use the timebase-frequency property?
> >
> >Nope. Most u-boots currently do not setup timebase-frequency, and if
> >they are setting it up, they're doing it wrong, in sense that Linux
> >overwrites timebase setup (yeah, in this regard MPC8xx is special).
>
> Current u-boots don't support device trees at all on 8xx.
Yes, vanilla u-boots. I assume many of us use some u-boot hacks to
actually boot with the device tree (no, not cuboots)... ;-)
> The most
> recent 8xx FDT patch I saw called get_tbclk() to fill in
> timebase-frequency; does get_tbclk() not work?
I don't know. I didn't look at this, it isn't interesting because
currently getting timebase-frequency from the device tree is
meaningless on MPC8xx. Linux is doing timebase stuff on its own.
Surely, moving timebase setup code into the cuboot will solve
backwards compatibility issues, so we'll setup timebase-frequency
there, and will use generic_calibrate_decr(). And for FDT-aware
u-boots we'll simply get fixed up timebase-frequency.
Unfortunately (or fortunately ;-) I don't have this 8xx board
any longer, so I'd suggest to not expect such 8xx cleanups from
me in near future...
If you have such patches pending... surely, they would be more
correct way to solve the issue.
Thanks,
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: [PATCH] [POWERPC] 8xx: timebase frequency should not depend on bus-frequency
From: Scott Wood @ 2008-02-21 21:20 UTC (permalink / raw)
To: avorontsov; +Cc: linuxppc-dev
In-Reply-To: <20080221211343.GA24786@localhost.localdomain>
Anton Vorontsov wrote:
> On Thu, Feb 21, 2008 at 02:06:58PM -0600, Scott Wood wrote:
>> Current u-boots don't support device trees at all on 8xx.
>
> Yes, vanilla u-boots. I assume many of us use some u-boot hacks to
> actually boot with the device tree (no, not cuboots)... ;-)
Fine, but don't expect misbehavior from out-of-tree u-boots to be used
as justification for the kernel ignoring device tree content. :-)
-Scott
^ permalink raw reply
* MODPOST section mismatches
From: Steve Heflin @ 2008-02-21 21:33 UTC (permalink / raw)
To: linuxppc-embedded
while building vmlinux.o the MODPOST warns about 8 section mismatches.
WARNING: modpost: Found 8 section mismatch(es).
To see full details build your kernel with:
'make CONFIG_DEBUG_SECTION_MISMATCH=y'
After modifying the make launch to include the recommended option
shown above, I see that the section mismatch warning is due to data
structures containing the address of initialization modules which
have the __init attribute. Since the memory model is FLAT, is this a problem?
thanks,
Steve
^ permalink raw reply
* Re: [RFC][PATCH] PowerPC 4xx: ibm_newemac 440GX phy clock workaround.
From: Benjamin Herrenschmidt @ 2008-02-21 22:52 UTC (permalink / raw)
To: Valentine Barshak; +Cc: linuxppc-dev
In-Reply-To: <20080221144617.GA19465@ru.mvista.com>
On Thu, 2008-02-21 at 17:46 +0300, Valentine Barshak wrote:
> The PowerPC 440GX Taishan board fails to reset EMAC3 (reset timeout error)
> and because of that it can't find PHY chip. The older ibm_emac driver had
> a workaround for that: the EMAC_CLK_INTERNAL/EMAC_CLK_EXTERNAL macros which
> toggle the Ethernet Clock Select bit in the SDR0_MFR register. This patch
> does the same for "ibm,emac-440gx" compatible chips.
The main problem is that will force clock on -all- EMACs ... which can
be a problem as they can be in probe at the same time. Might be worth
also adding a global mutex around that block.
Also, would you mind having a look at the other workaround for the
similar bug ?
Cheers,
Ben.
> Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
> ---
> drivers/net/ibm_newemac/core.c | 16 +++++++++++++++-
> drivers/net/ibm_newemac/core.h | 8 ++++++--
> 2 files changed, 21 insertions(+), 3 deletions(-)
>
> diff -pruN linux-2.6.orig/drivers/net/ibm_newemac/core.c linux-2.6/drivers/net/ibm_newemac/core.c
> --- linux-2.6.orig/drivers/net/ibm_newemac/core.c 2008-02-21 16:45:36.000000000 +0300
> +++ linux-2.6/drivers/net/ibm_newemac/core.c 2008-02-21 17:21:21.000000000 +0300
> @@ -43,6 +43,8 @@
> #include <asm/io.h>
> #include <asm/dma.h>
> #include <asm/uaccess.h>
> +#include <asm/dcr.h>
> +#include <asm/dcr-regs.h>
>
> #include "core.h"
>
> @@ -2480,8 +2482,11 @@ static int __devinit emac_init_config(st
> }
>
> /* Check EMAC version */
> - if (of_device_is_compatible(np, "ibm,emac4"))
> + if (of_device_is_compatible(np, "ibm,emac4")) {
> dev->features |= EMAC_FTR_EMAC4;
> + if (of_device_is_compatible(np, "ibm,emac-440gx"))
> + dev->features |= EMAC_FTR_440GX_PHY_CLK_FIX;
> + }
>
> /* Fixup some feature bits based on the device tree */
> if (of_get_property(np, "has-inverted-stacr-oc", NULL))
> @@ -2673,8 +2678,17 @@ static int __devinit emac_probe(struct o
> dev->stop_timeout = STOP_TIMEOUT_100;
> INIT_DELAYED_WORK(&dev->link_work, emac_link_timer);
>
> + /* Enable internal phy clock source */
> + if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX))
> + mtdcri(SDR0, SDR0_MFR, mfdcri(SDR0, SDR0_MFR) | SDR0_MFR_ECS);
> +
> /* Find PHY if any */
> err = emac_init_phy(dev);
> +
> + /* Enable external phy clock source */
> + if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX))
> + mtdcri(SDR0, SDR0_MFR, mfdcri(SDR0, SDR0_MFR) & ~SDR0_MFR_ECS);
> +
> if (err != 0)
> goto err_detach_tah;
>
> diff -pruN linux-2.6.orig/drivers/net/ibm_newemac/core.h linux-2.6/drivers/net/ibm_newemac/core.h
> --- linux-2.6.orig/drivers/net/ibm_newemac/core.h 2008-02-21 16:45:36.000000000 +0300
> +++ linux-2.6/drivers/net/ibm_newemac/core.h 2008-02-21 17:21:47.000000000 +0300
> @@ -301,6 +301,10 @@ struct emac_instance {
> * Set if we have new type STACR with STAOPC
> */
> #define EMAC_FTR_HAS_NEW_STACR 0x00000040
> +/*
> + * Set if we need phy clock workaround for 440gx
> + */
> +#define EMAC_FTR_440GX_PHY_CLK_FIX 0x00000080
>
>
> /* Right now, we don't quite handle the always/possible masks on the
> @@ -312,8 +316,8 @@ enum {
>
> EMAC_FTRS_POSSIBLE =
> #ifdef CONFIG_IBM_NEW_EMAC_EMAC4
> - EMAC_FTR_EMAC4 | EMAC_FTR_HAS_NEW_STACR |
> - EMAC_FTR_STACR_OC_INVERT |
> + EMAC_FTR_EMAC4 | EMAC_FTR_HAS_NEW_STACR |
> + EMAC_FTR_STACR_OC_INVERT | EMAC_FTR_440GX_PHY_CLK_FIX |
> #endif
> #ifdef CONFIG_IBM_NEW_EMAC_TAH
> EMAC_FTR_HAS_TAH |
^ permalink raw reply
* Re: [PATCH 1/1] [PPC] 8xx swap bug-fix
From: Vitaly Bordug @ 2008-02-21 22:57 UTC (permalink / raw)
To: Wolfgang Denk; +Cc: dzu, linuxppc-dev, Mackerras, Paul, Scott Wood
In-Reply-To: <20080221122158.11BB324D16@gemini.denx.de>
On Thu, 21 Feb 2008 13:21:58 +0100
Wolfgang Denk wrote:
> Dear Vitaly,
>
> in message <20080205013857.47ebe544@kernel.crashing.org> you wrote:
> > On Mon, 4 Feb 2008 12:24:21 -0600
> > Scott Wood wrote:
> >
> > > On Sat, Feb 02, 2008 at 12:22:17PM +0100, Jochen Friedrich wrote:
> > > > Hi Yuri,
> > > >
> > > > > Here is the patch which makes Linux-2.6 swap routines operate
> > > > > correctly on the ppc-8xx-based machines.
> > > >
> > > > is there any 8xx board left which isn't ported to ARCH=powerpc?
> > >
> > > More importantly, is this something that is also broken in
> > > arch/powerpc? It looks like it has the same code...
> > >
> > yes, it is. Though there is currently no best-at-all solution, this
> > looks worth trying. I'll have a look how the 8xx feels under load
> > and report back.
>
> Have you been able to check if arch/powerpc needs similar fixing?
>
>
> Also, what is the current state of this patch? I would like to avoid
> that it get's lost completeley.
>
I have revalidated it (version modded to fit powerpc) with pretty tight stressing and can conclude
this is good enough for mainline (it gets things much better than they are now,
in case of swap enabled).
I'll follow-up with relevant patch shortly.
>
> BenH commented on Tue, 05 Feb 2008 18:37:07 +1100:
>
> > Best is to just remove writeback completely and let the generic
> > code handle it.
>
> Has this been considered / tested by anybody?
>
> Best regards,
>
> Wolfgang Denk
>
--
Sincerely, Vitaly
^ permalink raw reply
* Re: [PATCH] [POWERPC] 8xx: timebase frequency should not depend on bus-frequency
From: Anton Vorontsov @ 2008-02-21 23:41 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <47BDEB0A.80706@freescale.com>
On Thu, Feb 21, 2008 at 03:20:10PM -0600, Scott Wood wrote:
> Anton Vorontsov wrote:
> > On Thu, Feb 21, 2008 at 02:06:58PM -0600, Scott Wood wrote:
> >> Current u-boots don't support device trees at all on 8xx.
> >
> > Yes, vanilla u-boots. I assume many of us use some u-boot hacks to
> > actually boot with the device tree (no, not cuboots)... ;-)
>
> Fine, but don't expect misbehavior from out-of-tree u-boots to be used
> as justification for the kernel ignoring device tree content. :-)
You got me wrong, maybe I wasn't clear enough: it wasn't justification of
any kind. It's was just a remark regarding u-boot still not supporting
fdt for 8xx (20 lines of code we're lazy to cleanup, write annotation
to the patch and send it ;-).
Regarding timebase issue. This issue isn't introduced by the
u-boots. It is _Linux_ code that is buggy. I'm agree that ideally we
should get timebase-frequency from the device tree, but if we'll
start getting it from inside the current code, it will look like:
...linux setups tbfreq = cpu_clk / 16...
tbfreq = of_get_property(.."timebase-frequency"..);
You see? This is illogical, error-prone, and whatnot. :-)
I agree, to fix this right way, we should:
a) fix current u-boots;
b) rework 8xx/ Linux code; and
c) rework cuboot for compatibility;
Until that happen that tiny patch is a valid bug fix, right?
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: [PATCH 0/8] pseries: phyp dump: hypervisor-assisted dump
From: Michael Ellerman @ 2008-02-22 0:53 UTC (permalink / raw)
To: Manish Ahuja; +Cc: ppc-dev, Linas Vepstas, paulus
In-Reply-To: <47B90F55.2080606@austin.ibm.com>
[-- Attachment #1: Type: text/plain, Size: 1244 bytes --]
On Sun, 2008-02-17 at 22:53 -0600, Manish Ahuja wrote:
> The following series of patches implement a basic framework
> for hypervisor-assisted dump. The very first patch provides
> documentation explaining what this is :-) . Yes, its supposed
> to be an improvement over kdump.
>
> A list of open issues / todo list is included in the documentation.
> It also appears that the not-yet-released firmware versions this was tested
> on are still, ahem, incomplete; this work is also pending.
>
> I have included most of the changes requested. Although, I did find
> one or two, fixed in a later patch file rather than the first location
> they appeared at.
This series still doesn't build on !CONFIG_RTAS configs:
http://kisskb.ellerman.id.au/kisskb/head/629/
This solution is to move early_init_dt_scan_phyp_dump() into
arch/powerpc/platforms/pseries/phyp_dump.c and provide a dummy
implementation in asm-powerpc/phyp_dump.c for the !CONFIG_PHYP_DUMP
case.
cheers
--
Michael Ellerman
OzLabs, IBM Australia Development Lab
wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)
We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 189 bytes --]
^ permalink raw reply
* Re: [PATCH] [USB POWERPC] ehci-fsl: add PPC_MPC837x to default y
From: Peter Korsgaard @ 2008-02-22 1:36 UTC (permalink / raw)
To: avorontsov; +Cc: linuxppc-dev, linux-usb
In-Reply-To: <20080221203058.GA18624@localhost.localdomain>
>>>>> "Anton" == Anton Vorontsov <avorontsov@ru.mvista.com> writes:
Hi,
Anton> config USB_EHCI_FSL
Anton> - bool
Anton> - depends on USB_EHCI_HCD
Anton> + bool "Support for Freescale on-chip EHCI USB controller"
Anton> + depends on USB_EHCI_HCD && FSL_SOC
Anton> select USB_EHCI_ROOT_HUB_TT
Anton> - default y if MPC834x || PPC_MPC831x
Notice that I have a patch in the USB queue which fixes up the MPC834x
symbol (PPC_MPC834x instead of MPC834x) so this patch won't apply.
--
Bye, Peter Korsgaard
^ permalink raw reply
* Re: [PATCH 3/5 v3] [POWERPC] Add Canyonlands DTS
From: David Gibson @ 2008-02-22 1:48 UTC (permalink / raw)
To: Stefan Roese; +Cc: linuxppc-dev
In-Reply-To: <1203603768-13880-1-git-send-email-sr@denx.de>
On Thu, Feb 21, 2008 at 03:22:48PM +0100, Stefan Roese wrote:
> Signed-off-by: Stefan Roese <sr@denx.de>
[snip]
> + MAL0: mcmal {
> + compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
> + dcr-reg = <180 62>;
> + num-tx-chans = <2>;
> + num-rx-chans = <10>;
> + interrupt-parent = <&MAL0>;
> + interrupts = <0 1 2 3 4>;
> + #interrupt-cells = <1>;
> + #address-cells = <0>;
> + #size-cells = <0>;
> + interrupt-map = </*TXEOB*/ 0 &UIC2 6 4
> + /*RXEOB*/ 1 &UIC2 7 4
> + /*SERR*/ 2 &UIC2 3 4
> + /*TXDE*/ 3 &UIC2 4 4
> + /*RXDE*/ 4 &UIC2 5 4>;
> + interrupt-map-mask = <ffffffff>;
Because all the MAL interrupts are on the same UIC, you don't need
this interrupt-map nonsense here - that's just a workaround for the
chips that have the MAL interrupts spread across different UICs. You
can just use:
interrupt-parent = <&UIC2>;
interrupts = <6 4 7 4 3 4 4 4 5 4>;
[snip]
> + IIC0: i2c@4ef60700 {
> + device_type = "i2c";
No device_type here.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [PATCH] [USB POWERPC] ehci-fsl: add PPC_MPC837x to default y
From: Peter Korsgaard @ 2008-02-22 1:52 UTC (permalink / raw)
To: avorontsov; +Cc: linuxppc-dev, linux-usb
In-Reply-To: <87bq6993hg.fsf@macbook.be.48ers.dk>
On Fri, Feb 22, 2008 at 2:36 AM, Peter Korsgaard <jacmet@sunsite.dk> wrote:
> Notice that I have a patch in the USB queue which fixes up the MPC834x
> symbol (PPC_MPC834x instead of MPC834x) so this patch won't apply.
Never mind, Greg fixed it.
--
Bye, Peter Korsgaard
^ permalink raw reply
* [PATCH] [POWERPC] Fix thinko in cpu_thread_mask_to_cores()
From: Benjamin Herrenschmidt @ 2008-02-22 3:26 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
The function cpu_thread_mask_to_cores() which returns a cpumask
of one and only one thread enabled for a given core has a bug
as it's shifting things in the wrong direction.
Note: The implementation is still sub-optimal in the sense that
for a given core, the thread set in the result may not be any of
the threads set in the input, which can lead to more IPIs then
strictly necessary, but it isn't incorrect per-se. I'll improve
that later.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
include/asm-powerpc/cputhreads.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- linux-work.orig/include/asm-powerpc/cputhreads.h 2008-02-22 14:22:34.000000000 +1100
+++ linux-work/include/asm-powerpc/cputhreads.h 2008-02-22 14:22:39.000000000 +1100
@@ -35,7 +35,7 @@ static inline cpumask_t cpu_thread_mask_
res = CPU_MASK_NONE;
for (i = 0; i < NR_CPUS; i += threads_per_core) {
- cpus_shift_right(tmp, threads_core_mask, i);
+ cpus_shift_left(tmp, threads_core_mask, i);
if (cpus_intersects(threads, tmp))
cpu_set(i, res);
}
^ permalink raw reply
* Re: [PATCH] [POWERPC] Fix thinko in cpu_thread_mask_to_cores()
From: Benjamin Herrenschmidt @ 2008-02-22 3:42 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <20080222032708.689FFDDE08@ozlabs.org>
On Fri, 2008-02-22 at 14:26 +1100, Benjamin Herrenschmidt wrote:
> The function cpu_thread_mask_to_cores() which returns a cpumask
> of one and only one thread enabled for a given core has a bug
> as it's shifting things in the wrong direction.
>
> Note: The implementation is still sub-optimal in the sense that
> for a given core, the thread set in the result may not be any of
> the threads set in the input, which can lead to more IPIs then
> strictly necessary, but it isn't incorrect per-se. I'll improve
> that later.
>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> ---
Note that this function is, afaik, not used by anything in-tree at the
moment, so the bug isn't hurting anybody, but I'd rather have it
fixed anyway.
Ben.
^ permalink raw reply
* Re: [PATCH] Add support for binary includes.
From: David Gibson @ 2008-02-22 5:34 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, jdl
In-Reply-To: <20080220191941.GA2062@ld0162-tx32.am.freescale.net>
On Wed, Feb 20, 2008 at 01:19:41PM -0600, Scott Wood wrote:
> A property's data can be populated with a file's contents
> as follows:
>
> node {
> prop = /incbin/("path/to/data");
> };
>
> A subset of a file can be included by passing start and size parameters.
> For example, to include bytes 8 through 23:
>
> node {
> prop = /incbin/("path/to/data", 8, 16);
> };
>
> As with /include/, non-absolute paths are looked for in the directory
> of the source file that includes them.
I still dislike the syntax, but haven't thought of a better one yet.
There are some issues with the implementation too, but I've been a bit
too busy with ePAPR stuff to review properly.
Soon, I hope.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* [PATCH 3/5 v4] [POWERPC] Add Canyonlands DTS
From: Stefan Roese @ 2008-02-22 5:50 UTC (permalink / raw)
To: linuxppc-dev
Signed-off-by: Stefan Roese <sr@denx.de>
---
Changed MAL interrupt description as suggested by David Gibson.
arch/powerpc/boot/dts/canyonlands.dts | 395 +++++++++++++++++++++++++++++++++
1 files changed, 395 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/canyonlands.dts
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts
new file mode 100644
index 0000000..2aee74c
--- /dev/null
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -0,0 +1,395 @@
+/*
+ * Device Tree Source for AMCC Canyonlands (460EX)
+ *
+ * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ model = "amcc,canyonlands";
+ compatible = "amcc,canyonlands";
+ dcr-parent = <&/cpus/cpu@0>;
+
+ aliases {
+ ethernet0 = &EMAC0;
+ ethernet1 = &EMAC1;
+ serial0 = &UART0;
+ serial1 = &UART1;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ model = "PowerPC,460EX";
+ reg = <0>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ timebase-frequency = <0>; /* Filled in by U-Boot */
+ i-cache-line-size = <20>;
+ d-cache-line-size = <20>;
+ i-cache-size = <8000>;
+ d-cache-size = <8000>;
+ dcr-controller;
+ dcr-access-method = "native";
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0 0 0>; /* Filled in by U-Boot */
+ };
+
+ UIC0: interrupt-controller0 {
+ compatible = "ibm,uic-460ex","ibm,uic";
+ interrupt-controller;
+ cell-index = <0>;
+ dcr-reg = <0c0 009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ };
+
+ UIC1: interrupt-controller1 {
+ compatible = "ibm,uic-460ex","ibm,uic";
+ interrupt-controller;
+ cell-index = <1>;
+ dcr-reg = <0d0 009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <1e 4 1f 4>; /* cascade */
+ interrupt-parent = <&UIC0>;
+ };
+
+ UIC2: interrupt-controller2 {
+ compatible = "ibm,uic-460ex","ibm,uic";
+ interrupt-controller;
+ cell-index = <2>;
+ dcr-reg = <0e0 009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <a 4 b 4>; /* cascade */
+ interrupt-parent = <&UIC0>;
+ };
+
+ UIC3: interrupt-controller3 {
+ compatible = "ibm,uic-460ex","ibm,uic";
+ interrupt-controller;
+ cell-index = <3>;
+ dcr-reg = <0f0 009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <10 4 11 4>; /* cascade */
+ interrupt-parent = <&UIC0>;
+ };
+
+ SDR0: sdr {
+ compatible = "ibm,sdr-460ex";
+ dcr-reg = <00e 002>;
+ };
+
+ CPR0: cpr {
+ compatible = "ibm,cpr-460ex";
+ dcr-reg = <00c 002>;
+ };
+
+ plb {
+ compatible = "ibm,plb-460ex", "ibm,plb4";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+
+ SDRAM0: sdram {
+ compatible = "ibm,sdram-460ex", "ibm,sdram-405gp";
+ dcr-reg = <010 2>;
+ };
+
+ MAL0: mcmal {
+ compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
+ dcr-reg = <180 62>;
+ num-tx-chans = <2>;
+ num-rx-chans = <10>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ interrupt-parent = <&UIC2>;
+ interrupts = < /*TXEOB*/ 6 4
+ /*RXEOB*/ 7 4
+ /*SERR*/ 3 4
+ /*TXDE*/ 4 4
+ /*RXDE*/ 5 4>;
+ };
+
+ POB0: opb {
+ compatible = "ibm,opb-460ex", "ibm,opb";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <b0000000 4 b0000000 50000000>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+
+ EBC0: ebc {
+ compatible = "ibm,ebc-460ex", "ibm,ebc";
+ dcr-reg = <012 2>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ interrupts = <6 4>;
+ interrupt-parent = <&UIC1>;
+ };
+
+ UART0: serial@ef600300 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <ef600300 8>;
+ virtual-reg = <ef600300>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ current-speed = <0>; /* Filled in by U-Boot */
+ interrupt-parent = <&UIC1>;
+ interrupts = <1 4>;
+ };
+
+ UART1: serial@ef600400 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <ef600400 8>;
+ virtual-reg = <ef600400>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ current-speed = <0>; /* Filled in by U-Boot */
+ interrupt-parent = <&UIC0>;
+ interrupts = <1 4>;
+ };
+
+ UART2: serial@ef600500 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <ef600500 8>;
+ virtual-reg = <ef600500>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ current-speed = <0>; /* Filled in by U-Boot */
+ interrupt-parent = <&UIC1>;
+ interrupts = <1d 4>;
+ };
+
+ UART3: serial@ef600600 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <ef600600 8>;
+ virtual-reg = <ef600600>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ current-speed = <0>; /* Filled in by U-Boot */
+ interrupt-parent = <&UIC1>;
+ interrupts = <1e 4>;
+ };
+
+ IIC0: i2c@4ef60700 {
+ device_type = "i2c";
+ compatible = "ibm,iic-460ex", "ibm,iic";
+ reg = <ef600700 14>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <2 4>;
+ };
+
+ IIC1: i2c@ef600800 {
+ device_type = "i2c";
+ compatible = "ibm,iic-460ex", "ibm,iic";
+ reg = <ef600800 14>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <3 4>;
+ };
+
+ ZMII0: emac-zmii@ef600d00 {
+ compatible = "ibm,zmii-460ex", "ibm,zmii";
+ reg = <ef600d00 c>;
+ };
+
+ RGMII0: emac-rgmii@ef601500 {
+ compatible = "ibm,rgmii-460ex", "ibm,rgmii";
+ reg = <ef601500 8>;
+ has-mdio;
+ };
+
+ EMAC0: ethernet@ef600e00 {
+ linux,network-index = <0>;
+ device_type = "network";
+ compatible = "ibm,emac-460ex", "ibm,emac4";
+ interrupt-parent = <&EMAC0>;
+ interrupts = <0 1>;
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ interrupt-map = </*Status*/ 0 &UIC2 10 4
+ /*Wake*/ 1 &UIC2 14 4>;
+ reg = <ef600e00 70>;
+ local-mac-address = [000000000000]; /* Filled in by U-Boot */
+ mal-device = <&MAL0>;
+ mal-tx-channel = <0>;
+ mal-rx-channel = <0>;
+ cell-index = <0>;
+ max-frame-size = <2328>;
+ rx-fifo-size = <1000>;
+ tx-fifo-size = <800>;
+ phy-mode = "rgmii";
+ phy-map = <00000000>;
+ zmii-device = <&ZMII0>;
+ zmii-channel = <0>;
+ rgmii-device = <&RGMII0>;
+ rgmii-channel = <0>;
+ has-inverted-stacr-oc;
+ has-new-stacr-staopc;
+ };
+
+ EMAC1: ethernet@ef600f00 {
+ linux,network-index = <1>;
+ device_type = "network";
+ compatible = "ibm,emac-460ex", "ibm,emac4";
+ interrupt-parent = <&EMAC1>;
+ interrupts = <0 1>;
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ interrupt-map = </*Status*/ 0 &UIC2 11 4
+ /*Wake*/ 1 &UIC2 15 4>;
+ reg = <ef600f00 70>;
+ local-mac-address = [000000000000]; /* Filled in by U-Boot */
+ mal-device = <&MAL0>;
+ mal-tx-channel = <1>;
+ mal-rx-channel = <8>;
+ cell-index = <1>;
+ max-frame-size = <2328>;
+ rx-fifo-size = <1000>;
+ tx-fifo-size = <800>;
+ phy-mode = "rgmii";
+ phy-map = <00000000>;
+ zmii-device = <&ZMII0>;
+ zmii-channel = <1>;
+ rgmii-device = <&RGMII0>;
+ rgmii-channel = <1>;
+ has-inverted-stacr-oc;
+ has-new-stacr-staopc;
+ };
+ };
+
+ PCIX0: pci@c0ec00000 {
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "ibm,plb-pcix-460ex", "ibm,plb-pcix";
+ primary;
+ large-inbound-windows;
+ enable-msi-hole;
+ reg = <c 0ec00000 8 /* Config space access */
+ 0 0 0 /* no IACK cycles */
+ c 0ed00000 4 /* Special cycles */
+ c 0ec80000 100 /* Internal registers */
+ c 0ec80100 fc>; /* Internal messaging registers */
+
+ /* Outbound ranges, one memory and one IO,
+ * later cannot be changed
+ */
+ ranges = <02000000 0 80000000 0000000d 80000000 0 80000000
+ 01000000 0 00000000 0000000c 08000000 0 00010000>;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = <42000000 0 0 0 0 0 80000000>;
+
+ /* This drives busses 0 to 0x3f */
+ bus-range = <0 3f>;
+
+ /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-2 */
+ interrupt-map-mask = <0000 0 0 0>;
+ interrupt-map = < 0000 0 0 0 &UIC1 2 8 >;
+ };
+
+ PCIE0: pciex@d00000000 {
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
+ primary;
+ port = <0>; /* port number */
+ reg = <d 00000000 20000000 /* Config space access */
+ c 08010000 00001000>; /* Registers */
+ dcr-reg = <100 020>;
+ sdr-base = <300>;
+
+ /* Outbound ranges, one memory and one IO,
+ * later cannot be changed
+ */
+ ranges = <02000000 0 80000000 0000000e 00000000 0 80000000
+ 01000000 0 00000000 0000000f 80000000 0 00010000>;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = <42000000 0 0 0 0 0 80000000>;
+
+ /* This drives busses 40 to 0x7f */
+ bus-range = <40 7f>;
+
+ /* Legacy interrupts (note the weird polarity, the bridge seems
+ * to invert PCIe legacy interrupts).
+ * We are de-swizzling here because the numbers are actually for
+ * port of the root complex virtual P2P bridge. But I want
+ * to avoid putting a node for it in the tree, so the numbers
+ * below are basically de-swizzled numbers.
+ * The real slot is on idsel 0, so the swizzling is 1:1
+ */
+ interrupt-map-mask = <0000 0 0 7>;
+ interrupt-map = <
+ 0000 0 0 1 &UIC3 c 4 /* swizzled int A */
+ 0000 0 0 2 &UIC3 d 4 /* swizzled int B */
+ 0000 0 0 3 &UIC3 e 4 /* swizzled int C */
+ 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>;
+ };
+
+ PCIE1: pciex@d20000000 {
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
+ primary;
+ port = <1>; /* port number */
+ reg = <d 20000000 20000000 /* Config space access */
+ c 08011000 00001000>; /* Registers */
+ dcr-reg = <120 020>;
+ sdr-base = <340>;
+
+ /* Outbound ranges, one memory and one IO,
+ * later cannot be changed
+ */
+ ranges = <02000000 0 80000000 0000000e 80000000 0 80000000
+ 01000000 0 00000000 0000000f 80010000 0 00010000>;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = <42000000 0 0 0 0 0 80000000>;
+
+ /* This drives busses 80 to 0xbf */
+ bus-range = <80 bf>;
+
+ /* Legacy interrupts (note the weird polarity, the bridge seems
+ * to invert PCIe legacy interrupts).
+ * We are de-swizzling here because the numbers are actually for
+ * port of the root complex virtual P2P bridge. But I want
+ * to avoid putting a node for it in the tree, so the numbers
+ * below are basically de-swizzled numbers.
+ * The real slot is on idsel 0, so the swizzling is 1:1
+ */
+ interrupt-map-mask = <0000 0 0 7>;
+ interrupt-map = <
+ 0000 0 0 1 &UIC3 10 4 /* swizzled int A */
+ 0000 0 0 2 &UIC3 11 4 /* swizzled int B */
+ 0000 0 0 3 &UIC3 12 4 /* swizzled int C */
+ 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>;
+ };
+ };
+};
--
1.5.4.2
^ permalink raw reply related
* [PATCH 3/5 v5] [POWERPC] Add Canyonlands DTS
From: Stefan Roese @ 2008-02-22 5:58 UTC (permalink / raw)
To: linuxppc-dev
Signed-off-by: Stefan Roese <sr@denx.de>
---
And now the I2C device-types are removed. Sorry for the mail-flood.
arch/powerpc/boot/dts/canyonlands.dts | 393 +++++++++++++++++++++++++++++++++
1 files changed, 393 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/canyonlands.dts
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts
new file mode 100644
index 0000000..2aee74c
--- /dev/null
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -0,0 +1,393 @@
+/*
+ * Device Tree Source for AMCC Canyonlands (460EX)
+ *
+ * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ model = "amcc,canyonlands";
+ compatible = "amcc,canyonlands";
+ dcr-parent = <&/cpus/cpu@0>;
+
+ aliases {
+ ethernet0 = &EMAC0;
+ ethernet1 = &EMAC1;
+ serial0 = &UART0;
+ serial1 = &UART1;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ model = "PowerPC,460EX";
+ reg = <0>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ timebase-frequency = <0>; /* Filled in by U-Boot */
+ i-cache-line-size = <20>;
+ d-cache-line-size = <20>;
+ i-cache-size = <8000>;
+ d-cache-size = <8000>;
+ dcr-controller;
+ dcr-access-method = "native";
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0 0 0>; /* Filled in by U-Boot */
+ };
+
+ UIC0: interrupt-controller0 {
+ compatible = "ibm,uic-460ex","ibm,uic";
+ interrupt-controller;
+ cell-index = <0>;
+ dcr-reg = <0c0 009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ };
+
+ UIC1: interrupt-controller1 {
+ compatible = "ibm,uic-460ex","ibm,uic";
+ interrupt-controller;
+ cell-index = <1>;
+ dcr-reg = <0d0 009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <1e 4 1f 4>; /* cascade */
+ interrupt-parent = <&UIC0>;
+ };
+
+ UIC2: interrupt-controller2 {
+ compatible = "ibm,uic-460ex","ibm,uic";
+ interrupt-controller;
+ cell-index = <2>;
+ dcr-reg = <0e0 009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <a 4 b 4>; /* cascade */
+ interrupt-parent = <&UIC0>;
+ };
+
+ UIC3: interrupt-controller3 {
+ compatible = "ibm,uic-460ex","ibm,uic";
+ interrupt-controller;
+ cell-index = <3>;
+ dcr-reg = <0f0 009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <10 4 11 4>; /* cascade */
+ interrupt-parent = <&UIC0>;
+ };
+
+ SDR0: sdr {
+ compatible = "ibm,sdr-460ex";
+ dcr-reg = <00e 002>;
+ };
+
+ CPR0: cpr {
+ compatible = "ibm,cpr-460ex";
+ dcr-reg = <00c 002>;
+ };
+
+ plb {
+ compatible = "ibm,plb-460ex", "ibm,plb4";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+
+ SDRAM0: sdram {
+ compatible = "ibm,sdram-460ex", "ibm,sdram-405gp";
+ dcr-reg = <010 2>;
+ };
+
+ MAL0: mcmal {
+ compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
+ dcr-reg = <180 62>;
+ num-tx-chans = <2>;
+ num-rx-chans = <10>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ interrupt-parent = <&UIC2>;
+ interrupts = < /*TXEOB*/ 6 4
+ /*RXEOB*/ 7 4
+ /*SERR*/ 3 4
+ /*TXDE*/ 4 4
+ /*RXDE*/ 5 4>;
+ };
+
+ POB0: opb {
+ compatible = "ibm,opb-460ex", "ibm,opb";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <b0000000 4 b0000000 50000000>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+
+ EBC0: ebc {
+ compatible = "ibm,ebc-460ex", "ibm,ebc";
+ dcr-reg = <012 2>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ interrupts = <6 4>;
+ interrupt-parent = <&UIC1>;
+ };
+
+ UART0: serial@ef600300 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <ef600300 8>;
+ virtual-reg = <ef600300>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ current-speed = <0>; /* Filled in by U-Boot */
+ interrupt-parent = <&UIC1>;
+ interrupts = <1 4>;
+ };
+
+ UART1: serial@ef600400 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <ef600400 8>;
+ virtual-reg = <ef600400>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ current-speed = <0>; /* Filled in by U-Boot */
+ interrupt-parent = <&UIC0>;
+ interrupts = <1 4>;
+ };
+
+ UART2: serial@ef600500 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <ef600500 8>;
+ virtual-reg = <ef600500>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ current-speed = <0>; /* Filled in by U-Boot */
+ interrupt-parent = <&UIC1>;
+ interrupts = <1d 4>;
+ };
+
+ UART3: serial@ef600600 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <ef600600 8>;
+ virtual-reg = <ef600600>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ current-speed = <0>; /* Filled in by U-Boot */
+ interrupt-parent = <&UIC1>;
+ interrupts = <1e 4>;
+ };
+
+ IIC0: i2c@4ef60700 {
+ compatible = "ibm,iic-460ex", "ibm,iic";
+ reg = <ef600700 14>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <2 4>;
+ };
+
+ IIC1: i2c@ef600800 {
+ compatible = "ibm,iic-460ex", "ibm,iic";
+ reg = <ef600800 14>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <3 4>;
+ };
+
+ ZMII0: emac-zmii@ef600d00 {
+ compatible = "ibm,zmii-460ex", "ibm,zmii";
+ reg = <ef600d00 c>;
+ };
+
+ RGMII0: emac-rgmii@ef601500 {
+ compatible = "ibm,rgmii-460ex", "ibm,rgmii";
+ reg = <ef601500 8>;
+ has-mdio;
+ };
+
+ EMAC0: ethernet@ef600e00 {
+ linux,network-index = <0>;
+ device_type = "network";
+ compatible = "ibm,emac-460ex", "ibm,emac4";
+ interrupt-parent = <&EMAC0>;
+ interrupts = <0 1>;
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ interrupt-map = </*Status*/ 0 &UIC2 10 4
+ /*Wake*/ 1 &UIC2 14 4>;
+ reg = <ef600e00 70>;
+ local-mac-address = [000000000000]; /* Filled in by U-Boot */
+ mal-device = <&MAL0>;
+ mal-tx-channel = <0>;
+ mal-rx-channel = <0>;
+ cell-index = <0>;
+ max-frame-size = <2328>;
+ rx-fifo-size = <1000>;
+ tx-fifo-size = <800>;
+ phy-mode = "rgmii";
+ phy-map = <00000000>;
+ zmii-device = <&ZMII0>;
+ zmii-channel = <0>;
+ rgmii-device = <&RGMII0>;
+ rgmii-channel = <0>;
+ has-inverted-stacr-oc;
+ has-new-stacr-staopc;
+ };
+
+ EMAC1: ethernet@ef600f00 {
+ linux,network-index = <1>;
+ device_type = "network";
+ compatible = "ibm,emac-460ex", "ibm,emac4";
+ interrupt-parent = <&EMAC1>;
+ interrupts = <0 1>;
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ interrupt-map = </*Status*/ 0 &UIC2 11 4
+ /*Wake*/ 1 &UIC2 15 4>;
+ reg = <ef600f00 70>;
+ local-mac-address = [000000000000]; /* Filled in by U-Boot */
+ mal-device = <&MAL0>;
+ mal-tx-channel = <1>;
+ mal-rx-channel = <8>;
+ cell-index = <1>;
+ max-frame-size = <2328>;
+ rx-fifo-size = <1000>;
+ tx-fifo-size = <800>;
+ phy-mode = "rgmii";
+ phy-map = <00000000>;
+ zmii-device = <&ZMII0>;
+ zmii-channel = <1>;
+ rgmii-device = <&RGMII0>;
+ rgmii-channel = <1>;
+ has-inverted-stacr-oc;
+ has-new-stacr-staopc;
+ };
+ };
+
+ PCIX0: pci@c0ec00000 {
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "ibm,plb-pcix-460ex", "ibm,plb-pcix";
+ primary;
+ large-inbound-windows;
+ enable-msi-hole;
+ reg = <c 0ec00000 8 /* Config space access */
+ 0 0 0 /* no IACK cycles */
+ c 0ed00000 4 /* Special cycles */
+ c 0ec80000 100 /* Internal registers */
+ c 0ec80100 fc>; /* Internal messaging registers */
+
+ /* Outbound ranges, one memory and one IO,
+ * later cannot be changed
+ */
+ ranges = <02000000 0 80000000 0000000d 80000000 0 80000000
+ 01000000 0 00000000 0000000c 08000000 0 00010000>;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = <42000000 0 0 0 0 0 80000000>;
+
+ /* This drives busses 0 to 0x3f */
+ bus-range = <0 3f>;
+
+ /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-2 */
+ interrupt-map-mask = <0000 0 0 0>;
+ interrupt-map = < 0000 0 0 0 &UIC1 2 8 >;
+ };
+
+ PCIE0: pciex@d00000000 {
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
+ primary;
+ port = <0>; /* port number */
+ reg = <d 00000000 20000000 /* Config space access */
+ c 08010000 00001000>; /* Registers */
+ dcr-reg = <100 020>;
+ sdr-base = <300>;
+
+ /* Outbound ranges, one memory and one IO,
+ * later cannot be changed
+ */
+ ranges = <02000000 0 80000000 0000000e 00000000 0 80000000
+ 01000000 0 00000000 0000000f 80000000 0 00010000>;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = <42000000 0 0 0 0 0 80000000>;
+
+ /* This drives busses 40 to 0x7f */
+ bus-range = <40 7f>;
+
+ /* Legacy interrupts (note the weird polarity, the bridge seems
+ * to invert PCIe legacy interrupts).
+ * We are de-swizzling here because the numbers are actually for
+ * port of the root complex virtual P2P bridge. But I want
+ * to avoid putting a node for it in the tree, so the numbers
+ * below are basically de-swizzled numbers.
+ * The real slot is on idsel 0, so the swizzling is 1:1
+ */
+ interrupt-map-mask = <0000 0 0 7>;
+ interrupt-map = <
+ 0000 0 0 1 &UIC3 c 4 /* swizzled int A */
+ 0000 0 0 2 &UIC3 d 4 /* swizzled int B */
+ 0000 0 0 3 &UIC3 e 4 /* swizzled int C */
+ 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>;
+ };
+
+ PCIE1: pciex@d20000000 {
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
+ primary;
+ port = <1>; /* port number */
+ reg = <d 20000000 20000000 /* Config space access */
+ c 08011000 00001000>; /* Registers */
+ dcr-reg = <120 020>;
+ sdr-base = <340>;
+
+ /* Outbound ranges, one memory and one IO,
+ * later cannot be changed
+ */
+ ranges = <02000000 0 80000000 0000000e 80000000 0 80000000
+ 01000000 0 00000000 0000000f 80010000 0 00010000>;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = <42000000 0 0 0 0 0 80000000>;
+
+ /* This drives busses 80 to 0xbf */
+ bus-range = <80 bf>;
+
+ /* Legacy interrupts (note the weird polarity, the bridge seems
+ * to invert PCIe legacy interrupts).
+ * We are de-swizzling here because the numbers are actually for
+ * port of the root complex virtual P2P bridge. But I want
+ * to avoid putting a node for it in the tree, so the numbers
+ * below are basically de-swizzled numbers.
+ * The real slot is on idsel 0, so the swizzling is 1:1
+ */
+ interrupt-map-mask = <0000 0 0 7>;
+ interrupt-map = <
+ 0000 0 0 1 &UIC3 10 4 /* swizzled int A */
+ 0000 0 0 2 &UIC3 11 4 /* swizzled int B */
+ 0000 0 0 3 &UIC3 12 4 /* swizzled int C */
+ 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>;
+ };
+ };
+};
--
1.5.4.2
^ permalink raw reply related
* Re: [PATCH] Add support for binary includes.
From: Grant Likely @ 2008-02-22 6:05 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, jdl
In-Reply-To: <20080220191941.GA2062@ld0162-tx32.am.freescale.net>
On Wed, Feb 20, 2008 at 12:19 PM, Scott Wood <scottwood@freescale.com> wrote:
> A property's data can be populated with a file's contents
> as follows:
>
> node {
> prop = /incbin/("path/to/data");
> };
>
> A subset of a file can be included by passing start and size parameters.
> For example, to include bytes 8 through 23:
>
> node {
> prop = /incbin/("path/to/data", 8, 16);
> };
Can I ask; what is the intended usage of such a thing? How large
would a typical binary blob be?
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [PATCH 1/5] [POWERPC] Add AMCC 460EX/460GT support to cputable.c & cpu_setup_44x.S
From: Benjamin Herrenschmidt @ 2008-02-22 6:23 UTC (permalink / raw)
To: Stefan Roese; +Cc: linuxppc-dev
In-Reply-To: <1203602435-11302-1-git-send-email-sr@denx.de>
On Thu, 2008-02-21 at 15:00 +0100, Stefan Roese wrote:
> Signed-off-by: Stefan Roese <sr@denx.de>
Ack.
> ---
> arch/powerpc/kernel/cpu_setup_44x.S | 5 ++++-
> arch/powerpc/kernel/cputable.c | 28 +++++++++++++++++++++++++++-
> 2 files changed, 31 insertions(+), 2 deletions(-)
>
> diff --git a/arch/powerpc/kernel/cpu_setup_44x.S b/arch/powerpc/kernel/cpu_setup_44x.S
> index 6250443..5465e8d 100644
> --- a/arch/powerpc/kernel/cpu_setup_44x.S
> +++ b/arch/powerpc/kernel/cpu_setup_44x.S
> @@ -3,7 +3,7 @@
> * Valentine Barshak <vbarshak@ru.mvista.com>
> * MontaVista Software, Inc (c) 2007
> *
> - * Based on cpu_setup_6xx code by
> + * Based on cpu_setup_6xx code by
> * Benjamin Herrenschmidt <benh@kernel.crashing.org>
> *
> * This program is free software; you can redistribute it and/or
> @@ -32,6 +32,9 @@ _GLOBAL(__setup_cpu_440grx)
> bl __fixup_440A_mcheck
> mtlr r4
> blr
> +_GLOBAL(__setup_cpu_460ex)
> +_GLOBAL(__setup_cpu_460gt)
> + b __init_fpu_44x
> _GLOBAL(__setup_cpu_440gx)
> _GLOBAL(__setup_cpu_440spe)
> b __fixup_440A_mcheck
> diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
> index 2a8f5cc..26ffb44 100644
> --- a/arch/powerpc/kernel/cputable.c
> +++ b/arch/powerpc/kernel/cputable.c
> @@ -36,6 +36,8 @@ extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
> extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
> extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
> extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
> +extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
> +extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
> extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
> extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
> extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
> @@ -1397,6 +1399,30 @@ static struct cpu_spec __initdata cpu_specs[] = {
> .machine_check = machine_check_440A,
> .platform = "ppc440",
> },
> + { /* 460EX */
> + .pvr_mask = 0xffff0002,
> + .pvr_value = 0x13020002,
> + .cpu_name = "460EX",
> + .cpu_features = CPU_FTRS_44X,
> + .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
> + .icache_bsize = 32,
> + .dcache_bsize = 32,
> + .cpu_setup = __setup_cpu_460ex,
> + .machine_check = machine_check_440A,
> + .platform = "ppc440",
> + },
> + { /* 460GT */
> + .pvr_mask = 0xffff0002,
> + .pvr_value = 0x13020000,
> + .cpu_name = "460GT",
> + .cpu_features = CPU_FTRS_44X,
> + .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
> + .icache_bsize = 32,
> + .dcache_bsize = 32,
> + .cpu_setup = __setup_cpu_460gt,
> + .machine_check = machine_check_440A,
> + .platform = "ppc440",
> + },
> #endif /* CONFIG_44x */
> #ifdef CONFIG_FSL_BOOKE
> #ifdef CONFIG_E200
> @@ -1512,7 +1538,7 @@ struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
> *t = *s;
> *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
> #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
> - /* ppc64 and booke expect identify_cpu to also call
> + /* ppc64 and booke expect identify_cpu to also call
> * setup_cpu for that processor. I will consolidate
> * that at a later time, for now, just use #ifdef.
> * we also don't need to PTRRELOC the function pointer
^ permalink raw reply
* Re: [PATCH 2/5] [POWERPC] Add AMCC Canyonlands 460EX eval board support to platforms/44x
From: Benjamin Herrenschmidt @ 2008-02-22 6:23 UTC (permalink / raw)
To: Stefan Roese; +Cc: linuxppc-dev
In-Reply-To: <1203602446-11330-1-git-send-email-sr@denx.de>
On Thu, 2008-02-21 at 15:00 +0100, Stefan Roese wrote:
> Signed-off-by: Stefan Roese <sr@denx.de>
Ack.
> ---
> arch/powerpc/platforms/44x/Kconfig | 18 ++++++++
> arch/powerpc/platforms/44x/Makefile | 1 +
> arch/powerpc/platforms/44x/canyonlands.c | 64 ++++++++++++++++++++++++++++++
> 3 files changed, 83 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/platforms/44x/canyonlands.c
>
> diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
> index c062c4c..b56690c 100644
> --- a/arch/powerpc/platforms/44x/Kconfig
> +++ b/arch/powerpc/platforms/44x/Kconfig
> @@ -67,6 +67,16 @@ config WARP
> See http://www.pikatechnologies.com/ and follow the "PIKA for Computer
> Telephony Developers" link for more information.
>
> +config CANYONLANDS
> + bool "Canyonlands"
> + depends on 44x
> + default n
> + select 460EX
> + select PCI
> + select PPC4xx_PCI_EXPRESS
> + help
> + This option enables support for the AMCC PPC460EX evaluation board.
> +
> #config LUAN
> # bool "Luan"
> # depends on 44x
> @@ -122,6 +132,14 @@ config 440SPe
> select IBM_NEW_EMAC_EMAC4
> bool
>
> +config 460EX
> + bool
> + select PPC_FPU
> + select IBM_NEW_EMAC_EMAC4
> + select IBM_NEW_EMAC_RGMII
> + select IBM_NEW_EMAC_ZMII
> + select IBM_NEW_EMAC_TAH
> +
> # 44x errata/workaround config symbols, selected by the CPU models above
> config IBM440EP_ERR42
> bool
> diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile
> index 0864d4f..d70eb03 100644
> --- a/arch/powerpc/platforms/44x/Makefile
> +++ b/arch/powerpc/platforms/44x/Makefile
> @@ -7,3 +7,4 @@ obj-$(CONFIG_KATMAI) += katmai.o
> obj-$(CONFIG_RAINIER) += rainier.o
> obj-$(CONFIG_WARP) += warp.o
> obj-$(CONFIG_WARP) += warp-nand.o
> +obj-$(CONFIG_CANYONLANDS) += canyonlands.o
> diff --git a/arch/powerpc/platforms/44x/canyonlands.c b/arch/powerpc/platforms/44x/canyonlands.c
> new file mode 100644
> index 0000000..dac5b32
> --- /dev/null
> +++ b/arch/powerpc/platforms/44x/canyonlands.c
> @@ -0,0 +1,64 @@
> +/*
> + * Canyonlands board specific routines
> + *
> + * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
> + *
> + * Based on the Katmai code by
> + * Benjamin Herrenschmidt <benh@kernel.crashing.org>
> + * Copyright 2007 IBM Corp.
> + * Josh Boyer <jwboyer@linux.vnet.ibm.com>
> + * Copyright 2007 IBM Corporation
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +#include <linux/init.h>
> +#include <linux/of_platform.h>
> +
> +#include <asm/machdep.h>
> +#include <asm/prom.h>
> +#include <asm/udbg.h>
> +#include <asm/time.h>
> +#include <asm/uic.h>
> +#include <asm/pci-bridge.h>
> +
> +#include "44x.h"
> +
> +static __initdata struct of_device_id canyonlands_of_bus[] = {
> + { .compatible = "ibm,plb4", },
> + { .compatible = "ibm,opb", },
> + { .compatible = "ibm,ebc", },
> + {},
> +};
> +
> +static int __init canyonlands_device_probe(void)
> +{
> + of_platform_bus_probe(NULL, canyonlands_of_bus, NULL);
> +
> + return 0;
> +}
> +machine_device_initcall(canyonlands, canyonlands_device_probe);
> +
> +static int __init canyonlands_probe(void)
> +{
> + unsigned long root = of_get_flat_dt_root();
> +
> + if (!of_flat_dt_is_compatible(root, "amcc,canyonlands"))
> + return 0;
> +
> + ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
> +
> + return 1;
> +}
> +
> +define_machine(canyonlands) {
> + .name = "Canyonlands",
> + .probe = canyonlands_probe,
> + .progress = udbg_progress,
> + .init_IRQ = uic_init_tree,
> + .get_irq = uic_get_irq,
> + .restart = ppc44x_reset_system,
> + .calibrate_decr = generic_calibrate_decr,
> +};
^ permalink raw reply
* Re: [PATCH] [POWERPC] Fix L1 cache size in katmai DTS
From: Benjamin Herrenschmidt @ 2008-02-22 6:24 UTC (permalink / raw)
To: Stefan Roese; +Cc: linuxppc-dev
In-Reply-To: <1203607297-15732-1-git-send-email-sr@denx.de>
On Thu, 2008-02-21 at 16:21 +0100, Stefan Roese wrote:
> This patch changes the katmai (440SPe) L1 cache size to 32k. Some
> whitespace issues are cleaned up too.
>
> Signed-off-by: Stefan Roese <sr@denx.de>
Ack.
> ---
> arch/powerpc/boot/dts/katmai.dts | 58 +++++++++++++++++++-------------------
> 1 files changed, 29 insertions(+), 29 deletions(-)
>
> diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts
> index 9bdfc0f..abf7f3e 100644
> --- a/arch/powerpc/boot/dts/katmai.dts
> +++ b/arch/powerpc/boot/dts/katmai.dts
> @@ -38,8 +38,8 @@
> timebase-frequency = <0>; /* Filled in by zImage */
> i-cache-line-size = <20>;
> d-cache-line-size = <20>;
> - i-cache-size = <20000>;
> - d-cache-size = <20000>;
> + i-cache-size = <8000>;
> + d-cache-size = <8000>;
> dcr-controller;
> dcr-access-method = "native";
> };
> @@ -136,11 +136,11 @@
> };
>
> POB0: opb {
> - compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
> + compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
> #address-cells = <1>;
> #size-cells = <1>;
> - ranges = <00000000 4 e0000000 20000000>;
> - clock-frequency = <0>; /* Filled in by zImage */
> + ranges = <00000000 4 e0000000 20000000>;
> + clock-frequency = <0>; /* Filled in by zImage */
>
> EBC0: ebc {
> compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc";
> @@ -153,38 +153,38 @@
> };
>
> UART0: serial@10000200 {
> - device_type = "serial";
> - compatible = "ns16550";
> - reg = <10000200 8>;
> + device_type = "serial";
> + compatible = "ns16550";
> + reg = <10000200 8>;
> virtual-reg = <a0000200>;
> - clock-frequency = <0>; /* Filled in by zImage */
> - current-speed = <1c200>;
> - interrupt-parent = <&UIC0>;
> - interrupts = <0 4>;
> - };
> + clock-frequency = <0>; /* Filled in by zImage */
> + current-speed = <1c200>;
> + interrupt-parent = <&UIC0>;
> + interrupts = <0 4>;
> + };
>
> UART1: serial@10000300 {
> - device_type = "serial";
> - compatible = "ns16550";
> - reg = <10000300 8>;
> + device_type = "serial";
> + compatible = "ns16550";
> + reg = <10000300 8>;
> virtual-reg = <a0000300>;
> - clock-frequency = <0>;
> - current-speed = <0>;
> - interrupt-parent = <&UIC0>;
> - interrupts = <1 4>;
> - };
> + clock-frequency = <0>;
> + current-speed = <0>;
> + interrupt-parent = <&UIC0>;
> + interrupts = <1 4>;
> + };
>
>
> UART2: serial@10000600 {
> - device_type = "serial";
> - compatible = "ns16550";
> - reg = <10000600 8>;
> + device_type = "serial";
> + compatible = "ns16550";
> + reg = <10000600 8>;
> virtual-reg = <a0000600>;
> - clock-frequency = <0>;
> - current-speed = <0>;
> - interrupt-parent = <&UIC1>;
> - interrupts = <5 4>;
> - };
> + clock-frequency = <0>;
> + current-speed = <0>;
> + interrupt-parent = <&UIC1>;
> + interrupts = <5 4>;
> + };
>
> IIC0: i2c@10000400 {
> device_type = "i2c";
^ permalink raw reply
* [PATCH] Fix typos on Kconfig for PowerPC 4xx on-chip ethernet driver
From: Satoru Takeuchi @ 2008-02-22 7:10 UTC (permalink / raw)
To: ebs, linuxppc-dev, netdev
Fix typos on Kconfig for PowerPC 4xx on-chip ethernet driver.
Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com>
---
Index: 2.6.25-rc2/drivers/net/ibm_newemac/Kconfig
===================================================================
--- 2.6.25-rc2.orig/drivers/net/ibm_newemac/Kconfig 2008-02-22 15:13:35.000000000 +0900
+++ 2.6.25-rc2/drivers/net/ibm_newemac/Kconfig 2008-02-22 15:13:54.000000000 +0900
@@ -43,7 +43,7 @@ config IBM_NEW_EMAC_DEBUG
depends on IBM_NEW_EMAC
default n
-# The options below has to be select'ed by the respective
+# The options below has to be selected by the respective
# processor types or platforms
config IBM_NEW_EMAC_ZMII
^ permalink raw reply
* Re: [BUG] Linux 2.6.25-rc2 - Regression from 2.6.24-rc1-git1 softlockup while bootup on powerpc
From: Andrew Morton @ 2008-02-22 7:24 UTC (permalink / raw)
To: Jens Axboe
Cc: Giani, Srivatsa Vaddagiri, Linux Kernel Mailing List,
linuxppc-dev, Ingo Molnar, Kamalesh Babulal, Dhaval,
KAMEZAWA Hiroyuki, Balbir Singh
In-Reply-To: <20080219083633.GN23197@kernel.dk>
On Tue, 19 Feb 2008 09:36:34 +0100 Jens Axboe <jens.axboe@oracle.com> wrote:
> But I think the radix 'scan over entire tree' is a bit fragile.
eek, it had better not be. Was this an error in the caller? Hope so.
> This
> patch adds a parallel hlist for ease of properly browsing the members,
Even though io_contexts are fairly uncommon, adding more stuff to a data
structure was a pretty sad alternative to fixing a bug in
radix_tree_gang_lookup(), or to fixing a bug in a caller of it.
IOW: what exactly went wrong here??
^ permalink raw reply
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