* Re: [PATCH V3] powerpc, xmon: Enable HW instruction breakpoint on POWER8
From: Anshuman Khandual @ 2014-10-27 6:20 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Michael Ellerman
In-Reply-To: <1412855321-21276-1-git-send-email-khandual@linux.vnet.ibm.com>
On 10/09/2014 05:18 PM, Anshuman Khandual wrote:
> This patch enables support for hardware instruction breakpoints
> on POWER8 with the help of a new register CIABR (Completed
> Instruction Address Breakpoint Register). With this patch, single
> hardware instruction breakpoint can be added and cleared during
> any active xmon debug session. This hardware based instruction
> breakpoint mechanism works correctly along with the existing TRAP
> based instruction breakpoints available on xmon.
Hey Michael,
Any updates on this patch ?
^ permalink raw reply
* Re: [RFC 08/11] powerpc: kvm: add a flag in vcore to sync primary with secondry hwthread
From: Preeti U Murthy @ 2014-10-27 6:28 UTC (permalink / raw)
To: kernelfans, linuxppc-dev, kvm-ppc; +Cc: Paul Mackerras, Alexander Graf
In-Reply-To: <1413487800-7162-9-git-send-email-kernelfans@gmail.com>
On 10/17/2014 12:59 AM, kernelfans@gmail.com wrote:
> The secondary thread can only jump back to host until primary has set
> up the env. Add host_ready field in kvm_vcore to sync this action.
Do we need to do this? We already synchronize among the sibling threads
when there is a need to enter the host. Today too, the secondaries may
require host kernel's intervention and there is already code in which
under such circumstances, the secondaries set the HDEC of the sibling
threads and wait for the primary to switch context. I see the code under
secondary_too_late. Besides this, do we need anything additional to
synchronize the exit to host path? IIUC, we will need synchronization
only in the entry to guest path.
And of course there will be more guest exits now since the secondaries
are as alive in the host as the primary and will have scheduling
interrupts atleast, forcing them to exit to host. This cannot be
trivially solved unless we can isolate these threads in some way.
Regards
Preeti U Murthy
>
> Signed-off-by: Liu Ping Fan <pingfank@linux.vnet.ibm.com>
> ---
> arch/powerpc/include/asm/kvm_host.h | 3 +++
> arch/powerpc/kernel/asm-offsets.c | 3 +++
> arch/powerpc/kvm/book3s_hv_rmhandlers.S | 11 ++++++++++-
> 3 files changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
> index 9a3355e..1310e03 100644
> --- a/arch/powerpc/include/asm/kvm_host.h
> +++ b/arch/powerpc/include/asm/kvm_host.h
> @@ -305,6 +305,9 @@ struct kvmppc_vcore {
> u32 arch_compat;
> ulong pcr;
> ulong dpdes; /* doorbell state (POWER8) */
> +#ifdef CONFIG_KVMPPC_ENABLE_SECONDARY
> + u8 host_ready;
> +#endif
> void *mpp_buffer; /* Micro Partition Prefetch buffer */
> bool mpp_buffer_is_valid;
> };
> diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
> index 0faa8fe..9c04ac2 100644
> --- a/arch/powerpc/kernel/asm-offsets.c
> +++ b/arch/powerpc/kernel/asm-offsets.c
> @@ -562,6 +562,9 @@ int main(void)
> DEFINE(VCORE_LPCR, offsetof(struct kvmppc_vcore, lpcr));
> DEFINE(VCORE_PCR, offsetof(struct kvmppc_vcore, pcr));
> DEFINE(VCORE_DPDES, offsetof(struct kvmppc_vcore, dpdes));
> +#ifdef CONFIG_KVMPPC_ENABLE_SECONDARY
> + DEFINE(VCORE_HOST_READY, offsetof(struct kvmppc_vcore, host_ready));
> +#endif
> DEFINE(VCPU_SLB_E, offsetof(struct kvmppc_slb, orige));
> DEFINE(VCPU_SLB_V, offsetof(struct kvmppc_slb, origv));
> DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
> diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> index 254038b..89ea16c 100644
> --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> @@ -351,7 +351,11 @@ kvm_do_nap:
> kvm_secondary_exit_trampoline:
>
> /* all register is free to use, later kvmppc_secondary_stopper_exit set up them*/
> - //loop-wait for the primary to signal that host env is ready
> + /* wait until the primary to set up host env */
> + ld r5, HSTATE_KVM_VCORE(r13)
> + ld r0, VCORE_HOST_READY(r5)
> + cmp r0, //primary is ready?
> + bne kvm_secondary_exit_trampoline
>
> LOAD_REG_ADDR(r5, kvmppc_secondary_stopper_exit)
> /* fixme, load msr from lpaca stack */
> @@ -1821,6 +1825,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
> li r0, KVM_GUEST_MODE_NONE
> stb r0, HSTATE_IN_GUEST(r13)
>
> +#ifdef PPCKVM_ENABLE_SECONDARY
> + /* signal the secondary that host env is ready */
> + li r0, 1
> + stb r0, VCORE_HOST_READY(r5)
> +#endif
> ld r0, 112+PPC_LR_STKOFF(r1)
> addi r1, r1, 112
> mtlr r0
>
^ permalink raw reply
* Re: CXL: Fix PSL error due to duplicate segment table entries
From: Michael Ellerman @ 2014-10-27 6:41 UTC (permalink / raw)
To: Ian Munsie, mpe
Cc: cbe-oss-dev, mikey, arnd, jk, greg, linux-kernel, linuxppc-dev,
Aneesh Kumar K.V, imunsie, anton
In-Reply-To: <1414383875-20835-1-git-send-email-imunsie@au.ibm.com>
On Mon, 2014-27-10 at 04:24:35 UTC, Ian Munsie wrote:
> From: Ian Munsie <imunsie@au1.ibm.com>
>
> In certain circumstances the PSL can send an interrupt for a segment
Define PSL before using it please.
> miss that the kernel has already handled. This can happen if multiple
> translations for the same segment are queued in the PSL before the
> kernel has restarted the first translation.
>
> The CXL driver did not expect this situation and did not check if a
does not and does not, you haven't patched it yet.
> segment had already been handled. This could cause a duplicate segment
> table entry which in turn caused a PSL error taking down the card.
>
> This patch fixes the issue by checking for existing entries in the
> segment table that match the segment it is trying to insert to avoid
> inserting duplicate entries.
>
> Some of the code has been refactored to simplify it - the segment table
> hash has been moved from cxl_load_segment to find_free_sste where it is
Any reason that's not a separate patch?
> used and we have disabled the secondary hash in the segment table to
> reduce the number of entries that need to be tested from 16 to 8. Due to
> the large segment sizes we use it is extremely unlikely that the
> secondary hash would ever have been used in practice, so this should not
> have any negative impacts and may even improve performance.
Any reason that's not a separate patch?
> copro_calculate_slb will now mask the ESID by the correct mask for 1T vs
Didn't, but will after this patch?
> 256M segments. This has no effect by itself as the extra bits were
> ignored, but it makes debugging the segment table entries easier and
> means that we can directly compare the ESID values for duplicates
> without needing to worry about masking in the comparison.
Separate patch?
cheers
^ permalink raw reply
* Re: [RFC 09/11] powerpc: kvm: handle time base on secondary hwthread
From: Preeti U Murthy @ 2014-10-27 6:40 UTC (permalink / raw)
To: kernelfans, linuxppc-dev, kvm-ppc; +Cc: Paul Mackerras, Alexander Graf
In-Reply-To: <1413487800-7162-10-git-send-email-kernelfans@gmail.com>
On 10/17/2014 12:59 AM, kernelfans@gmail.com wrote:
> (This is a place holder patch.)
> We need to store the time base for host on secondary hwthread.
> Later when switching back, we need to reprogram it with elapse
> time.
>
> Signed-off-by: Liu Ping Fan <pingfank@linux.vnet.ibm.com>
> ---
> arch/powerpc/kvm/book3s_hv_rmhandlers.S | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> index 89ea16c..a817ba6 100644
> --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> @@ -371,6 +371,8 @@ _GLOBAL_TOC(kvmppc_secondary_stopper_enter)
>
> /* fixme: store other register such as msr */
>
> + /* fixme: store the tb, and set it as MAX, so we cease the tick on secondary */
This can lead to serious consequences. First of all, even if we set the
decrementer(not tb) to MAX, it is bound to fire after 4s. That is the
maximum time till which you can keep off the decrementer from firing.
In the hotplug path, the offline cpus nap and their decrementers are
programmed to fire at MAX too. But the difference is that we clear the
LPCR_PECE1 wakeup bit which prevents cpus from waking up on a
decrementer interrupt.
We cannot afford to do this here though because there are other tasks on
the secondary threads' runqueue. They need to be scheduled in.
There are also timers besides the tick_sched one, which can be queued on
these secondary threads. These patches have not taken care to migrate
timers or tasks before entering guest as far as I observed. Hence we
cannot just turn off time base like this and expect to handle the above
mentioned events the next time the primary thread decides to exit to the
host.
Regards
Preeti U Murthy
> +
> /* prevent us to enter kernel */
> li r0, 1
> stb r0, HSTATE_HWTHREAD_REQ(r13)
> @@ -382,6 +384,10 @@ _GLOBAL_TOC(kvmppc_secondary_stopper_enter)
>
> /* enter with vmode */
> kvmppc_secondary_stopper_exit:
> + /* fixme: restore the tb, with the orig val plus time elapse
> + * so we can fire the hrtimer as soon as possible
> + */
> +
> /* fixme, restore the stack which we store on lpaca */
>
> ld r0, 112+PPC_LR_STKOFF(r1)
>
^ permalink raw reply
* Re: [RFC 11/11] powerpc: kvm: Kconfig add an option for enabling secondary hwthread
From: Preeti U Murthy @ 2014-10-27 6:44 UTC (permalink / raw)
To: kernelfans, linuxppc-dev, kvm-ppc; +Cc: Paul Mackerras, Alexander Graf
In-Reply-To: <1413487800-7162-12-git-send-email-kernelfans@gmail.com>
On 10/17/2014 01:00 AM, kernelfans@gmail.com wrote:
> Signed-off-by: Liu Ping Fan <pingfank@linux.vnet.ibm.com>
> ---
> arch/powerpc/kvm/Kconfig | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
> index 602eb51..de38566 100644
> --- a/arch/powerpc/kvm/Kconfig
> +++ b/arch/powerpc/kvm/Kconfig
> @@ -93,6 +93,10 @@ config KVM_BOOK3S_64_HV
>
> If unsure, say N.
>
> +config KVMPPC_ENABLE_SECONDARY
> + tristate "KVM support for running on secondary hwthread in host"
> + depends on KVM_BOOK3S_64_HV
This patch is required ontop of all the rest :) The top patches won't
compile without this one. Every patch in the patchset should be able to
compile successfully without the aid of the patches that come after it.
Regards
Preeti U Murthy
^ permalink raw reply
* [PATCH] powerpc: Remove unused vgacon_remap_base & fix build break
From: Michael Ellerman @ 2014-10-27 9:56 UTC (permalink / raw)
To: linuxppc-dev
The build is broken with CONFIG_PPC32=y, CONFIG_FB_VGA16=y and
CONFIG_VGA_CONSOLE=n.
The problem is that vgacon_remap_base is not defined. It's used in:
#define VGA_MAP_MEM(x,s) (x + vgacon_remap_base)
Which is used in the vga16fb.c code.
Digging down it seems vgacon_remap_base is never initialised. It used to
be, back in arch/ppc (pplus.c and prep_setup.c), but none of that code
ever made it to arch/powerpc.
So given it's been unused for >6 years, remove it.
Whether vga16fb.c works on 32-bit is another question, but this patch
shouldn't affect it.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/include/asm/vga.h | 4 +---
arch/powerpc/kernel/setup_32.c | 5 -----
2 files changed, 1 insertion(+), 8 deletions(-)
diff --git a/arch/powerpc/include/asm/vga.h b/arch/powerpc/include/asm/vga.h
index a2eac409c1ec..e5f8dd366212 100644
--- a/arch/powerpc/include/asm/vga.h
+++ b/arch/powerpc/include/asm/vga.h
@@ -38,12 +38,10 @@ static inline u16 scr_readw(volatile const u16 *addr)
#endif /* !CONFIG_VGA_CONSOLE && !CONFIG_MDA_CONSOLE */
-extern unsigned long vgacon_remap_base;
-
#ifdef __powerpc64__
#define VGA_MAP_MEM(x,s) ((unsigned long) ioremap((x), s))
#else
-#define VGA_MAP_MEM(x,s) (x + vgacon_remap_base)
+#define VGA_MAP_MEM(x,s) (x)
#endif
#define vga_readb(x) (*(x))
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 07831ed0d9ef..e46b56657c53 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -53,11 +53,6 @@ unsigned long ISA_DMA_THRESHOLD;
unsigned int DMA_MODE_READ;
unsigned int DMA_MODE_WRITE;
-#ifdef CONFIG_VGA_CONSOLE
-unsigned long vgacon_remap_base;
-EXPORT_SYMBOL(vgacon_remap_base);
-#endif
-
/*
* These are used in binfmt_elf.c to put aux entries on the stack
* for each elf executable being started.
--
1.9.1
^ permalink raw reply related
* Re: [PATCH] drivers: depend on instead of select BACKLIGHT_CLASS_DEVICE and ACPI_VIDEO
From: Jani Nikula @ 2014-10-27 11:59 UTC (permalink / raw)
To: Tomi Valkeinen, linux-kernel, dri-devel, linuxppc-dev,
platform-driver-x86, linux-usb, linux-fbdev
Cc: Jingoo Han, Daniel Drake, Jens Frederich, David Airlie,
Greg Kroah-Hartman, Jon Nettleton, Randy Dunlap, Lee Jones,
Laurent Pinchart, Darren Hart, Daniel Vetter, Bryan Wu,
Jean-Christophe Plagniol-Villard
In-Reply-To: <54476492.6090105@ti.com>
On Wed, 22 Oct 2014, Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
> On 18/10/14 00:13, Jani Nikula wrote:
>> Documentation/kbuild/kconfig-language.txt warns to use select with care,
>> and in general use select only for non-visible symbols and for symbols
>> with no dependencies, because select will force a symbol to a value
>> without visiting the dependencies.
>>
>> Select has become particularly problematic, interdependently, with the
>> BACKLIGHT_CLASS_DEVICE and ACPI_VIDEO configs. For example:
>>
>> scripts/kconfig/conf --randconfig Kconfig
>> KCONFIG_SEED=0x48312B00
>> warning: (DRM_RADEON && DRM_NOUVEAU && DRM_I915 && DRM_GMA500 &&
>> DRM_SHMOBILE && DRM_TILCDC && FB_BACKLIGHT && FB_MX3 && USB_APPLEDISPLAY
>> && FB_OLPC_DCON && ASUS_LAPTOP && SONY_LAPTOP && THINKPAD_ACPI &&
>> EEEPC_LAPTOP && ACPI_CMPC && SAMSUNG_Q10) selects BACKLIGHT_CLASS_DEVICE
>> which has unmet direct dependencies (HAS_IOMEM && BACKLIGHT_LCD_SUPPORT)
>> warning: (DRM_RADEON && DRM_NOUVEAU && DRM_I915 && DRM_GMA500 &&
>> DRM_SHMOBILE && DRM_TILCDC && FB_BACKLIGHT && FB_MX3 && USB_APPLEDISPLAY
>> && FB_OLPC_DCON && ASUS_LAPTOP && SONY_LAPTOP && THINKPAD_ACPI &&
>> EEEPC_LAPTOP && ACPI_CMPC && SAMSUNG_Q10) selects BACKLIGHT_CLASS_DEVICE
>> which has unmet direct dependencies (HAS_IOMEM && BACKLIGHT_LCD_SUPPORT)
>>
>> With tristates it's possible to end up selecting FOO=y depending on
>> BAR=m in the config, which gets discovered at build time, not config
>> time, like reported in the thread referenced below.
>>
>> Do the following to fix the dependencies:
>>
>> * Depend on instead of select BACKLIGHT_CLASS_DEVICE everywhere. Drop
>> select BACKLIGHT_LCD_SUPPORT in such cases, as it's a dependency of
>> BACKLIGHT_CLASS_DEVICE.
>>
>> * Remove config FB_BACKLIGHT altogether, and replace it with a
>> dependency on BACKLIGHT_CLASS_DEVICE. All configs selecting
>> FB_BACKLIGHT select or depend on FB anyway, so we can simplify.
>>
>> * Depend on (ACPI && ACPI_VIDEO) || ACPI=n in several places instead of
>> selecting ACPI_VIDEO and a number of its dependencies if ACPI is
>> enabled. This is tied to backlight, as ACPI_VIDEO depends on
>> BACKLIGHT_CLASS_DEVICE.
>>
>> * Replace a couple of select INPUT/VT with depends as it seemed to be
>> necessary.
>
> While doing 'depends on' instead of 'select' is an "easy" fix for this,
> I do dislike it quite a bit. It's a major pain to go around the kernel
> config, trying to find all the dependencies that a particular driver
> wants. If I need fb-foobar, I should just be able to enable it, instead
> of first searching and selecting its minor dependencies individually.
Agreed, but I don't think that's specific to this patch.
> So, not a NACK, but a "isn't there an another way to fix this?".
I think the real answer would be to fix kconfig to also show menu items
whose dependencies are not met, and then recursively enabling the
dependencies when the item is enabled. Beyond my scope.
> Looking at backlight... BACKLIGHT_LCD_SUPPORT seems to be a "meta"
> option, it only enables a Kconfig submenu.
>
> So I think we could just remove the whole BACKLIGHT_LCD_SUPPORT option.
> But if we do that, all the items in drivers/video/backlight/Kconfig with
> default 'y' or 'm' would get enabled by default, so I think we should
> remove the 'default's from that file. That makes sense in any case, as I
> don't see why "HP Jornada 700 series LCD Driver" should be "default y".
>
> BACKLIGHT_CLASS_DEVICE doesn't depend on anything except
> BACKLIGHT_LCD_SUPPORT, so after removing BACKLIGHT_LCD_SUPPORT it should
> be safe to 'select' BACKLIGHT_CLASS_DEVICE.
>
> BACKLIGHT_CLASS_DEVICE could be made a hidden option, and the drivers in
> drivers/video/backlight/Kconfig which are under BACKLIGHT_CLASS_DEVICE
> could be made to select BACKLIGHT_CLASS_DEVICE instead.
I think it should be possible to choose between y and m when it's
selected, and it should be possible to enable it when it's not selected
by any drivers. I'm not sure a hidden option is good for that.
> That doesn't exactly fix anything, but I think it makes sense as
> BACKLIGHT_CLASS_DEVICE is something that's selected from all around the
> kernel, so it should be a selectable "library" instead of a Kconfig menu
> option.
At least for drm/i915 BACKLIGHT_CLASS_DEVICE is "an option". We use it
if it's enabled, but we are just fine if it's not. I've learned the way
to express that is
depends on BACKLIGHT_CLASS_DEVICE || BACKLIGHT_CLASS_DEVICE=n
but I don't think there's a way to express that in terms of select, is
there? The dependency above guarantees there's no DRM_I915=y and
BACKLIGHT_CLASS_DEVICE=m combo which would fail. And this, btw, is where
this whole patch got started, as select didn't handle that properly.
> I didn't look at the ACPI_VIDEO side, so no idea how messy that is.
Basically it's another dependency on BACKLIGHT_CLASS_DEVICE. I can only
imagine trying to solve this problem with select is going to end up in
recursive dependencies that spread out and need changing about as wide
as this patch.
In the end, I agree with the problem you have with this patch, but yet I
think it's the right thing to do in terms of expressing the
dependencies.
BR,
Jani.
--
Jani Nikula, Intel Open Source Technology Center
^ permalink raw reply
* [PATCH 11/16] s390/MSI: Use MSI controller framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-27 13:22 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Xinwei Hu, Yijing Wang,
Thierry Reding, sparclinux, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel,
Konrad Rzeszutek Wilk, Chris Metcalf, Thomas Gleixner,
linux-arm-kernel, Thomas Petazzoni, Tony Luck, Sergei Shtylyov,
linux-kernel, Ralf Baechle, iommu, David Vrabel, Wuyun,
linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1414416142-31239-1-git-send-email-wangyijing@huawei.com>
Use MSI controller framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Acked-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
---
arch/s390/include/asm/pci.h | 1 +
arch/s390/pci/pci.c | 19 +++++++++++++++++--
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/arch/s390/include/asm/pci.h b/arch/s390/include/asm/pci.h
index c030900..bf14da2 100644
--- a/arch/s390/include/asm/pci.h
+++ b/arch/s390/include/asm/pci.h
@@ -88,6 +88,7 @@ struct zpci_dev {
u32 uid; /* user defined id */
u8 util_str[CLP_UTIL_STR_LEN]; /* utility string */
+ struct msi_controller *msi_ctrl;
/* IRQ stuff */
u64 msi_addr; /* MSI address */
struct airq_iv *aibv; /* adapter interrupt bit vector */
diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c
index 552b990..beed5ab 100644
--- a/arch/s390/pci/pci.c
+++ b/arch/s390/pci/pci.c
@@ -358,7 +358,15 @@ static void zpci_irq_handler(struct airq_struct *airq)
}
}
-int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
+struct msi_controller *pcibios_msi_controller(struct pci_bus *bus)
+{
+ struct zpci_dev *zpci = bus->sysdata;
+
+ return zpci->msi_ctrl;
+}
+
+static int zpci_setup_msi_irqs(struct msi_controller *ctrl,
+ struct pci_dev *pdev, int nvec, int type)
{
struct zpci_dev *zdev = get_zdev(pdev);
unsigned int hwirq, msi_vecs;
@@ -434,7 +442,8 @@ out:
return rc;
}
-void arch_teardown_msi_irqs(struct pci_dev *pdev)
+static void zpci_teardown_msi_irqs(struct msi_controller *ctrl,
+ struct pci_dev *pdev)
{
struct zpci_dev *zdev = get_zdev(pdev);
struct msi_desc *msi;
@@ -464,6 +473,11 @@ void arch_teardown_msi_irqs(struct pci_dev *pdev)
airq_iv_free_bit(zpci_aisb_iv, zdev->aisb);
}
+static struct msi_controller zpci_msi_ctrl = {
+ .setup_irqs = zpci_setup_msi_irqs,
+ .teardown_irqs = zpci_teardown_msi_irqs,
+};
+
static void zpci_map_resources(struct zpci_dev *zdev)
{
struct pci_dev *pdev = zdev->pdev;
@@ -749,6 +763,7 @@ static int zpci_scan_bus(struct zpci_dev *zdev)
if (ret)
return ret;
+ zdev->msi_ctrl = &zpci_msi_ctrl;
zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops,
zdev, &resources);
if (!zdev->bus) {
--
1.7.1
^ permalink raw reply related
* [PATCH 13/16] IA64/MSI: Use MSI controller framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-27 13:22 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Xinwei Hu, Yijing Wang,
Thierry Reding, sparclinux, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel,
Konrad Rzeszutek Wilk, Chris Metcalf, Thomas Gleixner,
linux-arm-kernel, Thomas Petazzoni, Tony Luck, Sergei Shtylyov,
linux-kernel, Ralf Baechle, iommu, David Vrabel, Wuyun,
linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1414416142-31239-1-git-send-email-wangyijing@huawei.com>
Use MSI controller framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
arch/ia64/include/asm/pci.h | 3 ++-
arch/ia64/kernel/msi_ia64.c | 24 ++++++++++++++++++------
arch/ia64/pci/pci.c | 1 +
3 files changed, 21 insertions(+), 7 deletions(-)
diff --git a/arch/ia64/include/asm/pci.h b/arch/ia64/include/asm/pci.h
index 52af5ed..805bbc3 100644
--- a/arch/ia64/include/asm/pci.h
+++ b/arch/ia64/include/asm/pci.h
@@ -93,7 +93,7 @@ struct pci_controller {
void *iommu;
int segment;
int node; /* nearest node with memory or NUMA_NO_NODE for global allocation */
-
+ struct msi_controller *msi_ctrl;
void *platform_data;
};
@@ -101,6 +101,7 @@ struct pci_controller {
#define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata)
#define pci_domain_nr(busdev) (PCI_CONTROLLER(busdev)->segment)
+extern struct msi_controller ia64_msi_ctrl;
extern struct pci_ops pci_root_ops;
static inline int pci_proc_domain(struct pci_bus *bus)
diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c
index 8c3730c..b92b8e2 100644
--- a/arch/ia64/kernel/msi_ia64.c
+++ b/arch/ia64/kernel/msi_ia64.c
@@ -42,7 +42,7 @@ static int ia64_set_msi_irq_affinity(struct irq_data *idata,
}
#endif /* CONFIG_SMP */
-int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
+int __ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
{
struct msi_msg msg;
unsigned long dest_phys_id;
@@ -77,7 +77,7 @@ int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
return 0;
}
-void ia64_teardown_msi_irq(unsigned int irq)
+void __ia64_teardown_msi_irq(unsigned int irq)
{
destroy_irq(irq);
}
@@ -111,23 +111,35 @@ static struct irq_chip ia64_msi_chip = {
.irq_retrigger = ia64_msi_retrigger_irq,
};
+struct msi_controller *pcibios_msi_controller(struct pci_bus *bus)
+{
+ struct pci_controller *ctrl = bus->sysdata;
+
+ return ctrl->msi_ctrl;
+}
-int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
+static int ia64_setup_msi_irq(struct msi_controller *ctrl,
+ struct pci_dev *pdev, struct msi_desc *desc)
{
if (platform_setup_msi_irq)
return platform_setup_msi_irq(pdev, desc);
- return ia64_setup_msi_irq(pdev, desc);
+ return __ia64_setup_msi_irq(pdev, desc);
}
-void arch_teardown_msi_irq(unsigned int irq)
+static void ia64_teardown_msi_irq(struct msi_controller *ctrl, unsigned int irq)
{
if (platform_teardown_msi_irq)
return platform_teardown_msi_irq(irq);
- return ia64_teardown_msi_irq(irq);
+ return __ia64_teardown_msi_irq(irq);
}
+struct msi_controller ia64_msi_ctrl = {
+ .setup_irq = ia64_setup_msi_irq,
+ .teardown_irq = ia64_teardown_msi_irq,
+};
+
#ifdef CONFIG_INTEL_IOMMU
#ifdef CONFIG_SMP
static int dmar_msi_set_affinity(struct irq_data *data,
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index 291a582..875f46a 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -437,6 +437,7 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
controller->companion = device;
controller->node = acpi_get_node(device->handle);
+ controller->msi_ctrl = &ia64_msi_ctrl;
info = kzalloc(sizeof(*info), GFP_KERNEL);
if (!info) {
--
1.7.1
^ permalink raw reply related
* [PATCH 03/16] x86/xen/MSI: Use MSI controller framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-27 13:22 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Xinwei Hu, Yijing Wang,
Thierry Reding, sparclinux, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel,
Konrad Rzeszutek Wilk, Chris Metcalf, Thomas Gleixner,
linux-arm-kernel, Thomas Petazzoni, Tony Luck, Sergei Shtylyov,
linux-kernel, Ralf Baechle, iommu, David Vrabel, Wuyun,
linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1414416142-31239-1-git-send-email-wangyijing@huawei.com>
Use MSI controller framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
CC: David Vrabel <david.vrabel@citrix.com>
CC: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
---
arch/x86/pci/xen.c | 45 +++++++++++++++++++++++++++------------------
1 files changed, 27 insertions(+), 18 deletions(-)
diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c
index 466b978..83d8d50 100644
--- a/arch/x86/pci/xen.c
+++ b/arch/x86/pci/xen.c
@@ -157,7 +157,8 @@ static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
struct xen_pci_frontend_ops *xen_pci_frontend;
EXPORT_SYMBOL_GPL(xen_pci_frontend);
-static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+static int xen_setup_msi_irqs(struct msi_controller *ctrl,
+ struct pci_dev *dev, int nvec, int type)
{
int irq, ret, i;
struct msi_desc *msidesc;
@@ -219,7 +220,8 @@ static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
msg->data = XEN_PIRQ_MSI_DATA;
}
-static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+static int xen_hvm_setup_msi_irqs(struct msi_controller *ctrl,
+ struct pci_dev *dev, int nvec, int type)
{
int irq, pirq;
struct msi_desc *msidesc;
@@ -267,7 +269,8 @@ error:
#ifdef CONFIG_XEN_DOM0
static bool __read_mostly pci_seg_supported = true;
-static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+static int xen_initdom_setup_msi_irqs(struct msi_controller *ctrl,
+ struct pci_dev *dev, int nvec, int type)
{
int ret = 0;
struct msi_desc *msidesc;
@@ -349,7 +352,8 @@ out:
return ret;
}
-static void xen_initdom_restore_msi_irqs(struct pci_dev *dev)
+static void xen_initdom_restore_msi_irqs(struct msi_controller *ctrl,
+ struct pci_dev *dev)
{
int ret = 0;
@@ -376,7 +380,13 @@ static void xen_initdom_restore_msi_irqs(struct pci_dev *dev)
}
#endif
-static void xen_teardown_msi_irqs(struct pci_dev *dev)
+static void xen_teardown_msi_irq(struct msi_controller *ctrl, unsigned int irq)
+{
+ xen_destroy_irq(irq);
+}
+
+static void xen_teardown_msi_irqs(struct msi_controller *ctrl,
+ struct pci_dev *dev)
{
struct msi_desc *msidesc;
@@ -390,11 +400,7 @@ static void xen_teardown_msi_irqs(struct pci_dev *dev)
default_teardown_msi_irqs(dev);
}
-static void xen_teardown_msi_irq(unsigned int irq)
-{
- xen_destroy_irq(irq);
-}
-
+struct msi_controller xen_msi_ctrl;
#endif
int __init pci_xen_init(void)
@@ -415,9 +421,10 @@ int __init pci_xen_init(void)
#endif
#ifdef CONFIG_PCI_MSI
- x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
- x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
- x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
+ xen_msi_ctrl.setup_irqs = xen_setup_msi_irqs;
+ xen_msi_ctrl.teardown_irq = xen_teardown_msi_irq;
+ xen_msi_ctrl.teardown_irqs = xen_teardown_msi_irqs;
+ x86_msi_ctrl = &xen_msi_ctrl;
pci_msi_ignore_mask = 1;
#endif
return 0;
@@ -437,8 +444,9 @@ int __init pci_xen_hvm_init(void)
#endif
#ifdef CONFIG_PCI_MSI
- x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
- x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
+ xen_msi_ctrl.setup_irqs = xen_hvm_setup_msi_irqs;
+ xen_msi_ctrl.teardown_irq = xen_teardown_msi_irq;
+ x86_msi_ctrl = &xen_msi_ctrl;
#endif
return 0;
}
@@ -495,9 +503,10 @@ int __init pci_xen_initial_domain(void)
int irq;
#ifdef CONFIG_PCI_MSI
- x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
- x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
- x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
+ xen_msi_ctrl.setup_irqs = xen_initdom_setup_msi_irqs;
+ xen_msi_ctrl.teardown_irq = xen_teardown_msi_irq;
+ xen_msi_ctrl.restore_irqs = xen_initdom_restore_msi_irqs;
+ x86_msi_ctrl = &xen_msi_ctrl;
pci_msi_ignore_mask = 1;
#endif
xen_setup_acpi_sci();
--
1.7.1
^ permalink raw reply related
* [PATCH 02/16] x86/MSI: Use MSI controller framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-27 13:22 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Xinwei Hu, Yijing Wang,
Thierry Reding, sparclinux, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel,
Konrad Rzeszutek Wilk, Chris Metcalf, Thomas Gleixner,
linux-arm-kernel, Thomas Petazzoni, Tony Luck, Sergei Shtylyov,
linux-kernel, Ralf Baechle, iommu, David Vrabel, Wuyun,
linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1414416142-31239-1-git-send-email-wangyijing@huawei.com>
Use MSI controller framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
arch/x86/include/asm/pci.h | 4 ++++
arch/x86/kernel/apic/io_apic.c | 25 +++++++++++++++++++++++++
arch/x86/pci/acpi.c | 1 +
arch/x86/pci/common.c | 3 +++
4 files changed, 33 insertions(+), 0 deletions(-)
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index 0892ea0..1af3d77 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -20,6 +20,9 @@ struct pci_sysdata {
#ifdef CONFIG_X86_64
void *iommu; /* IOMMU private data */
#endif
+#ifdef CONFIG_PCI_MSI
+ struct msi_controller *msi_ctrl;
+#endif
};
extern int pci_routeirq;
@@ -101,6 +104,7 @@ void native_teardown_msi_irq(unsigned int irq);
void native_restore_msi_irqs(struct pci_dev *dev);
int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc,
unsigned int irq_base, unsigned int irq_offset);
+extern struct msi_controller *x86_msi_ctrl;
#else
#define native_setup_msi_irqs NULL
#define native_teardown_msi_irq NULL
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 1183d54..8b8c671 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -3234,11 +3234,36 @@ int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
return 0;
}
+static int __native_setup_msi_irqs(struct msi_controller *ctrl,
+ struct pci_dev *dev, int nvec, int type)
+{
+ return native_setup_msi_irqs(dev, nvec, type);
+}
+
void native_teardown_msi_irq(unsigned int irq)
{
irq_free_hwirq(irq);
}
+static void __native_teardown_msi_irq(struct msi_controller *ctrl,
+ unsigned int irq)
+{
+ native_teardown_msi_irq(irq);
+}
+
+static struct msi_controller native_msi_ctrl = {
+ .setup_irqs = __native_setup_msi_irqs,
+ .teardown_irq = __native_teardown_msi_irq,
+};
+
+struct msi_controller *pcibios_msi_controller(struct pci_bus *bus)
+{
+ struct pci_sysdata *sys = bus->sysdata;
+
+ return sys->msi_ctrl;
+}
+struct msi_controller *x86_msi_ctrl = &native_msi_ctrl;
+
#ifdef CONFIG_DMAR_TABLE
static int
dmar_msi_set_affinity(struct irq_data *data, const struct cpumask *mask,
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index cfd1b13..edb14dd 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -508,6 +508,7 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
sd = &info->sd;
sd->domain = domain;
+ sd->msi_ctrl = x86_msi_ctrl;
sd->node = node;
sd->companion = device;
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 7b20bcc..4deb240 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -468,6 +468,9 @@ void pcibios_scan_root(int busnum)
return;
}
sd->node = x86_pci_root_bus_node(busnum);
+#ifdef CONFIG_PCI_MSI
+ sd->msi_ctrl = x86_msi_ctrl;
+#endif
x86_pci_root_bus_resources(busnum, &resources);
printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, sd, &resources);
--
1.7.1
^ permalink raw reply related
* [PATCH 01/16] PCI/MSI: Refactor MSI controller to make it become more common
From: Yijing Wang @ 2014-10-27 13:22 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Xinwei Hu, Yijing Wang,
Thierry Reding, sparclinux, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel,
Konrad Rzeszutek Wilk, Chris Metcalf, Thomas Gleixner,
linux-arm-kernel, Thomas Petazzoni, Tony Luck, Sergei Shtylyov,
linux-kernel, Ralf Baechle, iommu, David Vrabel, Wuyun,
linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1414416142-31239-1-git-send-email-wangyijing@huawei.com>
Now there are a lot of weak arch MSI functions in MSI code.
These functions make MSI driver complex. Because people need
to know much which arch MSI function should be overrode and
which is not. Thierry introduced MSI chip framework to configure
MSI/MSI-X irq in arm. MSI chip framework is better than raw arch
MSI functions, people can clearly know they should implement which
MSI ops in specific platform. Use MSI chip framework to refactor all
other platform MSI code to eliminate weak arch MSI functions.
This patch add .restore_irqs(), .teardown_irqs() and .setup_irqs()
to make it become more common.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
drivers/pci/msi.c | 15 +++++++++++++++
include/linux/msi.h | 8 ++++++--
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 27b6a54..0e1da3e 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -70,6 +70,11 @@ int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
{
struct msi_desc *entry;
int ret;
+ struct msi_controller *ctrl;
+
+ ctrl = pci_msi_controller(dev->bus);
+ if (ctrl && ctrl->setup_irqs)
+ return ctrl->setup_irqs(ctrl, dev, nvec, type);
/*
* If an architecture wants to support multiple MSI, it needs to
@@ -112,6 +117,11 @@ void default_teardown_msi_irqs(struct pci_dev *dev)
void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
{
+ struct msi_controller *ctrl = pci_msi_controller(dev->bus);
+
+ if (ctrl && ctrl->teardown_irqs)
+ return ctrl->teardown_irqs(ctrl, dev);
+
return default_teardown_msi_irqs(dev);
}
@@ -135,6 +145,11 @@ static void default_restore_msi_irq(struct pci_dev *dev, int irq)
void __weak arch_restore_msi_irqs(struct pci_dev *dev)
{
+ struct msi_controller *ctrl = pci_msi_controller(dev->bus);
+
+ if (ctrl && ctrl->restore_irqs)
+ return ctrl->restore_irqs(ctrl, dev);
+
return default_restore_msi_irqs(dev);
}
diff --git a/include/linux/msi.h b/include/linux/msi.h
index 6704991..4426cb4 100644
--- a/include/linux/msi.h
+++ b/include/linux/msi.h
@@ -71,9 +71,13 @@ struct msi_controller {
struct device_node *of_node;
struct list_head list;
- int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev,
+ int (*setup_irq)(struct msi_controller *ctrl, struct pci_dev *dev,
struct msi_desc *desc);
- void (*teardown_irq)(struct msi_controller *chip, unsigned int irq);
+ int (*setup_irqs)(struct msi_controller *ctrl, struct pci_dev *dev,
+ int nvec, int type);
+ void (*teardown_irq)(struct msi_controller *ctrl, unsigned int irq);
+ void (*teardown_irqs)(struct msi_controller *ctrl, struct pci_dev *dev);
+ void (*restore_irqs)(struct msi_controller *ctrl, struct pci_dev *dev);
};
#endif /* LINUX_MSI_H */
--
1.7.1
^ permalink raw reply related
* [PATCH 07/16] MIPS/Octeon/MSI: Use MSI controller framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-27 13:22 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Xinwei Hu, Yijing Wang,
Thierry Reding, sparclinux, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel,
Konrad Rzeszutek Wilk, Chris Metcalf, Thomas Gleixner,
linux-arm-kernel, Thomas Petazzoni, Tony Luck, Sergei Shtylyov,
linux-kernel, Ralf Baechle, iommu, David Vrabel, Wuyun,
linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1414416142-31239-1-git-send-email-wangyijing@huawei.com>
Use MSI controller framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
arch/mips/include/asm/octeon/pci-octeon.h | 4 +++
arch/mips/pci/msi-octeon.c | 31 ++++++++++++++++------------
arch/mips/pci/pci-octeon.c | 3 ++
3 files changed, 25 insertions(+), 13 deletions(-)
diff --git a/arch/mips/include/asm/octeon/pci-octeon.h b/arch/mips/include/asm/octeon/pci-octeon.h
index 64ba56a..61c038d 100644
--- a/arch/mips/include/asm/octeon/pci-octeon.h
+++ b/arch/mips/include/asm/octeon/pci-octeon.h
@@ -66,4 +66,8 @@ enum octeon_dma_bar_type {
*/
extern enum octeon_dma_bar_type octeon_dma_bar_type;
+#ifdef CONFIG_PCI_MSI
+extern struct msi_controller octeon_msi_ctrl;
+#endif
+
#endif
diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c
index 63bbe07..30976da 100644
--- a/arch/mips/pci/msi-octeon.c
+++ b/arch/mips/pci/msi-octeon.c
@@ -57,7 +57,7 @@ static int msi_irq_size;
*
* Returns 0 on success.
*/
-int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
+static int octeon_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
{
struct msi_msg msg;
u16 control;
@@ -132,12 +132,12 @@ msi_irq_allocated:
/* Make sure the search for available interrupts didn't fail */
if (irq >= 64) {
if (request_private_bits) {
- pr_err("arch_setup_msi_irq: Unable to find %d free interrupts, trying just one",
- 1 << request_private_bits);
+ pr_err("%s: Unable to find %d free interrupts, trying just one",
+ __func__, 1 << request_private_bits);
request_private_bits = 0;
goto try_only_one;
} else
- panic("arch_setup_msi_irq: Unable to find a free MSI interrupt");
+ panic("%s: Unable to find a free MSI interrupt", __func__);
}
/* MSI interrupts start at logical IRQ OCTEON_IRQ_MSI_BIT0 */
@@ -168,7 +168,7 @@ msi_irq_allocated:
msg.address_hi = (0 + CVMX_SLI_PCIE_MSI_RCV) >> 32;
break;
default:
- panic("arch_setup_msi_irq: Invalid octeon_dma_bar_type");
+ panic("%s: Invalid octeon_dma_bar_type", __func__);
}
msg.data = irq - OCTEON_IRQ_MSI_BIT0;
@@ -182,7 +182,8 @@ msi_irq_allocated:
return 0;
}
-int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+static int octeon_setup_msi_irqs(struct msi_controller *ctrl, struct pci_dev *dev,
+ int nvec, int type)
{
struct msi_desc *entry;
int ret;
@@ -201,7 +202,7 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
return 1;
list_for_each_entry(entry, &dev->msi_list, list) {
- ret = arch_setup_msi_irq(dev, entry);
+ ret = octeon_setup_msi_irq(dev, entry);
if (ret < 0)
return ret;
if (ret > 0)
@@ -210,14 +211,13 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
return 0;
}
-
/**
* Called when a device no longer needs its MSI interrupts. All
* MSI interrupts for the device are freed.
*
* @irq: The devices first irq number. There may be multple in sequence.
*/
-void arch_teardown_msi_irq(unsigned int irq)
+static void octeon_teardown_msi_irq(struct msi_controller *ctrl, unsigned int irq)
{
int number_irqs;
u64 bitmask;
@@ -226,8 +226,8 @@ void arch_teardown_msi_irq(unsigned int irq)
if ((irq < OCTEON_IRQ_MSI_BIT0)
|| (irq > msi_irq_size + OCTEON_IRQ_MSI_BIT0))
- panic("arch_teardown_msi_irq: Attempted to teardown illegal "
- "MSI interrupt (%d)", irq);
+ panic("%s: Attempted to teardown illegal "
+ "MSI interrupt (%d)", __func__, irq);
irq -= OCTEON_IRQ_MSI_BIT0;
index = irq / 64;
@@ -249,8 +249,8 @@ void arch_teardown_msi_irq(unsigned int irq)
/* Shift the mask to the correct bit location */
bitmask <<= irq0;
if ((msi_free_irq_bitmask[index] & bitmask) != bitmask)
- panic("arch_teardown_msi_irq: Attempted to teardown MSI "
- "interrupt (%d) not in use", irq);
+ panic("%s: Attempted to teardown MSI "
+ "interrupt (%d) not in use", __func__, irq);
/* Checks are done, update the in use bitmask */
spin_lock(&msi_free_irq_bitmask_lock);
@@ -259,6 +259,11 @@ void arch_teardown_msi_irq(unsigned int irq)
spin_unlock(&msi_free_irq_bitmask_lock);
}
+struct msi_controller octeon_msi_ctrl = {
+ .setup_irqs = octeon_setup_msi_irqs,
+ .teardown_irq = octeon_teardown_msi_irq,
+};
+
static DEFINE_RAW_SPINLOCK(octeon_irq_msi_lock);
static u64 msi_rcv_reg[4];
diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c
index 59cccd9..9935448 100644
--- a/arch/mips/pci/pci-octeon.c
+++ b/arch/mips/pci/pci-octeon.c
@@ -356,6 +356,9 @@ static struct pci_controller octeon_pci_controller = {
.io_resource = &octeon_pci_io_resource,
.io_offset = 0,
.io_map_base = OCTEON_PCI_IOSPACE_BASE,
+#ifdef CONFIG_PCI_MSI
+ .msi_ctrl = &octeon_msi_ctrl,
+#endif
};
--
1.7.1
^ permalink raw reply related
* [PATCH 10/16] Powerpc/MSI: Use MSI controller framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-27 13:22 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Xinwei Hu, Yijing Wang,
Thierry Reding, sparclinux, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel,
Konrad Rzeszutek Wilk, Chris Metcalf, Thomas Gleixner,
linux-arm-kernel, Thomas Petazzoni, Tony Luck, Sergei Shtylyov,
linux-kernel, Ralf Baechle, iommu, David Vrabel, Wuyun,
linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1414416142-31239-1-git-send-email-wangyijing@huawei.com>
Use MSI controller framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Acked-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/include/asm/pci-bridge.h | 8 ++++++++
arch/powerpc/kernel/msi.c | 19 +++++++++++++++++--
arch/powerpc/kernel/pci-common.c | 3 +++
3 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 4ca90a3..f7d09d0 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -32,6 +32,10 @@ struct pci_controller {
int self_busno;
struct resource busn;
+#ifdef CONFIG_PCI_MSI
+ struct msi_controller *msi_ctrl;
+#endif
+
void __iomem *io_base_virt;
#ifdef CONFIG_PPC64
void *io_base_alloc;
@@ -94,6 +98,10 @@ struct pci_controller {
void *private_data;
};
+#ifdef CONFIG_PCI_MSI
+extern struct msi_controller ppc_msi_ctrl;
+#endif
+
/* These are used for config access before all the PCI probing
has been done. */
extern int early_read_config_byte(struct pci_controller *hose, int bus,
diff --git a/arch/powerpc/kernel/msi.c b/arch/powerpc/kernel/msi.c
index 71bd161..64a16f3 100644
--- a/arch/powerpc/kernel/msi.c
+++ b/arch/powerpc/kernel/msi.c
@@ -13,7 +13,15 @@
#include <asm/machdep.h>
-int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+struct msi_controller *pcibios_msi_controller(struct pci_bus *bus)
+{
+ struct pci_controller *hose = bus->sysdata;
+
+ return hose->msi_ctrl;
+}
+
+static int ppc_setup_msi_irqs(struct msi_controller *ctrl,
+ struct pci_dev *dev, int nvec, int type)
{
if (!ppc_md.setup_msi_irqs || !ppc_md.teardown_msi_irqs) {
pr_debug("msi: Platform doesn't provide MSI callbacks.\n");
@@ -27,7 +35,13 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
return ppc_md.setup_msi_irqs(dev, nvec, type);
}
-void arch_teardown_msi_irqs(struct pci_dev *dev)
+static void ppc_teardown_msi_irqs(struct msi_controller *ctrl,
+ struct pci_dev *dev)
{
ppc_md.teardown_msi_irqs(dev);
}
+
+struct msi_controller ppc_msi_ctrl = {
+ .setup_irqs = ppc_setup_msi_irqs,
+ .teardown_irqs = ppc_teardown_msi_irqs,
+};
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index e5dad9a..c3f28c5 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1597,6 +1597,9 @@ void pcibios_scan_phb(struct pci_controller *hose)
/* Wire up PHB bus resources */
pcibios_setup_phb_resources(hose, &resources);
+#ifdef CONFIG_PCI_MSI
+ hose->msi_ctrl = &ppc_msi_ctrl;
+#endif
hose->busn.start = hose->first_busno;
hose->busn.end = hose->last_busno;
hose->busn.flags = IORESOURCE_BUS;
--
1.7.1
^ permalink raw reply related
* [PATCH 09/16] MIPS/Xlr/MSI: Use MSI controller framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-27 13:22 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Xinwei Hu, Yijing Wang,
Thierry Reding, sparclinux, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel,
Konrad Rzeszutek Wilk, Chris Metcalf, Thomas Gleixner,
linux-arm-kernel, Thomas Petazzoni, Tony Luck, Sergei Shtylyov,
linux-kernel, Ralf Baechle, iommu, David Vrabel, Wuyun,
linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1414416142-31239-1-git-send-email-wangyijing@huawei.com>
Use MSI controller framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
arch/mips/pci/pci-xlr.c | 17 +++++++++++++++--
1 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/arch/mips/pci/pci-xlr.c b/arch/mips/pci/pci-xlr.c
index 0dde803..1e43c70 100644
--- a/arch/mips/pci/pci-xlr.c
+++ b/arch/mips/pci/pci-xlr.c
@@ -149,6 +149,8 @@ static struct resource nlm_pci_io_resource = {
.flags = IORESOURCE_IO,
};
+static struct msi_controller xlr_msi_ctrl;
+
struct pci_controller nlm_pci_controller = {
.index = 0,
.pci_ops = &nlm_pci_ops,
@@ -156,6 +158,9 @@ struct pci_controller nlm_pci_controller = {
.mem_offset = 0x00000000UL,
.io_resource = &nlm_pci_io_resource,
.io_offset = 0x00000000UL,
+#ifdef CONFIG_PCI_MSI
+ .msi_ctrl = &xlr_msi_ctrl,
+#endif
};
/*
@@ -214,11 +219,13 @@ static int get_irq_vector(const struct pci_dev *dev)
}
#ifdef CONFIG_PCI_MSI
-void arch_teardown_msi_irq(unsigned int irq)
+static void xlr_teardown_msi_irq(struct msi_controller *ctrl,
+ unsigned int irq)
{
}
-int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
+static int xlr_setup_msi_irq(struct msi_controller *ctrl,
+ struct pci_dev *dev, struct msi_desc *desc)
{
struct msi_msg msg;
struct pci_dev *lnk;
@@ -263,6 +270,12 @@ int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
write_msi_msg(irq, &msg);
return 0;
}
+
+static struct msi_controller xlr_msi_ctrl = {
+ .setup_irq = xlr_setup_msi_irq,
+ .teardown_irq = xlr_teardown_msi_irq,
+};
+
#endif
/* Extra ACK needed for XLR on chip PCI controller */
--
1.7.1
^ permalink raw reply related
* [PATCH 00/16] Use MSI controller framework to configure MSI/MSI-X
From: Yijing Wang @ 2014-10-27 13:22 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Xinwei Hu, Yijing Wang,
Thierry Reding, sparclinux, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel,
Konrad Rzeszutek Wilk, Chris Metcalf, Thomas Gleixner,
linux-arm-kernel, Thomas Petazzoni, Tony Luck, Sergei Shtylyov,
linux-kernel, Ralf Baechle, iommu, David Vrabel, Wuyun,
linuxppc-dev, David S. Miller, Lucas Stach
This series is based on "[PATCH 00/10] Save MSI chip in pci_sys_data",
https://lkml.org/lkml/2014/10/27/85.
This series is the v4 of "Use MSI chip framework to configure MSI/MSI-X in all platforms".
I split it out and post it together.
v3->new:
Some trivial changes in "IA64/MSI: Use MSI controller framework to configure MSI/MSI-X irq".
Old history:
v2->v3:
1. For patch "x86/xen/MSI: Eliminate...", introduce a new global flag "pci_msi_ignore_mask"
to control the msi mask instead of replacing the irqchip->mask with nop function,
the latter method has problem pointed out by Konrad Rzeszutek Wilk.
2. Save msi chip in arch pci sysdata instead of associating msi chip to pci bus.
Because pci devices under same host share the same msi chip, so I think associate
msi chip to pci host/pci sysdata is better than to bother every pci bus/devices.
A better solution suggested by Liviu is to rip out pci_host_bridge from pci_create_root_bus(),
then we can save some pci host common attributes like domain_nr, msi_chip, resources,
into the generic pci_host_bridge. Because this changes to pci host bridge is also
a large series, so I think we should go step by step, I will try to post it in another
series later.
4. Clean up arm pcibios_add_bus() and pcibios_remove_bus() which were used to associate
msi chip to pci bus.
v1->v2:
Add a patch to make s390 MSI code build happy between patch "x86/xen/MSI: E.."
and "s390/MSI: Use MSI..". Fix several typo problems found by Lucas.
RFC->v1:
Updated "[patch 4/21] x86/xen/MSI: Eliminate...", export msi_chip instead
of #ifdef to fix MSI bug in xen running in x86.
Rename arch_get_match_msi_chip() to arch_find_msi_chip().
Drop use struct device as the msi_chip argument, we will do that
later in another patchset.
Yijing Wang (16):
PCI/MSI: Refactor MSI controller to make it become more common
x86/MSI: Use MSI controller framework to configure MSI/MSI-X irq
x86/xen/MSI: Use MSI controller framework to configure MSI/MSI-X irq
Irq_remapping/MSI: Use MSI controller framework to configure
MSI/MSI-X irq
x86/MSI: Remove unused MSI weak arch functions
Mips/MSI: Save MSI controller in pci sysdata
MIPS/Octeon/MSI: Use MSI controller framework to configure MSI/MSI-X
irq
MIPS/Xlp/MSI: Use MSI controller framework to configure MSI/MSI-X irq
MIPS/Xlr/MSI: Use MSI controller framework to configure MSI/MSI-X irq
Powerpc/MSI: Use MSI controller framework to configure MSI/MSI-X irq
s390/MSI: Use MSI controller framework to configure MSI/MSI-X irq
arm/iop13xx/MSI: Use MSI controller framework to configure MSI/MSI-X
irq
IA64/MSI: Use MSI controller framework to configure MSI/MSI-X irq
Sparc/MSI: Use MSI controller framework to configure MSI/MSI-X irq
tile/MSI: Use MSI controller framework to configure MSI/MSI-X irq
PCI/MSI: Clean up unused MSI arch functions
arch/arm/mach-iop13xx/include/mach/pci.h | 4 +
arch/arm/mach-iop13xx/iq81340mc.c | 3 +
arch/arm/mach-iop13xx/iq81340sc.c | 5 +-
arch/arm/mach-iop13xx/msi.c | 11 ++-
arch/ia64/include/asm/pci.h | 3 +-
arch/ia64/kernel/msi_ia64.c | 24 ++++--
arch/ia64/pci/pci.c | 1 +
arch/mips/include/asm/netlogic/xlp-hal/pcibus.h | 1 +
arch/mips/include/asm/octeon/pci-octeon.h | 4 +
arch/mips/include/asm/pci.h | 3 +
arch/mips/pci/msi-octeon.c | 31 ++++---
arch/mips/pci/msi-xlp.c | 11 ++-
arch/mips/pci/pci-octeon.c | 3 +
arch/mips/pci/pci-xlp.c | 3 +
arch/mips/pci/pci-xlr.c | 17 ++++-
arch/mips/pci/pci.c | 9 ++
arch/powerpc/include/asm/pci-bridge.h | 8 ++
arch/powerpc/kernel/msi.c | 19 ++++-
arch/powerpc/kernel/pci-common.c | 3 +
arch/s390/include/asm/pci.h | 1 +
arch/s390/pci/pci.c | 19 ++++-
arch/sparc/kernel/pci.c | 20 ++++-
arch/sparc/kernel/pci_impl.h | 3 +
arch/tile/include/asm/pci.h | 2 +
arch/tile/kernel/pci_gx.c | 18 ++++-
arch/x86/include/asm/pci.h | 9 +-
arch/x86/include/asm/x86_init.h | 4 -
arch/x86/kernel/apic/io_apic.c | 18 ++++-
arch/x86/kernel/x86_init.c | 24 ------
arch/x86/pci/acpi.c | 1 +
arch/x86/pci/common.c | 3 +
arch/x86/pci/xen.c | 45 ++++++----
drivers/iommu/irq_remapping.c | 11 ++-
drivers/pci/msi.c | 97 ++++++++++------------
include/linux/msi.h | 19 ++---
35 files changed, 301 insertions(+), 156 deletions(-)
^ permalink raw reply
* [PATCH 06/16] Mips/MSI: Save MSI controller in pci sysdata
From: Yijing Wang @ 2014-10-27 13:22 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Xinwei Hu, Yijing Wang,
Thierry Reding, sparclinux, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel,
Konrad Rzeszutek Wilk, Chris Metcalf, Thomas Gleixner,
linux-arm-kernel, Thomas Petazzoni, Tony Luck, Sergei Shtylyov,
linux-kernel, Ralf Baechle, iommu, David Vrabel, Wuyun,
linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1414416142-31239-1-git-send-email-wangyijing@huawei.com>
Save MSI controller in pci sysdata, add arch pcibios_msi_controller()
to extract out MSI controller.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
arch/mips/include/asm/pci.h | 3 +++
arch/mips/pci/pci.c | 9 +++++++++
2 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index 974b0e3..d7cd850 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -43,6 +43,9 @@ struct pci_controller {
int iommu;
+#ifdef CONFIG_PCI_MSI
+ struct msi_controller *msi_ctrl;
+#endif
/* Optional access methods for reading/writing the bus number
of the PCI controller */
int (*get_busno)(void);
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 1bf60b1..7917cba 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -36,6 +36,15 @@ unsigned long PCIBIOS_MIN_MEM;
static int pci_initialized;
+#ifdef CONFIG_PCI_MSI
+struct msi_controller *pcibios_msi_controller(struct pci_bus *bus)
+{
+ struct pci_controller *ctrl = bus->sysdata;
+
+ return ctrl->msi_ctrl;
+}
+#endif
+
/*
* We need to avoid collisions with `mirrored' VGA ports
* and other strange ISA hardware, so we always want the
--
1.7.1
^ permalink raw reply related
* [PATCH 04/16] Irq_remapping/MSI: Use MSI controller framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-27 13:22 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Xinwei Hu, Yijing Wang,
Thierry Reding, sparclinux, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel,
Konrad Rzeszutek Wilk, Chris Metcalf, Thomas Gleixner,
linux-arm-kernel, Thomas Petazzoni, Tony Luck, Sergei Shtylyov,
linux-kernel, Ralf Baechle, iommu, David Vrabel, Wuyun,
linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1414416142-31239-1-git-send-email-wangyijing@huawei.com>
Use MSI controller framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
drivers/iommu/irq_remapping.c | 11 ++++++++---
1 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c
index 74a1767..6db1459 100644
--- a/drivers/iommu/irq_remapping.c
+++ b/drivers/iommu/irq_remapping.c
@@ -140,8 +140,8 @@ error:
return ret;
}
-static int irq_remapping_setup_msi_irqs(struct pci_dev *dev,
- int nvec, int type)
+static int irq_remapping_setup_msi_irqs(struct msi_controller *ctrl,
+ struct pci_dev *dev, int nvec, int type)
{
if (type == PCI_CAP_ID_MSI)
return do_setup_msi_irqs(dev, nvec);
@@ -149,6 +149,11 @@ static int irq_remapping_setup_msi_irqs(struct pci_dev *dev,
return do_setup_msix_irqs(dev, nvec);
}
+static struct msi_controller remap_msi_ctrl = {
+ .setup_irqs = irq_remapping_setup_msi_irqs,
+ .teardown_irq = native_teardown_msi_irq,
+};
+
static void eoi_ioapic_pin_remapped(int apic, int pin, int vector)
{
/*
@@ -166,9 +171,9 @@ static void __init irq_remapping_modify_x86_ops(void)
x86_io_apic_ops.set_affinity = set_remapped_irq_affinity;
x86_io_apic_ops.setup_entry = setup_ioapic_remapped_entry;
x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped;
- x86_msi.setup_msi_irqs = irq_remapping_setup_msi_irqs;
x86_msi.setup_hpet_msi = setup_hpet_msi_remapped;
x86_msi.compose_msi_msg = compose_remapped_msi_msg;
+ x86_msi_ctrl = &remap_msi_ctrl;
}
static __init int setup_nointremap(char *str)
--
1.7.1
^ permalink raw reply related
* [PATCH 05/16] x86/MSI: Remove unused MSI weak arch functions
From: Yijing Wang @ 2014-10-27 13:22 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Xinwei Hu, Yijing Wang,
Thierry Reding, sparclinux, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel,
Konrad Rzeszutek Wilk, Chris Metcalf, Thomas Gleixner,
linux-arm-kernel, Thomas Petazzoni, Tony Luck, Sergei Shtylyov,
linux-kernel, Ralf Baechle, iommu, David Vrabel, Wuyun,
linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1414416142-31239-1-git-send-email-wangyijing@huawei.com>
Now we can clean up MSI weak arch functions in x86.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
arch/x86/include/asm/pci.h | 5 +----
arch/x86/include/asm/x86_init.h | 4 ----
arch/x86/kernel/apic/io_apic.c | 21 +++++----------------
arch/x86/kernel/x86_init.c | 24 ------------------------
4 files changed, 6 insertions(+), 48 deletions(-)
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index 1af3d77..21fe24f 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -99,14 +99,11 @@ extern void pci_iommu_alloc(void);
#ifdef CONFIG_PCI_MSI
/* implemented in arch/x86/kernel/apic/io_apic. */
struct msi_desc;
-int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
-void native_teardown_msi_irq(unsigned int irq);
-void native_restore_msi_irqs(struct pci_dev *dev);
+void native_teardown_msi_irq(struct msi_controller *ctrl, unsigned int irq);
int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc,
unsigned int irq_base, unsigned int irq_offset);
extern struct msi_controller *x86_msi_ctrl;
#else
-#define native_setup_msi_irqs NULL
#define native_teardown_msi_irq NULL
#endif
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index f58a9c7..2514f67 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -174,13 +174,9 @@ struct pci_dev;
struct msi_msg;
struct x86_msi_ops {
- int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
void (*compose_msi_msg)(struct pci_dev *dev, unsigned int irq,
unsigned int dest, struct msi_msg *msg,
u8 hpet_id);
- void (*teardown_msi_irq)(unsigned int irq);
- void (*teardown_msi_irqs)(struct pci_dev *dev);
- void (*restore_msi_irqs)(struct pci_dev *dev);
int (*setup_hpet_msi)(unsigned int irq, unsigned int id);
};
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 8b8c671..04bf011 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -3207,7 +3207,8 @@ int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc,
return 0;
}
-int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+static int native_setup_msi_irqs(struct msi_controller *ctrl,
+ struct pci_dev *dev, int nvec, int type)
{
struct msi_desc *msidesc;
unsigned int irq;
@@ -3234,26 +3235,14 @@ int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
return 0;
}
-static int __native_setup_msi_irqs(struct msi_controller *ctrl,
- struct pci_dev *dev, int nvec, int type)
-{
- return native_setup_msi_irqs(dev, nvec, type);
-}
-
-void native_teardown_msi_irq(unsigned int irq)
+void native_teardown_msi_irq(struct msi_controller *ctrl, unsigned int irq)
{
irq_free_hwirq(irq);
}
-static void __native_teardown_msi_irq(struct msi_controller *ctrl,
- unsigned int irq)
-{
- native_teardown_msi_irq(irq);
-}
-
static struct msi_controller native_msi_ctrl = {
- .setup_irqs = __native_setup_msi_irqs,
- .teardown_irq = __native_teardown_msi_irq,
+ .setup_irqs = native_setup_msi_irqs,
+ .teardown_irq = native_teardown_msi_irq,
};
struct msi_controller *pcibios_msi_controller(struct pci_bus *bus)
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index 234b072..cc32568 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -110,34 +110,10 @@ EXPORT_SYMBOL_GPL(x86_platform);
#if defined(CONFIG_PCI_MSI)
struct x86_msi_ops x86_msi = {
- .setup_msi_irqs = native_setup_msi_irqs,
.compose_msi_msg = native_compose_msi_msg,
- .teardown_msi_irq = native_teardown_msi_irq,
- .teardown_msi_irqs = default_teardown_msi_irqs,
- .restore_msi_irqs = default_restore_msi_irqs,
.setup_hpet_msi = default_setup_hpet_msi,
};
-/* MSI arch specific hooks */
-int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
-{
- return x86_msi.setup_msi_irqs(dev, nvec, type);
-}
-
-void arch_teardown_msi_irqs(struct pci_dev *dev)
-{
- x86_msi.teardown_msi_irqs(dev);
-}
-
-void arch_teardown_msi_irq(unsigned int irq)
-{
- x86_msi.teardown_msi_irq(irq);
-}
-
-void arch_restore_msi_irqs(struct pci_dev *dev)
-{
- x86_msi.restore_msi_irqs(dev);
-}
#endif
struct x86_io_apic_ops x86_io_apic_ops = {
--
1.7.1
^ permalink raw reply related
* [PATCH 08/16] MIPS/Xlp/MSI: Use MSI controller framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-27 13:22 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Xinwei Hu, Yijing Wang,
Thierry Reding, sparclinux, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel,
Konrad Rzeszutek Wilk, Chris Metcalf, Thomas Gleixner,
linux-arm-kernel, Thomas Petazzoni, Tony Luck, Sergei Shtylyov,
linux-kernel, Ralf Baechle, iommu, David Vrabel, Wuyun,
linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1414416142-31239-1-git-send-email-wangyijing@huawei.com>
Use MSI controller framework instead of arch MSI functions to configure
MSI/MSI-X IRQ. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
arch/mips/include/asm/netlogic/xlp-hal/pcibus.h | 1 +
arch/mips/pci/msi-xlp.c | 11 +++++++++--
arch/mips/pci/pci-xlp.c | 3 +++
3 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/asm/netlogic/xlp-hal/pcibus.h b/arch/mips/include/asm/netlogic/xlp-hal/pcibus.h
index 91540f4..8e6869a 100644
--- a/arch/mips/include/asm/netlogic/xlp-hal/pcibus.h
+++ b/arch/mips/include/asm/netlogic/xlp-hal/pcibus.h
@@ -103,6 +103,7 @@
#ifdef CONFIG_PCI_MSI
void xlp_init_node_msi_irqs(int node, int link);
+extern struct msi_controller xlp_msi_ctrl;
#else
static inline void xlp_init_node_msi_irqs(int node, int link) {}
#endif
diff --git a/arch/mips/pci/msi-xlp.c b/arch/mips/pci/msi-xlp.c
index fa374fe..d18a162 100644
--- a/arch/mips/pci/msi-xlp.c
+++ b/arch/mips/pci/msi-xlp.c
@@ -245,7 +245,8 @@ static struct irq_chip xlp_msix_chip = {
.irq_unmask = unmask_msi_irq,
};
-void arch_teardown_msi_irq(unsigned int irq)
+static void xlp_teardown_msi_irq(struct msi_controller *ctrl,
+ unsigned int irq)
{
}
@@ -452,7 +453,8 @@ static int xlp_setup_msix(uint64_t lnkbase, int node, int link,
return 0;
}
-int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
+static int xlp_setup_msi_irq(struct msi_controller *ctrl,
+ struct pci_dev *dev, struct msi_desc *desc)
{
struct pci_dev *lnkdev;
uint64_t lnkbase;
@@ -474,6 +476,11 @@ int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
return xlp_setup_msi(lnkbase, node, link, desc);
}
+struct msi_controller xlp_msi_ctrl = {
+ .setup_irq = xlp_setup_msi_irq,
+ .teardown_irq = xlp_teardown_msi_irq,
+};
+
void __init xlp_init_node_msi_irqs(int node, int link)
{
struct nlm_soc_info *nodep;
diff --git a/arch/mips/pci/pci-xlp.c b/arch/mips/pci/pci-xlp.c
index 7babf01..ab80417 100644
--- a/arch/mips/pci/pci-xlp.c
+++ b/arch/mips/pci/pci-xlp.c
@@ -174,6 +174,9 @@ struct pci_controller nlm_pci_controller = {
.mem_offset = 0x00000000UL,
.io_resource = &nlm_pci_io_resource,
.io_offset = 0x00000000UL,
+#ifdef CONFIG_PCI_MSI
+ .msi_ctrl = &xlp_msi_ctrl,
+#endif
};
struct pci_dev *xlp_get_pcie_link(const struct pci_dev *dev)
--
1.7.1
^ permalink raw reply related
* [PATCH 14/16] Sparc/MSI: Use MSI controller framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-27 13:22 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Xinwei Hu, Yijing Wang,
Thierry Reding, sparclinux, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel,
Konrad Rzeszutek Wilk, Chris Metcalf, Thomas Gleixner,
linux-arm-kernel, Thomas Petazzoni, Tony Luck, Sergei Shtylyov,
linux-kernel, Ralf Baechle, iommu, David Vrabel, Wuyun,
linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1414416142-31239-1-git-send-email-wangyijing@huawei.com>
Use MSI controller framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Acked-by: David S. Miller <davem@davemloft.net>
---
arch/sparc/kernel/pci.c | 20 ++++++++++++++++++--
arch/sparc/kernel/pci_impl.h | 3 +++
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c
index b36365f..c691a10 100644
--- a/arch/sparc/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
@@ -656,6 +656,9 @@ struct pci_bus *pci_scan_one_pbm(struct pci_pbm_info *pbm,
printk("PCI: Scanning PBM %s\n", node->full_name);
+#ifdef CONFIG_PCI_MSI
+ pbm->msi_ctrl = &sparc_msi_ctrl;
+#endif
pci_add_resource_offset(&resources, &pbm->io_space,
pbm->io_space.start);
pci_add_resource_offset(&resources, &pbm->mem_space,
@@ -905,7 +908,15 @@ int pci_domain_nr(struct pci_bus *pbus)
EXPORT_SYMBOL(pci_domain_nr);
#ifdef CONFIG_PCI_MSI
-int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
+struct msi_controller *pcibios_msi_controller(struct pci_bus *bus)
+{
+ struct pci_pbm_info *pbm = bus->sysdata;
+
+ return pbm->msi_ctrl;
+}
+
+static int sparc_setup_msi_irq(struct msi_controller *ctrl,
+ struct pci_dev *pdev, struct msi_desc *desc)
{
struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
unsigned int irq;
@@ -916,7 +927,7 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
return pbm->setup_msi_irq(&irq, pdev, desc);
}
-void arch_teardown_msi_irq(unsigned int irq)
+static void sparc_teardown_msi_irq(struct msi_controller *ctrl, unsigned int irq)
{
struct msi_desc *entry = irq_get_msi_desc(irq);
struct pci_dev *pdev = entry->dev;
@@ -925,6 +936,11 @@ void arch_teardown_msi_irq(unsigned int irq)
if (pbm->teardown_msi_irq)
pbm->teardown_msi_irq(irq, pdev);
}
+
+struct msi_controller sparc_msi_ctrl = {
+ .setup_irq = sparc_setup_msi_irq,
+ .teardown_irq = sparc_teardown_msi_irq,
+};
#endif /* !(CONFIG_PCI_MSI) */
static void ali_sound_dma_hack(struct pci_dev *pdev, int set_bit)
diff --git a/arch/sparc/kernel/pci_impl.h b/arch/sparc/kernel/pci_impl.h
index 75803c7..e02642d 100644
--- a/arch/sparc/kernel/pci_impl.h
+++ b/arch/sparc/kernel/pci_impl.h
@@ -55,6 +55,8 @@ struct sparc64_msiq_cookie {
struct pci_pbm_info *pbm;
unsigned long msiqid;
};
+
+extern struct msi_controller sparc_msi_ctrl;
#endif
struct pci_pbm_info {
@@ -132,6 +134,7 @@ struct pci_pbm_info {
void *msi_queues;
unsigned long *msi_bitmap;
unsigned int *msi_irq_table;
+ struct msi_controller *msi_ctrl;
int (*setup_msi_irq)(unsigned int *irq_p, struct pci_dev *pdev,
struct msi_desc *entry);
void (*teardown_msi_irq)(unsigned int irq, struct pci_dev *pdev);
--
1.7.1
^ permalink raw reply related
* [PATCH 15/16] tile/MSI: Use MSI controller framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-27 13:22 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Xinwei Hu, Yijing Wang,
Thierry Reding, sparclinux, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel,
Konrad Rzeszutek Wilk, Chris Metcalf, Thomas Gleixner,
linux-arm-kernel, Thomas Petazzoni, Tony Luck, Sergei Shtylyov,
linux-kernel, Ralf Baechle, iommu, David Vrabel, Wuyun,
linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1414416142-31239-1-git-send-email-wangyijing@huawei.com>
Use MSI controller framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
arch/tile/include/asm/pci.h | 2 ++
arch/tile/kernel/pci_gx.c | 18 ++++++++++++++++--
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/arch/tile/include/asm/pci.h b/arch/tile/include/asm/pci.h
index dfedd7a..3ebd66b 100644
--- a/arch/tile/include/asm/pci.h
+++ b/arch/tile/include/asm/pci.h
@@ -152,6 +152,7 @@ struct pci_controller {
int pio_io_index; /* PIO region index for I/O space access */
#endif
+ struct msi_controller *msi_ctrl;
/*
* Mem-Map regions for all the memory controllers so that Linux can
* map all of its physical memory space to the PCI bus.
@@ -179,6 +180,7 @@ struct pci_controller {
int irq_intx_table[4];
};
+extern struct msi_controller tilegx_msi_ctrl;
extern struct pci_controller pci_controllers[TILEGX_NUM_TRIO * TILEGX_TRIO_PCIES];
extern gxio_trio_context_t trio_contexts[TILEGX_NUM_TRIO];
extern int num_trio_shims;
diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c
index e39f9c5..6bf5a24 100644
--- a/arch/tile/kernel/pci_gx.c
+++ b/arch/tile/kernel/pci_gx.c
@@ -887,6 +887,7 @@ int __init pcibios_init(void)
controller->mem_offset);
pci_add_resource(&resources, &controller->io_space);
controller->first_busno = next_busno;
+ controller->msi_ctrl = &tilegx_msi_ctrl;
bus = pci_scan_root_bus(NULL, next_busno, controller->ops,
controller, &resources);
controller->root_bus = bus;
@@ -1485,7 +1486,15 @@ static struct irq_chip tilegx_msi_chip = {
/* TBD: support set_affinity. */
};
-int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
+struct msi_controller *pcibios_msi_controller(struct pci_bus *bus)
+{
+ struct pci_controller *controller = bus->sysdata;
+
+ return controller->msi_ctrl;
+}
+
+static int tile_setup_msi_irq(struct msi_controller *ctrl,
+ struct pci_dev *pdev, struct msi_desc *desc)
{
struct pci_controller *controller;
gxio_trio_context_t *trio_context;
@@ -1604,7 +1613,12 @@ is_64_failure:
return ret;
}
-void arch_teardown_msi_irq(unsigned int irq)
+static void tile_teardown_msi_irq(struct msi_controller *ctrl, unsigned int irq)
{
irq_free_hwirq(irq);
}
+
+struct msi_controller tilegx_msi_ctrl = {
+ .setup_irq = tile_setup_msi_irq,
+ .teardown_irq = tile_teardown_msi_irq,
+};
--
1.7.1
^ permalink raw reply related
* [PATCH 16/16] PCI/MSI: Clean up unused MSI arch functions
From: Yijing Wang @ 2014-10-27 13:22 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Xinwei Hu, Yijing Wang,
Thierry Reding, sparclinux, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel,
Konrad Rzeszutek Wilk, Chris Metcalf, Thomas Gleixner,
linux-arm-kernel, Thomas Petazzoni, Tony Luck, Sergei Shtylyov,
linux-kernel, Ralf Baechle, iommu, David Vrabel, Wuyun,
linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1414416142-31239-1-git-send-email-wangyijing@huawei.com>
Now we use MSI controller in all platforms to configure
MSI/MSI-X. We can clean up the unused arch functions.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
drivers/pci/msi.c | 90 ++++++++++++++++++--------------------------------
include/linux/msi.h | 11 ------
2 files changed, 33 insertions(+), 68 deletions(-)
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 0e1da3e..cdb4634 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -27,7 +27,6 @@ int pci_msi_ignore_mask;
#define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
-
/* Arch hooks */
struct msi_controller * __weak pcibios_msi_controller(struct pci_bus *bus)
@@ -35,56 +34,31 @@ struct msi_controller * __weak pcibios_msi_controller(struct pci_bus *bus)
return NULL;
}
-struct msi_controller *pci_msi_controller(struct pci_bus *bus)
-{
- return pcibios_msi_controller(bus);
-}
-
-int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
-{
- struct msi_controller *ctrl = pci_msi_controller(dev->bus);
- int err;
-
- if (!ctrl || !ctrl->setup_irq)
- return -EINVAL;
-
- err = ctrl->setup_irq(ctrl, dev, desc);
- if (err < 0)
- return err;
-
- return 0;
-}
-
-void __weak arch_teardown_msi_irq(unsigned int irq)
-{
- struct msi_desc *entry = irq_get_msi_desc(irq);
- struct msi_controller *ctrl = pci_msi_controller(entry->dev->bus);
-
- if (!ctrl || !ctrl->teardown_irq)
- return;
-
- ctrl->teardown_irq(ctrl, irq);
-}
-
-int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+int setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
{
struct msi_desc *entry;
int ret;
struct msi_controller *ctrl;
- ctrl = pci_msi_controller(dev->bus);
- if (ctrl && ctrl->setup_irqs)
+ ctrl = pcibios_msi_controller(dev->bus);
+ if (!ctrl)
+ return -EINVAL;
+
+ if (ctrl->setup_irqs)
return ctrl->setup_irqs(ctrl, dev, nvec, type);
/*
* If an architecture wants to support multiple MSI, it needs to
- * override arch_setup_msi_irqs()
+ * implement ctrl->setup_irqs().
*/
if (type == PCI_CAP_ID_MSI && nvec > 1)
return 1;
+ if (!ctrl->setup_irq)
+ return -EINVAL;
+
list_for_each_entry(entry, &dev->msi_list, list) {
- ret = arch_setup_msi_irq(dev, entry);
+ ret = ctrl->setup_irq(ctrl, dev, entry);
if (ret < 0)
return ret;
if (ret > 0)
@@ -101,6 +75,10 @@ int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
void default_teardown_msi_irqs(struct pci_dev *dev)
{
struct msi_desc *entry;
+ struct msi_controller *ctrl = pcibios_msi_controller(dev->bus);
+
+ if (!ctrl->teardown_irq)
+ return;
list_for_each_entry(entry, &dev->msi_list, list) {
int i, nvec;
@@ -111,18 +89,18 @@ void default_teardown_msi_irqs(struct pci_dev *dev)
else
nvec = 1 << entry->msi_attrib.multiple;
for (i = 0; i < nvec; i++)
- arch_teardown_msi_irq(entry->irq + i);
+ ctrl->teardown_irq(ctrl, entry->irq + i);
}
}
-void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
+static void teardown_msi_irqs(struct pci_dev *dev)
{
- struct msi_controller *ctrl = pci_msi_controller(dev->bus);
+ struct msi_controller *ctrl = pcibios_msi_controller(dev->bus);
if (ctrl && ctrl->teardown_irqs)
return ctrl->teardown_irqs(ctrl, dev);
- return default_teardown_msi_irqs(dev);
+ default_teardown_msi_irqs(dev);
}
static void default_restore_msi_irq(struct pci_dev *dev, int irq)
@@ -143,10 +121,17 @@ static void default_restore_msi_irq(struct pci_dev *dev, int irq)
__write_msi_msg(entry, &entry->msg);
}
-void __weak arch_restore_msi_irqs(struct pci_dev *dev)
+void default_restore_msi_irqs(struct pci_dev *dev)
{
- struct msi_controller *ctrl = pci_msi_controller(dev->bus);
+ struct msi_desc *entry;
+ list_for_each_entry(entry, &dev->msi_list, list)
+ default_restore_msi_irq(dev, entry->irq);
+}
+
+static void restore_msi_irqs(struct pci_dev *dev)
+{
+ struct msi_controller *ctrl = pcibios_msi_controller(dev->bus);
if (ctrl && ctrl->restore_irqs)
return ctrl->restore_irqs(ctrl, dev);
@@ -259,15 +244,6 @@ void unmask_msi_irq(struct irq_data *data)
msi_set_mask_bit(data, 0);
}
-void default_restore_msi_irqs(struct pci_dev *dev)
-{
- struct msi_desc *entry;
-
- list_for_each_entry(entry, &dev->msi_list, list) {
- default_restore_msi_irq(dev, entry->irq);
- }
-}
-
void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
{
BUG_ON(entry->dev->current_state != PCI_D0);
@@ -387,7 +363,7 @@ static void free_msi_irqs(struct pci_dev *dev)
BUG_ON(irq_has_action(entry->irq + i));
}
- arch_teardown_msi_irqs(dev);
+ teardown_msi_irqs(dev);
list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) {
if (entry->msi_attrib.is_msix) {
@@ -446,7 +422,7 @@ static void __pci_restore_msi_state(struct pci_dev *dev)
pci_intx_for_msi(dev, 0);
msi_set_enable(dev, 0);
- arch_restore_msi_irqs(dev);
+ restore_msi_irqs(dev);
pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
msi_mask_irq(entry, msi_mask(entry->msi_attrib.multi_cap),
@@ -469,7 +445,7 @@ static void __pci_restore_msix_state(struct pci_dev *dev)
msix_clear_and_set_ctrl(dev, 0,
PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL);
- arch_restore_msi_irqs(dev);
+ restore_msi_irqs(dev);
list_for_each_entry(entry, &dev->msi_list, list) {
msix_mask_irq(entry, entry->masked);
}
@@ -639,7 +615,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec)
list_add_tail(&entry->list, &dev->msi_list);
/* Configure MSI capability structure */
- ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
+ ret = setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
if (ret) {
msi_mask_irq(entry, mask, ~mask);
free_msi_irqs(dev);
@@ -754,7 +730,7 @@ static int msix_capability_init(struct pci_dev *dev,
if (ret)
return ret;
- ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
+ ret = setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
if (ret)
goto out_avail;
diff --git a/include/linux/msi.h b/include/linux/msi.h
index 4426cb4..e4eb137 100644
--- a/include/linux/msi.h
+++ b/include/linux/msi.h
@@ -51,19 +51,8 @@ struct msi_desc {
struct msi_msg msg;
};
-/*
- * The arch hooks to setup up msi irqs. Those functions are
- * implemented as weak symbols so that they /can/ be overriden by
- * architecture specific code if needed.
- */
-int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
-void arch_teardown_msi_irq(unsigned int irq);
-int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
-void arch_teardown_msi_irqs(struct pci_dev *dev);
-void arch_restore_msi_irqs(struct pci_dev *dev);
void default_teardown_msi_irqs(struct pci_dev *dev);
-void default_restore_msi_irqs(struct pci_dev *dev);
struct msi_controller {
struct module *owner;
--
1.7.1
^ permalink raw reply related
* [PATCH 12/16] arm/iop13xx/MSI: Use MSI controller framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-27 13:22 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Xinwei Hu, Yijing Wang,
Thierry Reding, sparclinux, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel,
Konrad Rzeszutek Wilk, Chris Metcalf, Thomas Gleixner,
linux-arm-kernel, Thomas Petazzoni, Tony Luck, Sergei Shtylyov,
linux-kernel, Ralf Baechle, iommu, David Vrabel, Wuyun,
linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1414416142-31239-1-git-send-email-wangyijing@huawei.com>
Use MSI controller framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
arch/arm/mach-iop13xx/include/mach/pci.h | 4 ++++
arch/arm/mach-iop13xx/iq81340mc.c | 3 +++
arch/arm/mach-iop13xx/iq81340sc.c | 5 ++++-
arch/arm/mach-iop13xx/msi.c | 11 +++++++++--
4 files changed, 20 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-iop13xx/include/mach/pci.h b/arch/arm/mach-iop13xx/include/mach/pci.h
index 59f42b5..c8f5caf 100644
--- a/arch/arm/mach-iop13xx/include/mach/pci.h
+++ b/arch/arm/mach-iop13xx/include/mach/pci.h
@@ -11,6 +11,10 @@ void iop13xx_atu_select(struct hw_pci *plat_pci);
void iop13xx_pci_init(void);
void iop13xx_map_pci_memory(void);
+#ifdef CONFIG_PCI_MSI
+extern struct msi_controller iop13xx_msi_ctrl;
+#endif
+
#define IOP_PCI_STATUS_ERROR (PCI_STATUS_PARITY | \
PCI_STATUS_SIG_TARGET_ABORT | \
PCI_STATUS_REC_TARGET_ABORT | \
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index 9cd07d3..7b802f5 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -59,6 +59,9 @@ static struct hw_pci iq81340mc_pci __initdata = {
.map_irq = iq81340mc_pcix_map_irq,
.scan = iop13xx_scan_bus,
.preinit = iop13xx_pci_init,
+#ifdef CONFIG_PCI_MSI
+ .msi_ctrl = &iop13xx_msi_ctrl,
+#endif
};
static int __init iq81340mc_pci_init(void)
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index b3ec11c..934de2e 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -60,7 +60,10 @@ static struct hw_pci iq81340sc_pci __initdata = {
.setup = iop13xx_pci_setup,
.scan = iop13xx_scan_bus,
.map_irq = iq81340sc_atux_map_irq,
- .preinit = iop13xx_pci_init
+ .preinit = iop13xx_pci_init,
+#ifdef CONFIG_PCI_MSI
+ .msi_ctrl = &iop13xx_msi_ctrl,
+#endif
};
static int __init iq81340sc_pci_init(void)
diff --git a/arch/arm/mach-iop13xx/msi.c b/arch/arm/mach-iop13xx/msi.c
index e7730cf..07a512e 100644
--- a/arch/arm/mach-iop13xx/msi.c
+++ b/arch/arm/mach-iop13xx/msi.c
@@ -132,7 +132,8 @@ static struct irq_chip iop13xx_msi_chip = {
.irq_unmask = unmask_msi_irq,
};
-int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
+static int iop13xx_setup_msi_irq(struct msi_controller *ctrl,
+ struct pci_dev *dev, struct msi_desc *desc)
{
int id, irq = irq_alloc_desc_from(IRQ_IOP13XX_MSI_0, -1);
struct msi_msg msg;
@@ -159,7 +160,13 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
return 0;
}
-void arch_teardown_msi_irq(unsigned int irq)
+static void iop13xx_teardown_msi_irq(struct msi_controller *ctrl,
+ unsigned int irq)
{
irq_free_desc(irq);
}
+
+struct msi_controller iop13xx_msi_ctrl = {
+ .setup_irq = iop13xx_setup_msi_irq,
+ .teardown_irq = iop13xx_teardown_msi_irq,
+};
--
1.7.1
^ permalink raw reply related
* What is the reel purpose of in_beXX() and out_beXX() fonctions ?
From: leroy christophe @ 2014-10-27 12:52 UTC (permalink / raw)
To: LinuxPPC-dev, Scott Wood, Benjamin Herrenschmidt
Many drivers use in_be16(), in_be32(), out_be16(), out_be32(), etc ....
to access to registrers in IO mapped memory.
What is the real purpose of those functions, and are they really needed ?
ioremap() maps the related areas as GUARDED, which means that accesses
can't be speculative. So what is the benefit of using in_beXX() and
out_beXX() over simple memory accesses in the area ?
Christophe
^ permalink raw reply
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