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From: Thomas Zimmermann <tzimmermann@suse.de>
To: David Airlie <airlied@redhat.com>,
	Jacob Keller <jacob.e.keller@intel.com>
Cc: Jocelyn Falempe <jfalempe@redhat.com>,
	dri-devel@lists.freedesktop.org,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Pasi Vaananen <pvaanane@redhat.com>
Subject: Re: further issues with MGA G200 graphics chipset
Date: Fri, 24 Apr 2026 08:16:49 +0200	[thread overview]
Message-ID: <06487b20-5c80-47eb-bb03-4d32bbcbd17e@suse.de> (raw)
In-Reply-To: <CAMwc25o=3EHkJYG=qYrgtmmB9raqbsaif6hOKLi0awG-ydWZWQ@mail.gmail.com>

Hi

Am 23.04.26 um 23:02 schrieb David Airlie:
[...]
>> Faulty hardware (perhaps just a cheap pull down resistor on the VGA
>> connection as Dave Airlie suggests) means that any such affected
>> platform has a polling routine that causes significant issues on any
>> timing sensitive applications.
> We could write a patch to just say if we see 10 bogus EDID polls we
> just give up and loudly say in the logs.

I don't think we should do that. The fallout might just backfire as well.

Best regards
Thomas

>
> This might break some crash-cart plugins in some data centers though,
> I don't think we have contracts in Matrox or the server vendors who
> make the hw to say how they recommend finding this info.
>
> It might be in ACPI or dmidecodes.
>
> Dave.
>
>
>> Right now, I am stuck in a situation which means that I have to fight to
>> reach every customer who uses one of these platforms and confirm they
>> either disable polling or ban the module so it won't even load.
>>
>> This is frustrating, as it is unlikely I'll reach everyone.
>>
>> I doubt that I'm the only one with users who are affected by mysterious
>> performance or timing problems related to this. While its true that not
>> *every* instance of the device is problematic (at least not now that we
>> fixed the other issue with the udelay...), but many systems using the
>> controller *are* negatively impacted even with the timing fix, as I have
>> now seen...
>>
>> Unfortunately, I also have no better idea than a DMI quirk table to
>> record known platforms that include the controller but don't have a
>> physical VGA connection exposed.
>>
>> Thus, I'm wondering what else we can do? Using WQ_UNBOUND might help
>> somewhat? I have no idea if its safe to sleep instead of spin while
>> reading the i2c connections... As far as I can tell the non-atomic
>> version has nothing that *strictly* prevents sleep.. but maybe i2c
>> access has tighter timing requirements than what usleep_range can
>> fulfill? I am not sure...
>>
>> I'd just really like to not have to worry about going to every single
>> user and asking them to unload and ban a driver for these big server
>> platforms...
>>

-- 
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstr. 146, 90461 Nürnberg, Germany, www.suse.com
GF: Jochen Jaser, Andrew McDonald, Werner Knoblich, (HRB 36809, AG Nürnberg)



  parent reply	other threads:[~2026-04-24  6:16 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-22 23:55 further issues with MGA G200 graphics chipset Jacob Keller
2026-04-23  0:05 ` David Airlie
2026-04-23 21:39   ` Jacob Keller
2026-04-23  7:44 ` Thomas Zimmermann
2026-04-23 16:35   ` Jacob Keller
2026-04-23 19:22     ` Jocelyn Falempe
2026-04-23 19:42       ` Jacob Keller
2026-04-23 21:02         ` David Airlie
2026-04-23 21:18           ` Jacob Keller
2026-04-24  6:16           ` Thomas Zimmermann [this message]
2026-04-24  6:20         ` Thomas Zimmermann
2026-04-24  7:36           ` Jocelyn Falempe
2026-04-24  7:47             ` Thomas Zimmermann
2026-04-24 23:29               ` Jacob Keller
2026-04-27 12:14                 ` Thomas Zimmermann
2026-04-27 22:53                   ` Jacob Keller
2026-04-27 23:32                     ` Jacob Keller
2026-04-28 19:12                   ` stuart hayes
2026-04-28 21:07                     ` Jacob Keller
2026-04-29  6:40                     ` Thomas Zimmermann

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