[PATCH v4 0/5] dt-bindings: Microchip/Atmel AT91/SAMA system peripherals: convert to YAML

[PATCH v4 0/5] dt-bindings: Microchip/Atmel AT91/SAMA system peripherals: convert to YAML

[Akhila YS]

Convert various legacy .txt bindings for Microchip (formerly Atmel) AT91/SAMA
family system peripherals to proper YAML schemas. This includes:

- CHIPID (SoC ID register block)
- PIT (Period Interval Timer, old style)
- PIT64B (64-bit Period Interval Timer, newer parts)
- ST (System Timer, including watchdog subnode)
- RAMC/SDRAMC/DDRAMC/UDDRC (SDRAM/DDR memory controller

Signed-off-by: Akhila YS <akhilayalmati@gmail.com>
---
Changes in v4:
- atmel,at91rm9200-sdramc: remove "- items enum:" and replace it with "- enum:" for compatible property.
- Link to v3: https://lore.kernel.org/r/20260226-arm-microchip-v3-0-0bda15abd922@gmail.com

Changes in v3:
- Change email for maintainers.
- atmel,at91rm9200-st: redefine watchdog node as a pattern property.
- Remove corresponding binding node from txt document for every yaml patch. 
- Link to v2: https://lore.kernel.org/r/20260224-arm-microchip-v2-0-8bedacd2cdcb@gmail.com

Changes in v2:
- Change email for maintainers.
- microchip,sam9x60-pit64b: modify compatible and clock-names in properties.  
- Link to v1: https://lore.kernel.org/r/20260217-arm-microchip-v1-0-ae5d907e10e3@gmail.com

---
Akhila YS (5):
      dt-bindings: arm: microchip,sama7g5-chipid : convert to DT schema
      dt-bindings: arm: atmel,at91sam9260-pit: convert to DT schema
      dt-bindings: arm: microchip,sam9x60-pit64b : convert to DT schema
      dt-bindings: arm: atmel,at91rm9200-st: convert to DT schema
      dt-bindings: arm: atmel,at91rm9200-sdramc: convert to DT schema

 .../bindings/arm/atmel,at91rm9200-sdramc.yaml      | 66 +++++++++++++++++++++
 .../bindings/arm/atmel,at91rm9200-st.yaml          | 69 ++++++++++++++++++++++
 .../bindings/arm/atmel,at91sam9260-pit.yaml        | 49 +++++++++++++++
 .../devicetree/bindings/arm/atmel-sysregs.txt      | 48 ---------------
 .../bindings/arm/microchip,sam9x60-pit64b.yaml     | 68 +++++++++++++++++++++
 .../bindings/arm/microchip,sama7g5-chipid.yaml     | 41 +++++++++++++
 6 files changed, 293 insertions(+), 48 deletions(-)
---
base-commit: ca3a02fda4da8e2c1cb6baee5d72352e9e2cfaea
change-id: 20260128-arm-microchip-c0c0515024e6

Best regards,
-- 
Akhila YS <akhilayalmati@gmail.com>

[PATCH v4 1/5] dt-bindings: arm: microchip,sama7g5-chipid : convert to DT schema

[Akhila YS]

Convert Atmel system registers binding to YAML format.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Akhila YS <akhilayalmati@gmail.com>
---
 .../devicetree/bindings/arm/atmel-sysregs.txt      |  5 ---
 .../bindings/arm/microchip,sama7g5-chipid.yaml     | 41 ++++++++++++++++++++++
 2 files changed, 41 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
index 5ce54f9befe6..4ee18112586d 100644
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -1,10 +1,5 @@
 Atmel system registers
 
-Chipid required properties:
-- compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
-			"microchip,sama7d65-chipid"
-- reg : Should contain registers location and length
-
 PIT Timer required properties:
 - compatible: Should be "atmel,at91sam9260-pit"
 - reg: Should contain registers location and length
diff --git a/Documentation/devicetree/bindings/arm/microchip,sama7g5-chipid.yaml b/Documentation/devicetree/bindings/arm/microchip,sama7g5-chipid.yaml
new file mode 100644
index 000000000000..4fdb068be929
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/microchip,sama7g5-chipid.yaml
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/microchip,sama7g5-chipid.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel/Microchip RAMC SDRAM/DDR Controller
+
+maintainers:
+  - Nicolas Ferre <nicolas.ferre@microchip.com>
+  - Claudiu Beznea <claudiu.beznea@tuxon.dev>
+
+description:
+  This binding describes the Atmel/Microchip Chip ID register block used
+  for SoC identification and revision information. It requires compatible
+  strings matching specific SoC families and a reg property defining the
+  register address and size.
+
+properties:
+  compatible:
+    enum:
+      - atmel,sama5d2-chipid
+      - microchip,sama7g5-chipid
+      - microchip,sama7d65-chipid
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    chipid@fc069000 {
+        compatible = "atmel,sama5d2-chipid";
+        reg = <0xfc069000 0x8>;
+    };
+...

-- 
2.43.0

[PATCH v4 2/5] dt-bindings: arm: atmel,at91sam9260-pit: convert to DT schema

[Akhila YS]

Convert Atmel Periodic interval timer (PIT) binding to YAML format.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Akhila YS <akhilayalmati@gmail.com>
---
 .../bindings/arm/atmel,at91sam9260-pit.yaml        | 49 ++++++++++++++++++++++
 .../devicetree/bindings/arm/atmel-sysregs.txt      |  6 ---
 2 files changed, 49 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/atmel,at91sam9260-pit.yaml b/Documentation/devicetree/bindings/arm/atmel,at91sam9260-pit.yaml
new file mode 100644
index 000000000000..d1bdc4a4f9e0
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/atmel,at91sam9260-pit.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/atmel,at91sam9260-pit.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel AT91SAM9260 Periodic Interval Timer (PIT)
+
+maintainers:
+  - Nicolas Ferre <nicolas.ferre@microchip.com>
+  - Claudiu Beznea <claudiu.beznea@tuxon.dev>
+
+description:
+  The Periodic Interval Timer (PIT) is part of the System Controller of
+  various Microchip 32-bit ARM-based SoCs (formerly Atmel AT91 series).
+  It is a simple down-counter timer used mainly as the kernel tick source.
+  The PIT is clocked from the slow clock and shares a single IRQ line with
+  other System Controller peripherals.
+
+properties:
+  compatible:
+    const: atmel,at91sam9260-pit
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    timer@fffffd30 {
+        compatible = "atmel,at91sam9260-pit";
+        reg = <0xfffffd30 0x10>;
+        interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&clk32k>;
+    };
+...
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
index 4ee18112586d..70059f66f2b4 100644
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -1,11 +1,5 @@
 Atmel system registers
 
-PIT Timer required properties:
-- compatible: Should be "atmel,at91sam9260-pit"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt for the PIT which is the IRQ line
-  shared across all System Controller members.
-
 PIT64B Timer required properties:
 - compatible: Should be "microchip,sam9x60-pit64b" or
 			"microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b"

-- 
2.43.0

[PATCH v4 3/5] dt-bindings: arm: microchip,sam9x60-pit64b : convert to DT schema

[Akhila YS]

Convert Atmel Periodic interval timer of 64bit (PIT64b) binding to YAML
format.
Changes during conversion:
- Add missing compatible "microchip,sama7g5-pit64b" along with a fallback
compatible "microchip,sam9x60-pit64b".

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Akhila YS <akhilayalmati@gmail.com>
---
 .../devicetree/bindings/arm/atmel-sysregs.txt      |  8 ---
 .../bindings/arm/microchip,sam9x60-pit64b.yaml     | 68 ++++++++++++++++++++++
 2 files changed, 68 insertions(+), 8 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
index 70059f66f2b4..d0561f7f465c 100644
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -1,13 +1,5 @@
 Atmel system registers
 
-PIT64B Timer required properties:
-- compatible: Should be "microchip,sam9x60-pit64b" or
-			"microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b"
-			"microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt for PIT64B timer
-- clocks: Should contain the available clock sources for PIT64B timer.
-
 System Timer (ST) required properties:
 - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
 - reg: Should contain registers location and length
diff --git a/Documentation/devicetree/bindings/arm/microchip,sam9x60-pit64b.yaml b/Documentation/devicetree/bindings/arm/microchip,sam9x60-pit64b.yaml
new file mode 100644
index 000000000000..f00ac7e858d9
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/microchip,sam9x60-pit64b.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/microchip,sam9x60-pit64b.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip PIT64B 64-bit Periodic Interval Timer
+
+maintainers:
+  - Nicolas Ferre <nicolas.ferre@microchip.com>
+  - Claudiu Beznea <claudiu.beznea@tuxon.dev>
+
+description:
+  The Microchip PIT64B is a 64-bit periodic interval timer used in
+  several modern Microchip ARM SoCs including SAM9X60, SAM9X7 and
+  SAMA7D65 families. It provides extended timing range, flexible
+  clock selection and supports both periodic and one-shot interrupt
+  generation modes.
+
+properties:
+  compatible:
+    oneOf:
+      - const: microchip,sam9x60-pit64b
+      - items:
+          - enum:
+              - microchip,sama7d65-pit64b
+              - microchip,sama7g5-pit64b
+              - microchip,sam9x7-pit64b
+          - const: microchip,sam9x60-pit64b
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    minItems: 1
+    maxItems: 2
+
+  clock-names:
+    minItems: 1
+    maxItems: 2
+    items:
+      enum:
+        - pclk
+        - gclk
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/clock/at91.h>
+    timer@f0028000 {
+        compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
+        reg = <0xf0028000 0x100>;
+        interrupts = <37 IRQ_TYPE_LEVEL_HIGH 7>;
+        clocks = <&pmc PMC_TYPE_PERIPHERAL 37>, <&pmc PMC_TYPE_GCK 37>;
+        clock-names = "pclk", "gclk";
+    };
+...

-- 
2.43.0

[PATCH v4 4/5] dt-bindings: arm: atmel,at91rm9200-st: convert to DT schema

[Akhila YS]

Convert System Timer binding to YAML format.
Changes during conversion:
- Add "#address-cells" and "#size-cells" to the properties and required as
  watchdog is defined as a child node to the timer parent node.
- Define watchdog as a pattern property along with unit address in
  examples.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Akhila YS <akhilayalmati@gmail.com>
---
 .../bindings/arm/atmel,at91rm9200-st.yaml          | 69 ++++++++++++++++++++++
 .../devicetree/bindings/arm/atmel-sysregs.txt      |  9 ---
 2 files changed, 69 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/atmel,at91rm9200-st.yaml b/Documentation/devicetree/bindings/arm/atmel,at91rm9200-st.yaml
new file mode 100644
index 000000000000..3f6a934a2a69
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/atmel,at91rm9200-st.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/atmel,at91rm9200-st.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel System Timer
+
+maintainers:
+  - Nicolas Ferre <nicolas.ferre@microchip.com>
+  - Claudiu Beznea <claudiu.beznea@tuxon.dev>
+
+description:
+  The System Timer (ST) module in AT91RM9200 provides periodic tick and
+  alarm capabilities. It is exposed as a simple multi-function device
+  (simple-mfd + syscon) because it shares its register space and interrupt
+  with other System Controller blocks.
+
+properties:
+  compatible:
+    items:
+      - const: atmel,at91rm9200-st
+      - const: syscon
+      - const: simple-mfd
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 1
+
+patternProperties:
+  "^watchdog@[0-9a-f]+$":
+    $ref: /schemas/watchdog/atmel,at91rm9200-wdt.yaml#
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    timer@fffffd00 {
+        compatible = "atmel,at91rm9200-st", "syscon", "simple-mfd";
+        reg = <0xfffffd00 0x100>;
+        interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+        clocks = <&slow_xtal>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        watchdog@fffffd40 {
+            compatible = "atmel,at91rm9200-wdt";
+            reg = <0xfffffd40 0x40>;
+        };
+    };
+...
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
index d0561f7f465c..14642384bc87 100644
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -1,14 +1,5 @@
 Atmel system registers
 
-System Timer (ST) required properties:
-- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt for the ST which is the IRQ line
-  shared across all System Controller members.
-- clocks: phandle to input clock.
-Its subnodes can be:
-- watchdog: compatible should be "atmel,at91rm9200-wdt"
-
 RAMC SDRAM/DDR Controller required properties:
 - compatible: Should be "atmel,at91rm9200-sdramc", "syscon" or
 			"atmel,at91sam9260-sdramc" or

-- 
2.43.0

[PATCH v4 5/5] dt-bindings: arm: atmel,at91rm9200-sdramc: convert to DT schema

[Akhila YS]

Convert RAMC SDRAM/DDR controller binding to YAML format.

Signed-off-by: Akhila YS <akhilayalmati@gmail.com>
---
 .../bindings/arm/atmel,at91rm9200-sdramc.yaml      | 66 ++++++++++++++++++++++
 .../devicetree/bindings/arm/atmel-sysregs.txt      | 20 -------
 2 files changed, 66 insertions(+), 20 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/atmel,at91rm9200-sdramc.yaml b/Documentation/devicetree/bindings/arm/atmel,at91rm9200-sdramc.yaml
new file mode 100644
index 000000000000..ac7e0f454a34
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/atmel,at91rm9200-sdramc.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/atmel,at91rm9200-sdramc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip (Atmel) SDRAM / DDR Controller (RAMC / DDRAMC / UDDRC)
+
+maintainers:
+  - Nicolas Ferre <nicolas.ferre@microchip.com>
+  - Claudiu Beznea <claudiu.beznea@tuxon.dev>
+
+description:
+  The SDRAM/DDR Controller (often called RAMC or DDRAMC) in various
+  Atmel/Microchip ARM9 and Cortex-A5/A7 SoCs  manages external
+  SDRAM / DDR memory. It is typically exposed as a syscon node for
+  register access from other drivers (e.g. for initialization or mode
+  configuration). No interrupts or clocks are usually required in the
+  binding.
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - const: atmel,at91rm9200-sdramc
+          - const: syscon
+      - items:
+          - const: microchip,sama7d65-uddrc
+          - const: microchip,sama7g5-uddrc
+      - enum:
+          - atmel,at91sam9260-sdramc
+          - atmel,at91sam9g45-ddramc
+          - atmel,sama5d3-ddramc
+          - microchip,sam9x60-ddramc
+          - microchip,sam9x7-ddramc
+          - microchip,sama7g5-uddrc
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    minItems: 1
+    maxItems: 2
+
+  clock-names:
+    minItems: 1
+    items:
+      - const: ddrck
+      - const: mpddr
+
+required:
+  - compatible
+  - reg
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/at91.h>
+    ramc@ffffe400 {
+        compatible = "atmel,at91sam9g45-ddramc";
+        reg = <0xffffe400 0x200>;
+        clocks = <&pmc PMC_TYPE_SYSTEM 2>;
+        clock-names = "ddrck";
+    };
+...
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
deleted file mode 100644
index 14642384bc87..000000000000
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ /dev/null
@@ -1,20 +0,0 @@
-Atmel system registers
-
-RAMC SDRAM/DDR Controller required properties:
-- compatible: Should be "atmel,at91rm9200-sdramc", "syscon" or
-			"atmel,at91sam9260-sdramc" or
-			"atmel,at91sam9g45-ddramc" or
-			"atmel,sama5d3-ddramc" or
-			"microchip,sam9x60-ddramc" or
-			"microchip,sama7g5-uddrc" or
-			"microchip,sama7d65-uddrc", "microchip,sama7g5-uddrc" or
-			"microchip,sam9x7-ddramc", "atmel,sama5d3-ddramc".
-- reg: Should contain registers location and length
-
-Examples:
-
-	ramc0: ramc@ffffe800 {
-		compatible = "atmel,at91sam9g45-ddramc";
-		reg = <0xffffe800 0x200>;
-	};
-

-- 
2.43.0

Re: [PATCH v4 5/5] dt-bindings: arm: atmel,at91rm9200-sdramc: convert to DT schema

[Conor Dooley]

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Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

[-- Attachment #2: signature.asc --]
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Re: [PATCH v4 1/5] dt-bindings: arm: microchip,sama7g5-chipid : convert to DT schema

[Claudiu Beznea]

Hi, Akhila,

On 2/27/26 17:14, Akhila YS wrote:
> Convert Atmel system registers binding to YAML format.
> 
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Akhila YS <akhilayalmati@gmail.com>
> ---
>   .../devicetree/bindings/arm/atmel-sysregs.txt      |  5 ---
>   .../bindings/arm/microchip,sama7g5-chipid.yaml     | 41 ++++++++++++++++++++++
>   2 files changed, 41 insertions(+), 5 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> index 5ce54f9befe6..4ee18112586d 100644
> --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> @@ -1,10 +1,5 @@
>   Atmel system registers
>   
> -Chipid required properties:
> -- compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
> -			"microchip,sama7d65-chipid"
> -- reg : Should contain registers location and length
> -
>   PIT Timer required properties:
>   - compatible: Should be "atmel,at91sam9260-pit"
>   - reg: Should contain registers location and length
> diff --git a/Documentation/devicetree/bindings/arm/microchip,sama7g5-chipid.yaml b/Documentation/devicetree/bindings/arm/microchip,sama7g5-chipid.yaml
> new file mode 100644
> index 000000000000..4fdb068be929
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/microchip,sama7g5-chipid.yaml
> @@ -0,0 +1,41 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/microchip,sama7g5-chipid.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Atmel/Microchip RAMC SDRAM/DDR Controller
> +
> +maintainers:
> +  - Nicolas Ferre <nicolas.ferre@microchip.com>
> +  - Claudiu Beznea <claudiu.beznea@tuxon.dev>
> +
> +description:
> +  This binding describes the Atmel/Microchip Chip ID register block used
> +  for SoC identification and revision information. It requires compatible
> +  strings matching specific SoC families and a reg property defining the
> +  register address and size.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - atmel,sama5d2-chipid
> +      - microchip,sama7g5-chipid
> +      - microchip,sama7d65-chipid

I'll keep this alphanumerically sorted, thus "microchip,sama7d64-chipid" in the 
middle. I'll adjust it while applying. Other than that:

Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>

> +
> +  reg:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    chipid@fc069000 {
> +        compatible = "atmel,sama5d2-chipid";
> +        reg = <0xfc069000 0x8>;
> +    };
> +...
> 

Re: [PATCH v4 2/5] dt-bindings: arm: atmel,at91sam9260-pit: convert to DT schema

[Claudiu Beznea]

On 2/27/26 17:14, Akhila YS wrote:
> Convert Atmel Periodic interval timer (PIT) binding to YAML format.
> 
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Akhila YS <akhilayalmati@gmail.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>

Re: [PATCH v4 4/5] dt-bindings: arm: atmel,at91rm9200-st: convert to DT schema

[Claudiu Beznea]

On 2/27/26 17:14, Akhila YS wrote:
> Convert System Timer binding to YAML format.
> Changes during conversion:
> - Add "#address-cells" and "#size-cells" to the properties and required as
>    watchdog is defined as a child node to the timer parent node.
> - Define watchdog as a pattern property along with unit address in
>    examples.
> 
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Akhila YS <akhilayalmati@gmail.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>

Re: [PATCH v4 3/5] dt-bindings: arm: microchip,sam9x60-pit64b : convert to DT schema

[Claudiu Beznea]

On 2/27/26 17:14, Akhila YS wrote:
> Convert Atmel Periodic interval timer of 64bit (PIT64b) binding to YAML
> format.
> Changes during conversion:
> - Add missing compatible "microchip,sama7g5-pit64b" along with a fallback
> compatible "microchip,sam9x60-pit64b".
> 
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Akhila YS <akhilayalmati@gmail.com>
> ---
>   .../devicetree/bindings/arm/atmel-sysregs.txt      |  8 ---
>   .../bindings/arm/microchip,sam9x60-pit64b.yaml     | 68 ++++++++++++++++++++++
>   2 files changed, 68 insertions(+), 8 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> index 70059f66f2b4..d0561f7f465c 100644
> --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> @@ -1,13 +1,5 @@
>   Atmel system registers
>   
> -PIT64B Timer required properties:
> -- compatible: Should be "microchip,sam9x60-pit64b" or
> -			"microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b"
> -			"microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b"
> -- reg: Should contain registers location and length
> -- interrupts: Should contain interrupt for PIT64B timer
> -- clocks: Should contain the available clock sources for PIT64B timer.
> -
>   System Timer (ST) required properties:
>   - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
>   - reg: Should contain registers location and length
> diff --git a/Documentation/devicetree/bindings/arm/microchip,sam9x60-pit64b.yaml b/Documentation/devicetree/bindings/arm/microchip,sam9x60-pit64b.yaml
> new file mode 100644
> index 000000000000..f00ac7e858d9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/microchip,sam9x60-pit64b.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/microchip,sam9x60-pit64b.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip PIT64B 64-bit Periodic Interval Timer
> +
> +maintainers:
> +  - Nicolas Ferre <nicolas.ferre@microchip.com>
> +  - Claudiu Beznea <claudiu.beznea@tuxon.dev>
> +
> +description:
> +  The Microchip PIT64B is a 64-bit periodic interval timer used in
> +  several modern Microchip ARM SoCs including SAM9X60, SAM9X7 and
> +  SAMA7D65 families. It provides extended timing range, flexible
> +  clock selection and supports both periodic and one-shot interrupt
> +  generation modes.
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - const: microchip,sam9x60-pit64b
> +      - items:
> +          - enum:
> +              - microchip,sama7d65-pit64b
> +              - microchip,sama7g5-pit64b
> +              - microchip,sam9x7-pit64b

Same here, I'll adjust this list to be alphanumerically sorted, thus, 
microchip,sam9x7-pit64b first. Other than that:

Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>

Re: [PATCH v4 5/5] dt-bindings: arm: atmel,at91rm9200-sdramc: convert to DT schema

[Claudiu Beznea]

On 2/27/26 17:14, Akhila YS wrote:
> Convert RAMC SDRAM/DDR controller binding to YAML format.
> 
> Signed-off-by: Akhila YS <akhilayalmati@gmail.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>

Re: [PATCH v4 1/5] dt-bindings: arm: microchip,sama7g5-chipid : convert to DT schema

[Akhila YS]

On 07-03-2026 20:00, Claudiu Beznea wrote:
> Hi, Akhila,
>
> On 2/27/26 17:14, Akhila YS wrote:
>> Convert Atmel system registers binding to YAML format.
>>
>> Acked-by: Conor Dooley <conor.dooley@microchip.com>
>> Signed-off-by: Akhila YS <akhilayalmati@gmail.com>
>> ---
>>   .../devicetree/bindings/arm/atmel-sysregs.txt      |  5 ---
>>   .../bindings/arm/microchip,sama7g5-chipid.yaml     | 41
>> ++++++++++++++++++++++
>>   2 files changed, 41 insertions(+), 5 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
>> b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
>> index 5ce54f9befe6..4ee18112586d 100644
>> --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
>> +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
>> @@ -1,10 +1,5 @@
>>   Atmel system registers
>>   -Chipid required properties:
>> -- compatible: Should be "atmel,sama5d2-chipid" or
>> "microchip,sama7g5-chipid"
>> -            "microchip,sama7d65-chipid"
>> -- reg : Should contain registers location and length
>> -
>>   PIT Timer required properties:
>>   - compatible: Should be "atmel,at91sam9260-pit"
>>   - reg: Should contain registers location and length
>> diff --git
>> a/Documentation/devicetree/bindings/arm/microchip,sama7g5-chipid.yaml
>> b/Documentation/devicetree/bindings/arm/microchip,sama7g5-chipid.yaml
>> new file mode 100644
>> index 000000000000..4fdb068be929
>> --- /dev/null
>> +++
>> b/Documentation/devicetree/bindings/arm/microchip,sama7g5-chipid.yaml
>> @@ -0,0 +1,41 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/arm/microchip,sama7g5-chipid.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Atmel/Microchip RAMC SDRAM/DDR Controller
>> +
>> +maintainers:
>> +  - Nicolas Ferre <nicolas.ferre@microchip.com>
>> +  - Claudiu Beznea <claudiu.beznea@tuxon.dev>
>> +
>> +description:
>> +  This binding describes the Atmel/Microchip Chip ID register block
>> used
>> +  for SoC identification and revision information. It requires
>> compatible
>> +  strings matching specific SoC families and a reg property defining
>> the
>> +  register address and size.
>> +
>> +properties:
>> +  compatible:
>> +    enum:
>> +      - atmel,sama5d2-chipid
>> +      - microchip,sama7g5-chipid
>> +      - microchip,sama7d65-chipid
>
> I'll keep this alphanumerically sorted, thus
> "microchip,sama7d64-chipid" in the middle. I'll adjust it while
> applying. Other than that: 
>


Thank you claudiu.


> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> 
>
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +
>> +unevaluatedProperties: false
>> +
>> +examples:
>> +  - |
>> +    chipid@fc069000 {
>> +        compatible = "atmel,sama5d2-chipid";
>> +        reg = <0xfc069000 0x8>;
>> +    };
>> +...
>>
>
-- 
Best Regards,
Akhila.

Re: [PATCH v4 3/5] dt-bindings: arm: microchip,sam9x60-pit64b : convert to DT schema

[Akhila YS]

On 07-03-2026 20:01, Claudiu Beznea wrote:
>
>
> On 2/27/26 17:14, Akhila YS wrote:
>> Convert Atmel Periodic interval timer of 64bit (PIT64b) binding to YAML
>> format.
>> Changes during conversion:
>> - Add missing compatible "microchip,sama7g5-pit64b" along with a
>> fallback
>> compatible "microchip,sam9x60-pit64b".
>>
>> Acked-by: Conor Dooley <conor.dooley@microchip.com>
>> Signed-off-by: Akhila YS <akhilayalmati@gmail.com>
>> ---
>>   .../devicetree/bindings/arm/atmel-sysregs.txt      |  8 ---
>>   .../bindings/arm/microchip,sam9x60-pit64b.yaml     | 68
>> ++++++++++++++++++++++
>>   2 files changed, 68 insertions(+), 8 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
>> b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
>> index 70059f66f2b4..d0561f7f465c 100644
>> --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
>> +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
>> @@ -1,13 +1,5 @@
>>   Atmel system registers
>>   -PIT64B Timer required properties:
>> -- compatible: Should be "microchip,sam9x60-pit64b" or
>> -            "microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b"
>> -            "microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b"
>> -- reg: Should contain registers location and length
>> -- interrupts: Should contain interrupt for PIT64B timer
>> -- clocks: Should contain the available clock sources for PIT64B timer.
>> -
>>   System Timer (ST) required properties:
>>   - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
>>   - reg: Should contain registers location and length
>> diff --git
>> a/Documentation/devicetree/bindings/arm/microchip,sam9x60-pit64b.yaml
>> b/Documentation/devicetree/bindings/arm/microchip,sam9x60-pit64b.yaml
>> new file mode 100644
>> index 000000000000..f00ac7e858d9
>> --- /dev/null
>> +++
>> b/Documentation/devicetree/bindings/arm/microchip,sam9x60-pit64b.yaml
>> @@ -0,0 +1,68 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/arm/microchip,sam9x60-pit64b.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Microchip PIT64B 64-bit Periodic Interval Timer
>> +
>> +maintainers:
>> +  - Nicolas Ferre <nicolas.ferre@microchip.com>
>> +  - Claudiu Beznea <claudiu.beznea@tuxon.dev>
>> +
>> +description:
>> +  The Microchip PIT64B is a 64-bit periodic interval timer used in
>> +  several modern Microchip ARM SoCs including SAM9X60, SAM9X7 and
>> +  SAMA7D65 families. It provides extended timing range, flexible
>> +  clock selection and supports both periodic and one-shot interrupt
>> +  generation modes.
>> +
>> +properties:
>> +  compatible:
>> +    oneOf:
>> +      - const: microchip,sam9x60-pit64b
>> +      - items:
>> +          - enum:
>> +              - microchip,sama7d65-pit64b
>> +              - microchip,sama7g5-pit64b
>> +              - microchip,sam9x7-pit64b
>
> Same here, I'll adjust this list to be alphanumerically sorted, thus,
> microchip,sam9x7-pit64b first. Other than that: 


Thank you claudiu.

>
> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
-- 
Best Regards,
Akhila.

Re: [PATCH v4 0/5] dt-bindings: Microchip/Atmel AT91/SAMA system peripherals: convert to YAML

[Claudiu Beznea]

On 2/27/26 17:14, Akhila YS wrote:
> Akhila YS (5):
>        dt-bindings: arm: microchip,sama7g5-chipid : convert to DT schema
>        dt-bindings: arm: atmel,at91sam9260-pit: convert to DT schema
>        dt-bindings: arm: microchip,sam9x60-pit64b : convert to DT schema
>        dt-bindings: arm: atmel,at91rm9200-st: convert to DT schema
>        dt-bindings: arm: atmel,at91rm9200-sdramc: convert to DT schema

Applied to at91-soc, thanks!