From: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com>
To: Mario Limonciello <superm1@kernel.org>,
"Gautham R . Shenoy" <gautham.shenoy@amd.com>,
Perry Yuan <perry.yuan@amd.com>
Cc: "open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<linux-kernel@vger.kernel.org>,
"open list:CPU FREQUENCY SCALING FRAMEWORK"
<linux-pm@vger.kernel.org>,
Mario Limonciello <mario.limonciello@amd.com>
Subject: Re: [PATCH v4 09/19] cpufreq/amd-pstate-ut: Drop SUCCESS and FAIL enums
Date: Mon, 24 Feb 2025 11:35:59 +0530 [thread overview]
Message-ID: <086f6284-46b8-4cb1-8b19-009ee0e10af3@amd.com> (raw)
In-Reply-To: <20250219210302.442954-10-superm1@kernel.org>
On 2/20/2025 2:32 AM, Mario Limonciello wrote:
> From: Mario Limonciello <mario.limonciello@amd.com>
>
> Enums are effectively used as a boolean and don't show
> the return value of the failing call.
>
> Instead of using enums switch to returning the actual return
> code from the unit test.
>
One query below, apart from that LGTM,
Reviewed-by: Dhananjay Ugwekar <dhananjay.ugwekar@amd.com>
> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
> drivers/cpufreq/amd-pstate-ut.c | 143 ++++++++++++--------------------
> 1 file changed, 55 insertions(+), 88 deletions(-)
>
> diff --git a/drivers/cpufreq/amd-pstate-ut.c b/drivers/cpufreq/amd-pstate-ut.c
> index 0f0b867e271cc..028527a0019ca 100644
> --- a/drivers/cpufreq/amd-pstate-ut.c
> +++ b/drivers/cpufreq/amd-pstate-ut.c
> @@ -32,30 +32,20 @@
>
> #include "amd-pstate.h"
>
> -/*
> - * Abbreviations:
> - * amd_pstate_ut: used as a shortform for AMD P-State unit test.
> - * It helps to keep variable names smaller, simpler
> - */
> -enum amd_pstate_ut_result {
> - AMD_PSTATE_UT_RESULT_PASS,
> - AMD_PSTATE_UT_RESULT_FAIL,
> -};
>
> struct amd_pstate_ut_struct {
> const char *name;
> - void (*func)(u32 index);
> - enum amd_pstate_ut_result result;
> + int (*func)(u32 index);
> };
>
> /*
> * Kernel module for testing the AMD P-State unit test
> */
> -static void amd_pstate_ut_acpi_cpc_valid(u32 index);
> -static void amd_pstate_ut_check_enabled(u32 index);
> -static void amd_pstate_ut_check_perf(u32 index);
> -static void amd_pstate_ut_check_freq(u32 index);
> -static void amd_pstate_ut_check_driver(u32 index);
> +static int amd_pstate_ut_acpi_cpc_valid(u32 index);
> +static int amd_pstate_ut_check_enabled(u32 index);
> +static int amd_pstate_ut_check_perf(u32 index);
> +static int amd_pstate_ut_check_freq(u32 index);
> +static int amd_pstate_ut_check_driver(u32 index);
>
> static struct amd_pstate_ut_struct amd_pstate_ut_cases[] = {
> {"amd_pstate_ut_acpi_cpc_valid", amd_pstate_ut_acpi_cpc_valid },
> @@ -78,51 +68,46 @@ static bool get_shared_mem(void)
> /*
> * check the _CPC object is present in SBIOS.
> */
> -static void amd_pstate_ut_acpi_cpc_valid(u32 index)
> +static int amd_pstate_ut_acpi_cpc_valid(u32 index)
> {
> - if (acpi_cpc_valid())
> - amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS;
> - else {
> - amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
> + if (!acpi_cpc_valid()) {
> pr_err("%s the _CPC object is not present in SBIOS!\n", __func__);
> + return -EINVAL;
> }
> +
> + return 0;
> }
>
> -static void amd_pstate_ut_pstate_enable(u32 index)
> +/*
> + * check if amd pstate is enabled
> + */
> +static int amd_pstate_ut_check_enabled(u32 index)
> {
> - int ret = 0;
> u64 cppc_enable = 0;
> + int ret;
> +
> + if (get_shared_mem())
> + return 0;
What do you think about adding a "cppc_get_enable()" function in acpi_cppc.c so that we can
run this check for shared mem systems as well ?
Thanks,
Dhananjay
>
> ret = rdmsrl_safe(MSR_AMD_CPPC_ENABLE, &cppc_enable);
> if (ret) {
> - amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
> pr_err("%s rdmsrl_safe MSR_AMD_CPPC_ENABLE ret=%d error!\n", __func__, ret);
> - return;
> + return ret;
> }
> - if (cppc_enable)
> - amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS;
> - else {
> - amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
> +
> + if (!cppc_enable) {
> pr_err("%s amd pstate must be enabled!\n", __func__);
> + return -EINVAL;
> }
> -}
>
> -/*
> - * check if amd pstate is enabled
> - */
> -static void amd_pstate_ut_check_enabled(u32 index)
> -{
> - if (get_shared_mem())
> - amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS;
> - else
> - amd_pstate_ut_pstate_enable(index);
> + return 0;
> }
>
> /*
> * check if performance values are reasonable.
> * highest_perf >= nominal_perf > lowest_nonlinear_perf > lowest_perf > 0
> */
> -static void amd_pstate_ut_check_perf(u32 index)
> +static int amd_pstate_ut_check_perf(u32 index)
> {
> int cpu = 0, ret = 0;
> u32 highest_perf = 0, nominal_perf = 0, lowest_nonlinear_perf = 0, lowest_perf = 0;
[Snip]
next prev parent reply other threads:[~2025-02-24 6:06 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-19 21:02 [PATCH v4 00/19] amd-pstate cleanups Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 01/19] cpufreq/amd-pstate: Invalidate cppc_req_cached during suspend Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 02/19] cpufreq/amd-pstate: Show a warning when a CPU fails to setup Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 03/19] cpufreq/amd-pstate: Drop min and max cached frequencies Mario Limonciello
2025-02-24 4:51 ` Dhananjay Ugwekar
2025-02-19 21:02 ` [PATCH v4 04/19] cpufreq/amd-pstate: Move perf values into a union Mario Limonciello
2025-02-24 5:01 ` Dhananjay Ugwekar
2025-02-19 21:02 ` [PATCH v4 05/19] cpufreq/amd-pstate: Overhaul locking Mario Limonciello
2025-02-24 5:23 ` Dhananjay Ugwekar
2025-02-19 21:02 ` [PATCH v4 06/19] cpufreq/amd-pstate: Drop `cppc_cap1_cached` Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 07/19] cpufreq/amd-pstate-ut: Use _free macro to free put policy Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 08/19] cpufreq/amd-pstate-ut: Allow lowest nonlinear and lowest to be the same Mario Limonciello
2025-02-24 5:26 ` Dhananjay Ugwekar
2025-02-19 21:02 ` [PATCH v4 09/19] cpufreq/amd-pstate-ut: Drop SUCCESS and FAIL enums Mario Limonciello
2025-02-24 6:05 ` Dhananjay Ugwekar [this message]
2025-02-25 0:05 ` Mario Limonciello
2025-02-25 4:07 ` Dhananjay Ugwekar
2025-02-19 21:02 ` [PATCH v4 10/19] cpufreq/amd-pstate-ut: Run on all of the correct CPUs Mario Limonciello
2025-02-24 6:09 ` Dhananjay Ugwekar
2025-02-19 21:02 ` [PATCH v4 11/19] cpufreq/amd-pstate-ut: Adjust variable scope for amd_pstate_ut_check_freq() Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 12/19] cpufreq/amd-pstate: Replace all AMD_CPPC_* macros with masks Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 13/19] cpufreq/amd-pstate: Cache CPPC request in shared mem case too Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 14/19] cpufreq/amd-pstate: Move all EPP tracing into *_update_perf and *_set_epp functions Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 15/19] cpufreq/amd-pstate: Update cppc_req_cached for shared mem EPP writes Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 16/19] cpufreq/amd-pstate: Drop debug statements for policy setting Mario Limonciello
2025-02-19 21:03 ` [PATCH v4 17/19] cpufreq/amd-pstate: Rework CPPC enabling Mario Limonciello
2025-02-24 9:21 ` Dhananjay Ugwekar
2025-02-24 23:59 ` Mario Limonciello
2025-02-25 4:50 ` Dhananjay Ugwekar
2025-02-19 21:03 ` [PATCH v4 18/19] cpufreq/amd-pstate: Stop caching EPP Mario Limonciello
2025-02-19 21:03 ` [PATCH v4 19/19] cpufreq/amd-pstate: Drop amd_pstate_epp_cpu_offline() Mario Limonciello
2025-02-24 9:25 ` Dhananjay Ugwekar
2025-02-24 23:46 ` Mario Limonciello
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