public inbox for linux-kernel@vger.kernel.org
 help / color / mirror / Atom feed
From: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com>
To: Mario Limonciello <superm1@kernel.org>,
	"Gautham R . Shenoy" <gautham.shenoy@amd.com>,
	Perry Yuan <perry.yuan@amd.com>
Cc: "open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
	<linux-kernel@vger.kernel.org>,
	"open list:CPU FREQUENCY SCALING FRAMEWORK"
	<linux-pm@vger.kernel.org>,
	Mario Limonciello <mario.limonciello@amd.com>
Subject: Re: [PATCH v4 05/19] cpufreq/amd-pstate: Overhaul locking
Date: Mon, 24 Feb 2025 10:53:15 +0530	[thread overview]
Message-ID: <6ae8f24e-494f-480d-9d5f-4100f50a6b63@amd.com> (raw)
In-Reply-To: <20250219210302.442954-6-superm1@kernel.org>

On 2/20/2025 2:32 AM, Mario Limonciello wrote:
> From: Mario Limonciello <mario.limonciello@amd.com>
> 
> amd_pstate_cpu_boost_update() and refresh_frequency_limits() both
> update the policy state and have nothing to do with the amd-pstate
> driver itself.
> 
> A global "limits" lock doesn't make sense because each CPU can have
> policies changed independently.  Each time a CPU changes values they
> will atomically be written to the per-CPU perf member. Drop per CPU
> locking cases.
> 
> The remaining "global" driver lock is used to ensure that only one
> entity can change driver modes at a given time.
> 

Reviewed-by: Dhananjay Ugwekar <dhananjay.ugwekar@amd.com>

> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
>  drivers/cpufreq/amd-pstate.c | 13 +++----------
>  1 file changed, 3 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
> index a6066fb4ffb63..85e3daddb56e0 100644
> --- a/drivers/cpufreq/amd-pstate.c
> +++ b/drivers/cpufreq/amd-pstate.c
> @@ -196,7 +196,6 @@ static inline int get_mode_idx_from_str(const char *str, size_t size)
>  	return -EINVAL;
>  }
>  
> -static DEFINE_MUTEX(amd_pstate_limits_lock);
>  static DEFINE_MUTEX(amd_pstate_driver_lock);
>  
>  static u8 msr_get_epp(struct amd_cpudata *cpudata)
> @@ -752,7 +751,6 @@ static int amd_pstate_set_boost(struct cpufreq_policy *policy, int state)
>  		pr_err("Boost mode is not supported by this processor or SBIOS\n");
>  		return -EOPNOTSUPP;
>  	}
> -	guard(mutex)(&amd_pstate_driver_lock);
>  
>  	ret = amd_pstate_cpu_boost_update(policy, state);
>  	refresh_frequency_limits(policy);
> @@ -1175,8 +1173,6 @@ static ssize_t store_energy_performance_preference(
>  	if (ret < 0)
>  		return -EINVAL;
>  
> -	guard(mutex)(&amd_pstate_limits_lock);
> -
>  	ret = amd_pstate_set_energy_pref_index(policy, ret);
>  
>  	return ret ? ret : count;
> @@ -1349,8 +1345,10 @@ int amd_pstate_update_status(const char *buf, size_t size)
>  	if (mode_idx < 0 || mode_idx >= AMD_PSTATE_MAX)
>  		return -EINVAL;
>  
> -	if (mode_state_machine[cppc_state][mode_idx])
> +	if (mode_state_machine[cppc_state][mode_idx]) {
> +		guard(mutex)(&amd_pstate_driver_lock);
>  		return mode_state_machine[cppc_state][mode_idx](mode_idx);
> +	}
>  
>  	return 0;
>  }
> @@ -1371,7 +1369,6 @@ static ssize_t status_store(struct device *a, struct device_attribute *b,
>  	char *p = memchr(buf, '\n', count);
>  	int ret;
>  
> -	guard(mutex)(&amd_pstate_driver_lock);
>  	ret = amd_pstate_update_status(buf, p ? p - buf : count);
>  
>  	return ret < 0 ? ret : count;
> @@ -1643,8 +1640,6 @@ static int amd_pstate_epp_cpu_offline(struct cpufreq_policy *policy)
>  	if (cpudata->suspended)
>  		return 0;
>  
> -	guard(mutex)(&amd_pstate_limits_lock);
> -
>  	if (trace_amd_pstate_epp_perf_enabled()) {
>  		trace_amd_pstate_epp_perf(cpudata->cpu, perf.highest_perf,
>  					  AMD_CPPC_EPP_BALANCE_POWERSAVE,
> @@ -1684,8 +1679,6 @@ static int amd_pstate_epp_resume(struct cpufreq_policy *policy)
>  	struct amd_cpudata *cpudata = policy->driver_data;
>  
>  	if (cpudata->suspended) {
> -		guard(mutex)(&amd_pstate_limits_lock);
> -
>  		/* enable amd pstate from suspend state*/
>  		amd_pstate_epp_reenable(policy);
>  


  reply	other threads:[~2025-02-24  5:23 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-19 21:02 [PATCH v4 00/19] amd-pstate cleanups Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 01/19] cpufreq/amd-pstate: Invalidate cppc_req_cached during suspend Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 02/19] cpufreq/amd-pstate: Show a warning when a CPU fails to setup Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 03/19] cpufreq/amd-pstate: Drop min and max cached frequencies Mario Limonciello
2025-02-24  4:51   ` Dhananjay Ugwekar
2025-02-19 21:02 ` [PATCH v4 04/19] cpufreq/amd-pstate: Move perf values into a union Mario Limonciello
2025-02-24  5:01   ` Dhananjay Ugwekar
2025-02-19 21:02 ` [PATCH v4 05/19] cpufreq/amd-pstate: Overhaul locking Mario Limonciello
2025-02-24  5:23   ` Dhananjay Ugwekar [this message]
2025-02-19 21:02 ` [PATCH v4 06/19] cpufreq/amd-pstate: Drop `cppc_cap1_cached` Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 07/19] cpufreq/amd-pstate-ut: Use _free macro to free put policy Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 08/19] cpufreq/amd-pstate-ut: Allow lowest nonlinear and lowest to be the same Mario Limonciello
2025-02-24  5:26   ` Dhananjay Ugwekar
2025-02-19 21:02 ` [PATCH v4 09/19] cpufreq/amd-pstate-ut: Drop SUCCESS and FAIL enums Mario Limonciello
2025-02-24  6:05   ` Dhananjay Ugwekar
2025-02-25  0:05     ` Mario Limonciello
2025-02-25  4:07       ` Dhananjay Ugwekar
2025-02-19 21:02 ` [PATCH v4 10/19] cpufreq/amd-pstate-ut: Run on all of the correct CPUs Mario Limonciello
2025-02-24  6:09   ` Dhananjay Ugwekar
2025-02-19 21:02 ` [PATCH v4 11/19] cpufreq/amd-pstate-ut: Adjust variable scope for amd_pstate_ut_check_freq() Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 12/19] cpufreq/amd-pstate: Replace all AMD_CPPC_* macros with masks Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 13/19] cpufreq/amd-pstate: Cache CPPC request in shared mem case too Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 14/19] cpufreq/amd-pstate: Move all EPP tracing into *_update_perf and *_set_epp functions Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 15/19] cpufreq/amd-pstate: Update cppc_req_cached for shared mem EPP writes Mario Limonciello
2025-02-19 21:02 ` [PATCH v4 16/19] cpufreq/amd-pstate: Drop debug statements for policy setting Mario Limonciello
2025-02-19 21:03 ` [PATCH v4 17/19] cpufreq/amd-pstate: Rework CPPC enabling Mario Limonciello
2025-02-24  9:21   ` Dhananjay Ugwekar
2025-02-24 23:59     ` Mario Limonciello
2025-02-25  4:50       ` Dhananjay Ugwekar
2025-02-19 21:03 ` [PATCH v4 18/19] cpufreq/amd-pstate: Stop caching EPP Mario Limonciello
2025-02-19 21:03 ` [PATCH v4 19/19] cpufreq/amd-pstate: Drop amd_pstate_epp_cpu_offline() Mario Limonciello
2025-02-24  9:25   ` Dhananjay Ugwekar
2025-02-24 23:46     ` Mario Limonciello

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=6ae8f24e-494f-480d-9d5f-4100f50a6b63@amd.com \
    --to=dhananjay.ugwekar@amd.com \
    --cc=gautham.shenoy@amd.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=mario.limonciello@amd.com \
    --cc=perry.yuan@amd.com \
    --cc=superm1@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox