[PATCH v2 0/4] mfd: lpc_sch: Intel Quark support

[PATCH v2 0/4] mfd: lpc_sch: Intel Quark support

[Andy Shevchenko]

This brings support of the LPC SCH device found on Intel Quark SoC. Patches
were compile tested, and driver runs on actual hardware.

Please, note that PCI ID will be used in future in the gpio-sch driver.

Changelog v2:
- squash patches 1/5 and 2/5 into 1/4
- add Acked-by Bjorn
- address Lee's comments against 3/4 (former 4/5)
- rebase on newest linux-next

Andy Shevchenko (3):
  mfd: lpc_sch: reduce duplicate code and improve manageability
  mfd: lpc_sch: Add support for Intel Quark X1000
  mfd: lpc_sch: remove FSF address

Josef Ahmad (1):
  pci_ids: add support for Intel Quark ILB

 drivers/mfd/lpc_sch.c   | 211 ++++++++++++++++++++++++++++--------------------
 include/linux/pci_ids.h |   1 +
 2 files changed, 126 insertions(+), 86 deletions(-)

-- 
2.1.0

[PATCH v2 1/4] mfd: lpc_sch: reduce duplicate code and improve manageability

[Andy Shevchenko]

This patch refactors the driver to use helper functions instead of
copy'n'pasted pieces of code.

It also introduces an additional struct to hold a chipset info. The chipset
info will be used to store features that are supported by specific processor or
chipset. LPC_SCH supports SMBUS, GPIO and WDT features. As this code base might
expand further to support more processors, this implementation will help to
keep code base clean and manageable.

The patch is partially based on the work done by Chang Rebecca Swee Fun.

Tested-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/mfd/lpc_sch.c | 181 +++++++++++++++++++++++++++-----------------------
 1 file changed, 99 insertions(+), 82 deletions(-)

diff --git a/drivers/mfd/lpc_sch.c b/drivers/mfd/lpc_sch.c
index 4ee7550..bde070a 100644
--- a/drivers/mfd/lpc_sch.c
+++ b/drivers/mfd/lpc_sch.c
@@ -40,120 +40,137 @@
 #define WDTBASE		0x84
 #define WDT_IO_SIZE	64
 
-static struct resource smbus_sch_resource = {
-		.flags = IORESOURCE_IO,
+enum sch_chipsets {
+	LPC_SCH = 0,		/* Intel Poulsbo SCH */
+	LPC_ITC,		/* Intel Tunnel Creek */
+	LPC_CENTERTON,		/* Intel Centerton */
 };
 
-static struct resource gpio_sch_resource = {
-		.flags = IORESOURCE_IO,
+struct lpc_sch_info {
+	unsigned int io_size_smbus;
+	unsigned int io_size_gpio;
+	unsigned int io_size_wdt;
 };
 
-static struct resource wdt_sch_resource = {
-		.flags = IORESOURCE_IO,
-};
-
-static struct mfd_cell lpc_sch_cells[3];
-
-static struct mfd_cell isch_smbus_cell = {
-	.name = "isch_smbus",
-	.num_resources = 1,
-	.resources = &smbus_sch_resource,
-	.ignore_resource_conflicts = true,
-};
-
-static struct mfd_cell sch_gpio_cell = {
-	.name = "sch_gpio",
-	.num_resources = 1,
-	.resources = &gpio_sch_resource,
-	.ignore_resource_conflicts = true,
-};
-
-static struct mfd_cell wdt_sch_cell = {
-	.name = "ie6xx_wdt",
-	.num_resources = 1,
-	.resources = &wdt_sch_resource,
-	.ignore_resource_conflicts = true,
+static struct lpc_sch_info sch_chipset_info[] = {
+	[LPC_SCH] = {
+		.io_size_smbus = SMBUS_IO_SIZE,
+		.io_size_gpio = GPIO_IO_SIZE,
+	},
+	[LPC_ITC] = {
+		.io_size_smbus = SMBUS_IO_SIZE,
+		.io_size_gpio = GPIO_IO_SIZE,
+		.io_size_wdt = WDT_IO_SIZE,
+	},
+	[LPC_CENTERTON] = {
+		.io_size_smbus = SMBUS_IO_SIZE,
+		.io_size_gpio = GPIO_IO_SIZE_CENTERTON,
+		.io_size_wdt = WDT_IO_SIZE,
+	},
 };
 
 static const struct pci_device_id lpc_sch_ids[] = {
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB) },
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC), LPC_SCH },
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC), LPC_ITC },
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB), LPC_CENTERTON },
 	{ 0, }
 };
 MODULE_DEVICE_TABLE(pci, lpc_sch_ids);
 
-static int lpc_sch_probe(struct pci_dev *dev,
-				const struct pci_device_id *id)
+#define LPC_NO_RESOURCE		1
+#define LPC_SKIP_RESOURCE	2
+
+static int lpc_sch_get_io(struct pci_dev *pdev, int where, const char *name,
+			  struct resource *res, int size)
 {
 	unsigned int base_addr_cfg;
 	unsigned short base_addr;
-	int i, cells = 0;
-	int ret;
 
-	pci_read_config_dword(dev, SMBASE, &base_addr_cfg);
+	if (size == 0)
+		return LPC_NO_RESOURCE;
+
+	pci_read_config_dword(pdev, where, &base_addr_cfg);
 	base_addr = 0;
 	if (!(base_addr_cfg & (1 << 31)))
-		dev_warn(&dev->dev, "Decode of the SMBus I/O range disabled\n");
+		dev_warn(&pdev->dev, "Decode of the %s I/O range disabled\n",
+			 name);
 	else
 		base_addr = (unsigned short)base_addr_cfg;
 
 	if (base_addr == 0) {
-		dev_warn(&dev->dev, "I/O space for SMBus uninitialized\n");
-	} else {
-		lpc_sch_cells[cells++] = isch_smbus_cell;
-		smbus_sch_resource.start = base_addr;
-		smbus_sch_resource.end = base_addr + SMBUS_IO_SIZE - 1;
+		dev_warn(&pdev->dev, "I/O space for %s uninitialized\n", name);
+		return LPC_SKIP_RESOURCE;
 	}
 
-	pci_read_config_dword(dev, GPIOBASE, &base_addr_cfg);
-	base_addr = 0;
-	if (!(base_addr_cfg & (1 << 31)))
-		dev_warn(&dev->dev, "Decode of the GPIO I/O range disabled\n");
-	else
-		base_addr = (unsigned short)base_addr_cfg;
+	res->start = base_addr;
+	res->end = base_addr + size - 1;
+	res->flags = IORESOURCE_IO;
 
-	if (base_addr == 0) {
-		dev_warn(&dev->dev, "I/O space for GPIO uninitialized\n");
-	} else {
-		lpc_sch_cells[cells++] = sch_gpio_cell;
-		gpio_sch_resource.start = base_addr;
-		if (id->device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB)
-			gpio_sch_resource.end = base_addr + GPIO_IO_SIZE_CENTERTON - 1;
-		else
-			gpio_sch_resource.end = base_addr + GPIO_IO_SIZE - 1;
-	}
+	return 0;
+}
 
-	if (id->device == PCI_DEVICE_ID_INTEL_ITC_LPC
-	    || id->device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB) {
-		pci_read_config_dword(dev, WDTBASE, &base_addr_cfg);
-		base_addr = 0;
-		if (!(base_addr_cfg & (1 << 31)))
-			dev_warn(&dev->dev, "Decode of the WDT I/O range disabled\n");
-		else
-			base_addr = (unsigned short)base_addr_cfg;
-		if (base_addr == 0)
-			dev_warn(&dev->dev, "I/O space for WDT uninitialized\n");
-		else {
-			lpc_sch_cells[cells++] = wdt_sch_cell;
-			wdt_sch_resource.start = base_addr;
-			wdt_sch_resource.end = base_addr + WDT_IO_SIZE - 1;
-		}
-	}
+static int lpc_sch_populate_cell(struct pci_dev *pdev, int where,
+				 const char *name, int size, int id,
+				 struct mfd_cell *cell)
+{
+	struct resource *res;
+	int ret;
 
-	if (WARN_ON(cells > ARRAY_SIZE(lpc_sch_cells))) {
-		dev_err(&dev->dev, "Cell count exceeds array size");
-		return -ENODEV;
-	}
+	res = devm_kzalloc(&pdev->dev, sizeof(*res), GFP_KERNEL);
+	if (!res)
+		return -ENOMEM;
+
+	ret = lpc_sch_get_io(pdev, where, name, res, size);
+	if (ret)
+		return ret;
+
+	memset(cell, 0, sizeof(*cell));
+
+	cell->name = name;
+	cell->resources = res;
+	cell->num_resources = 1;
+	cell->ignore_resource_conflicts = true;
+	cell->id = id;
+
+	return 0;
+}
+
+static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
+{
+	struct mfd_cell lpc_sch_cells[3];
+	struct lpc_sch_info *info = &sch_chipset_info[id->driver_data];
+	unsigned int cells = 0;
+	int ret;
+
+	ret = lpc_sch_populate_cell(dev, SMBASE, "isch_smbus",
+				    info->io_size_smbus,
+				    id->device, &lpc_sch_cells[cells]);
+	if (ret < 0)
+		return ret;
+	if (ret == 0)
+		cells++;
+
+	ret = lpc_sch_populate_cell(dev, GPIOBASE, "sch_gpio",
+				    info->io_size_gpio,
+				    id->device, &lpc_sch_cells[cells]);
+	if (ret < 0)
+		return ret;
+	if (ret == 0)
+		cells++;
+
+	ret = lpc_sch_populate_cell(dev, WDTBASE, "ie6xx_wdt",
+				    info->io_size_wdt,
+				    id->device, &lpc_sch_cells[cells]);
+	if (ret < 0)
+		return ret;
+	if (ret == 0)
+		cells++;
 
 	if (cells == 0) {
 		dev_err(&dev->dev, "All decode registers disabled.\n");
 		return -ENODEV;
 	}
 
-	for (i = 0; i < cells; i++)
-		lpc_sch_cells[i].id = id->device;
-
 	ret = mfd_add_devices(&dev->dev, 0, lpc_sch_cells, cells, NULL, 0, NULL);
 	if (ret)
 		mfd_remove_devices(&dev->dev);
-- 
2.1.0

Re: [PATCH v2 1/4] mfd: lpc_sch: reduce duplicate code and improve manageability

[Lee Jones]

On Tue, 02 Sep 2014, Andy Shevchenko wrote:

> This patch refactors the driver to use helper functions instead of
> copy'n'pasted pieces of code.
> 
> It also introduces an additional struct to hold a chipset info. The chipset
> info will be used to store features that are supported by specific processor or
> chipset. LPC_SCH supports SMBUS, GPIO and WDT features. As this code base might
> expand further to support more processors, this implementation will help to
> keep code base clean and manageable.
> 
> The patch is partially based on the work done by Chang Rebecca Swee Fun.
> 
> Tested-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> ---
>  drivers/mfd/lpc_sch.c | 181 +++++++++++++++++++++++++++-----------------------
>  1 file changed, 99 insertions(+), 82 deletions(-)

Applied, thanks.

> diff --git a/drivers/mfd/lpc_sch.c b/drivers/mfd/lpc_sch.c
> index 4ee7550..bde070a 100644
> --- a/drivers/mfd/lpc_sch.c
> +++ b/drivers/mfd/lpc_sch.c
> @@ -40,120 +40,137 @@
>  #define WDTBASE		0x84
>  #define WDT_IO_SIZE	64
>  
> -static struct resource smbus_sch_resource = {
> -		.flags = IORESOURCE_IO,
> +enum sch_chipsets {
> +	LPC_SCH = 0,		/* Intel Poulsbo SCH */
> +	LPC_ITC,		/* Intel Tunnel Creek */
> +	LPC_CENTERTON,		/* Intel Centerton */
>  };
>  
> -static struct resource gpio_sch_resource = {
> -		.flags = IORESOURCE_IO,
> +struct lpc_sch_info {
> +	unsigned int io_size_smbus;
> +	unsigned int io_size_gpio;
> +	unsigned int io_size_wdt;
>  };
>  
> -static struct resource wdt_sch_resource = {
> -		.flags = IORESOURCE_IO,
> -};
> -
> -static struct mfd_cell lpc_sch_cells[3];
> -
> -static struct mfd_cell isch_smbus_cell = {
> -	.name = "isch_smbus",
> -	.num_resources = 1,
> -	.resources = &smbus_sch_resource,
> -	.ignore_resource_conflicts = true,
> -};
> -
> -static struct mfd_cell sch_gpio_cell = {
> -	.name = "sch_gpio",
> -	.num_resources = 1,
> -	.resources = &gpio_sch_resource,
> -	.ignore_resource_conflicts = true,
> -};
> -
> -static struct mfd_cell wdt_sch_cell = {
> -	.name = "ie6xx_wdt",
> -	.num_resources = 1,
> -	.resources = &wdt_sch_resource,
> -	.ignore_resource_conflicts = true,
> +static struct lpc_sch_info sch_chipset_info[] = {
> +	[LPC_SCH] = {
> +		.io_size_smbus = SMBUS_IO_SIZE,
> +		.io_size_gpio = GPIO_IO_SIZE,
> +	},
> +	[LPC_ITC] = {
> +		.io_size_smbus = SMBUS_IO_SIZE,
> +		.io_size_gpio = GPIO_IO_SIZE,
> +		.io_size_wdt = WDT_IO_SIZE,
> +	},
> +	[LPC_CENTERTON] = {
> +		.io_size_smbus = SMBUS_IO_SIZE,
> +		.io_size_gpio = GPIO_IO_SIZE_CENTERTON,
> +		.io_size_wdt = WDT_IO_SIZE,
> +	},
>  };
>  
>  static const struct pci_device_id lpc_sch_ids[] = {
> -	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC) },
> -	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC) },
> -	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB) },
> +	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC), LPC_SCH },
> +	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC), LPC_ITC },
> +	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB), LPC_CENTERTON },
>  	{ 0, }
>  };
>  MODULE_DEVICE_TABLE(pci, lpc_sch_ids);
>  
> -static int lpc_sch_probe(struct pci_dev *dev,
> -				const struct pci_device_id *id)
> +#define LPC_NO_RESOURCE		1
> +#define LPC_SKIP_RESOURCE	2
> +
> +static int lpc_sch_get_io(struct pci_dev *pdev, int where, const char *name,
> +			  struct resource *res, int size)
>  {
>  	unsigned int base_addr_cfg;
>  	unsigned short base_addr;
> -	int i, cells = 0;
> -	int ret;
>  
> -	pci_read_config_dword(dev, SMBASE, &base_addr_cfg);
> +	if (size == 0)
> +		return LPC_NO_RESOURCE;
> +
> +	pci_read_config_dword(pdev, where, &base_addr_cfg);
>  	base_addr = 0;
>  	if (!(base_addr_cfg & (1 << 31)))
> -		dev_warn(&dev->dev, "Decode of the SMBus I/O range disabled\n");
> +		dev_warn(&pdev->dev, "Decode of the %s I/O range disabled\n",
> +			 name);
>  	else
>  		base_addr = (unsigned short)base_addr_cfg;
>  
>  	if (base_addr == 0) {
> -		dev_warn(&dev->dev, "I/O space for SMBus uninitialized\n");
> -	} else {
> -		lpc_sch_cells[cells++] = isch_smbus_cell;
> -		smbus_sch_resource.start = base_addr;
> -		smbus_sch_resource.end = base_addr + SMBUS_IO_SIZE - 1;
> +		dev_warn(&pdev->dev, "I/O space for %s uninitialized\n", name);
> +		return LPC_SKIP_RESOURCE;
>  	}
>  
> -	pci_read_config_dword(dev, GPIOBASE, &base_addr_cfg);
> -	base_addr = 0;
> -	if (!(base_addr_cfg & (1 << 31)))
> -		dev_warn(&dev->dev, "Decode of the GPIO I/O range disabled\n");
> -	else
> -		base_addr = (unsigned short)base_addr_cfg;
> +	res->start = base_addr;
> +	res->end = base_addr + size - 1;
> +	res->flags = IORESOURCE_IO;
>  
> -	if (base_addr == 0) {
> -		dev_warn(&dev->dev, "I/O space for GPIO uninitialized\n");
> -	} else {
> -		lpc_sch_cells[cells++] = sch_gpio_cell;
> -		gpio_sch_resource.start = base_addr;
> -		if (id->device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB)
> -			gpio_sch_resource.end = base_addr + GPIO_IO_SIZE_CENTERTON - 1;
> -		else
> -			gpio_sch_resource.end = base_addr + GPIO_IO_SIZE - 1;
> -	}
> +	return 0;
> +}
>  
> -	if (id->device == PCI_DEVICE_ID_INTEL_ITC_LPC
> -	    || id->device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB) {
> -		pci_read_config_dword(dev, WDTBASE, &base_addr_cfg);
> -		base_addr = 0;
> -		if (!(base_addr_cfg & (1 << 31)))
> -			dev_warn(&dev->dev, "Decode of the WDT I/O range disabled\n");
> -		else
> -			base_addr = (unsigned short)base_addr_cfg;
> -		if (base_addr == 0)
> -			dev_warn(&dev->dev, "I/O space for WDT uninitialized\n");
> -		else {
> -			lpc_sch_cells[cells++] = wdt_sch_cell;
> -			wdt_sch_resource.start = base_addr;
> -			wdt_sch_resource.end = base_addr + WDT_IO_SIZE - 1;
> -		}
> -	}
> +static int lpc_sch_populate_cell(struct pci_dev *pdev, int where,
> +				 const char *name, int size, int id,
> +				 struct mfd_cell *cell)
> +{
> +	struct resource *res;
> +	int ret;
>  
> -	if (WARN_ON(cells > ARRAY_SIZE(lpc_sch_cells))) {
> -		dev_err(&dev->dev, "Cell count exceeds array size");
> -		return -ENODEV;
> -	}
> +	res = devm_kzalloc(&pdev->dev, sizeof(*res), GFP_KERNEL);
> +	if (!res)
> +		return -ENOMEM;
> +
> +	ret = lpc_sch_get_io(pdev, where, name, res, size);
> +	if (ret)
> +		return ret;
> +
> +	memset(cell, 0, sizeof(*cell));
> +
> +	cell->name = name;
> +	cell->resources = res;
> +	cell->num_resources = 1;
> +	cell->ignore_resource_conflicts = true;
> +	cell->id = id;
> +
> +	return 0;
> +}
> +
> +static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
> +{
> +	struct mfd_cell lpc_sch_cells[3];
> +	struct lpc_sch_info *info = &sch_chipset_info[id->driver_data];
> +	unsigned int cells = 0;
> +	int ret;
> +
> +	ret = lpc_sch_populate_cell(dev, SMBASE, "isch_smbus",
> +				    info->io_size_smbus,
> +				    id->device, &lpc_sch_cells[cells]);
> +	if (ret < 0)
> +		return ret;
> +	if (ret == 0)
> +		cells++;
> +
> +	ret = lpc_sch_populate_cell(dev, GPIOBASE, "sch_gpio",
> +				    info->io_size_gpio,
> +				    id->device, &lpc_sch_cells[cells]);
> +	if (ret < 0)
> +		return ret;
> +	if (ret == 0)
> +		cells++;
> +
> +	ret = lpc_sch_populate_cell(dev, WDTBASE, "ie6xx_wdt",
> +				    info->io_size_wdt,
> +				    id->device, &lpc_sch_cells[cells]);
> +	if (ret < 0)
> +		return ret;
> +	if (ret == 0)
> +		cells++;
>  
>  	if (cells == 0) {
>  		dev_err(&dev->dev, "All decode registers disabled.\n");
>  		return -ENODEV;
>  	}
>  
> -	for (i = 0; i < cells; i++)
> -		lpc_sch_cells[i].id = id->device;
> -
>  	ret = mfd_add_devices(&dev->dev, 0, lpc_sch_cells, cells, NULL, 0, NULL);
>  	if (ret)
>  		mfd_remove_devices(&dev->dev);

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

[PATCH v2 2/4] pci_ids: add support for Intel Quark ILB

[Andy Shevchenko]

From: Josef Ahmad <josef.ahmad@intel.com>

This patch adds the PCI id for Intel Quark ILB.
It will be used for GPIO and Multifunction device driver.

Signed-off-by: Josef Ahmad <josef.ahmad@intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 include/linux/pci_ids.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 6ed0bb7..4e82195 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2557,6 +2557,7 @@
 #define PCI_DEVICE_ID_INTEL_MFD_EMMC0	0x0823
 #define PCI_DEVICE_ID_INTEL_MFD_EMMC1	0x0824
 #define PCI_DEVICE_ID_INTEL_MRST_SD2	0x084F
+#define PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB	0x095E
 #define PCI_DEVICE_ID_INTEL_I960	0x0960
 #define PCI_DEVICE_ID_INTEL_I960RM	0x0962
 #define PCI_DEVICE_ID_INTEL_CENTERTON_ILB	0x0c60
-- 
2.1.0

Re: [PATCH v2 2/4] pci_ids: add support for Intel Quark ILB

[Lee Jones]

On Tue, 02 Sep 2014, Andy Shevchenko wrote:

> From: Josef Ahmad <josef.ahmad@intel.com>
> 
> This patch adds the PCI id for Intel Quark ILB.
> It will be used for GPIO and Multifunction device driver.
> 
> Signed-off-by: Josef Ahmad <josef.ahmad@intel.com>
> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> ---
>  include/linux/pci_ids.h | 1 +
>  1 file changed, 1 insertion(+)

Applied, thanks.

> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index 6ed0bb7..4e82195 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -2557,6 +2557,7 @@
>  #define PCI_DEVICE_ID_INTEL_MFD_EMMC0	0x0823
>  #define PCI_DEVICE_ID_INTEL_MFD_EMMC1	0x0824
>  #define PCI_DEVICE_ID_INTEL_MRST_SD2	0x084F
> +#define PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB	0x095E
>  #define PCI_DEVICE_ID_INTEL_I960	0x0960
>  #define PCI_DEVICE_ID_INTEL_I960RM	0x0962
>  #define PCI_DEVICE_ID_INTEL_CENTERTON_ILB	0x0c60

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

[PATCH v2 3/4] mfd: lpc_sch: Add support for Intel Quark X1000

[Andy Shevchenko]

Intel Quark X1000 SoC supports IRQ based GPIO. This patch will
enable MFD support for Quark X1000 and provide IRQ resources
to Quark X1000 GPIO device driver.

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
Tested-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/mfd/lpc_sch.c | 37 +++++++++++++++++++++++++++++++------
 1 file changed, 31 insertions(+), 6 deletions(-)

diff --git a/drivers/mfd/lpc_sch.c b/drivers/mfd/lpc_sch.c
index bde070a..ae614b2 100644
--- a/drivers/mfd/lpc_sch.c
+++ b/drivers/mfd/lpc_sch.c
@@ -37,6 +37,9 @@
 #define GPIO_IO_SIZE	64
 #define GPIO_IO_SIZE_CENTERTON	128
 
+/* Intel Quark X1000 GPIO IRQ Number */
+#define GPIO_IRQ_QUARK_X1000	9
+
 #define WDTBASE		0x84
 #define WDT_IO_SIZE	64
 
@@ -44,28 +47,37 @@ enum sch_chipsets {
 	LPC_SCH = 0,		/* Intel Poulsbo SCH */
 	LPC_ITC,		/* Intel Tunnel Creek */
 	LPC_CENTERTON,		/* Intel Centerton */
+	LPC_QUARK_X1000,	/* Intel Quark X1000 */
 };
 
 struct lpc_sch_info {
 	unsigned int io_size_smbus;
 	unsigned int io_size_gpio;
 	unsigned int io_size_wdt;
+	int irq_gpio;
 };
 
 static struct lpc_sch_info sch_chipset_info[] = {
 	[LPC_SCH] = {
 		.io_size_smbus = SMBUS_IO_SIZE,
 		.io_size_gpio = GPIO_IO_SIZE,
+		.irq_gpio = -1,
 	},
 	[LPC_ITC] = {
 		.io_size_smbus = SMBUS_IO_SIZE,
 		.io_size_gpio = GPIO_IO_SIZE,
 		.io_size_wdt = WDT_IO_SIZE,
+		.irq_gpio = -1,
 	},
 	[LPC_CENTERTON] = {
 		.io_size_smbus = SMBUS_IO_SIZE,
 		.io_size_gpio = GPIO_IO_SIZE_CENTERTON,
 		.io_size_wdt = WDT_IO_SIZE,
+		.irq_gpio = -1,
+	},
+	[LPC_QUARK_X1000] = {
+		.io_size_gpio = GPIO_IO_SIZE,
+		.irq_gpio = GPIO_IRQ_QUARK_X1000,
 	},
 };
 
@@ -73,6 +85,7 @@ static const struct pci_device_id lpc_sch_ids[] = {
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC), LPC_SCH },
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC), LPC_ITC },
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB), LPC_CENTERTON },
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB), LPC_QUARK_X1000 },
 	{ 0, }
 };
 MODULE_DEVICE_TABLE(pci, lpc_sch_ids);
@@ -110,13 +123,13 @@ static int lpc_sch_get_io(struct pci_dev *pdev, int where, const char *name,
 }
 
 static int lpc_sch_populate_cell(struct pci_dev *pdev, int where,
-				 const char *name, int size, int id,
-				 struct mfd_cell *cell)
+				 const char *name, int size, int irq,
+				 int id, struct mfd_cell *cell)
 {
 	struct resource *res;
 	int ret;
 
-	res = devm_kzalloc(&pdev->dev, sizeof(*res), GFP_KERNEL);
+	res = devm_kcalloc(&pdev->dev, 2, sizeof(*res), GFP_KERNEL);
 	if (!res)
 		return -ENOMEM;
 
@@ -132,6 +145,18 @@ static int lpc_sch_populate_cell(struct pci_dev *pdev, int where,
 	cell->ignore_resource_conflicts = true;
 	cell->id = id;
 
+	/* Check if we need to add an IRQ resource */
+	if (irq < 0)
+		return 0;
+
+	res++;
+
+	res->start = irq;
+	res->end = irq;
+	res->flags = IORESOURCE_IRQ;
+
+	cell->num_resources++;
+
 	return 0;
 }
 
@@ -143,7 +168,7 @@ static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
 	int ret;
 
 	ret = lpc_sch_populate_cell(dev, SMBASE, "isch_smbus",
-				    info->io_size_smbus,
+				    info->io_size_smbus, -1,
 				    id->device, &lpc_sch_cells[cells]);
 	if (ret < 0)
 		return ret;
@@ -151,7 +176,7 @@ static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
 		cells++;
 
 	ret = lpc_sch_populate_cell(dev, GPIOBASE, "sch_gpio",
-				    info->io_size_gpio,
+				    info->io_size_gpio, info->irq_gpio,
 				    id->device, &lpc_sch_cells[cells]);
 	if (ret < 0)
 		return ret;
@@ -159,7 +184,7 @@ static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
 		cells++;
 
 	ret = lpc_sch_populate_cell(dev, WDTBASE, "ie6xx_wdt",
-				    info->io_size_wdt,
+				    info->io_size_wdt, -1,
 				    id->device, &lpc_sch_cells[cells]);
 	if (ret < 0)
 		return ret;
-- 
2.1.0

Re: [PATCH v2 3/4] mfd: lpc_sch: Add support for Intel Quark X1000

[Lee Jones]

On Tue, 02 Sep 2014, Andy Shevchenko wrote:

> Intel Quark X1000 SoC supports IRQ based GPIO. This patch will
> enable MFD support for Quark X1000 and provide IRQ resources
> to Quark X1000 GPIO device driver.
> 
> Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
> Tested-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> ---
>  drivers/mfd/lpc_sch.c | 37 +++++++++++++++++++++++++++++++------
>  1 file changed, 31 insertions(+), 6 deletions(-)

Applied, thanks.

> diff --git a/drivers/mfd/lpc_sch.c b/drivers/mfd/lpc_sch.c
> index bde070a..ae614b2 100644
> --- a/drivers/mfd/lpc_sch.c
> +++ b/drivers/mfd/lpc_sch.c
> @@ -37,6 +37,9 @@
>  #define GPIO_IO_SIZE	64
>  #define GPIO_IO_SIZE_CENTERTON	128
>  
> +/* Intel Quark X1000 GPIO IRQ Number */
> +#define GPIO_IRQ_QUARK_X1000	9
> +
>  #define WDTBASE		0x84
>  #define WDT_IO_SIZE	64
>  
> @@ -44,28 +47,37 @@ enum sch_chipsets {
>  	LPC_SCH = 0,		/* Intel Poulsbo SCH */
>  	LPC_ITC,		/* Intel Tunnel Creek */
>  	LPC_CENTERTON,		/* Intel Centerton */
> +	LPC_QUARK_X1000,	/* Intel Quark X1000 */
>  };
>  
>  struct lpc_sch_info {
>  	unsigned int io_size_smbus;
>  	unsigned int io_size_gpio;
>  	unsigned int io_size_wdt;
> +	int irq_gpio;
>  };
>  
>  static struct lpc_sch_info sch_chipset_info[] = {
>  	[LPC_SCH] = {
>  		.io_size_smbus = SMBUS_IO_SIZE,
>  		.io_size_gpio = GPIO_IO_SIZE,
> +		.irq_gpio = -1,
>  	},
>  	[LPC_ITC] = {
>  		.io_size_smbus = SMBUS_IO_SIZE,
>  		.io_size_gpio = GPIO_IO_SIZE,
>  		.io_size_wdt = WDT_IO_SIZE,
> +		.irq_gpio = -1,
>  	},
>  	[LPC_CENTERTON] = {
>  		.io_size_smbus = SMBUS_IO_SIZE,
>  		.io_size_gpio = GPIO_IO_SIZE_CENTERTON,
>  		.io_size_wdt = WDT_IO_SIZE,
> +		.irq_gpio = -1,
> +	},
> +	[LPC_QUARK_X1000] = {
> +		.io_size_gpio = GPIO_IO_SIZE,
> +		.irq_gpio = GPIO_IRQ_QUARK_X1000,
>  	},
>  };
>  
> @@ -73,6 +85,7 @@ static const struct pci_device_id lpc_sch_ids[] = {
>  	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC), LPC_SCH },
>  	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC), LPC_ITC },
>  	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB), LPC_CENTERTON },
> +	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB), LPC_QUARK_X1000 },
>  	{ 0, }
>  };
>  MODULE_DEVICE_TABLE(pci, lpc_sch_ids);
> @@ -110,13 +123,13 @@ static int lpc_sch_get_io(struct pci_dev *pdev, int where, const char *name,
>  }
>  
>  static int lpc_sch_populate_cell(struct pci_dev *pdev, int where,
> -				 const char *name, int size, int id,
> -				 struct mfd_cell *cell)
> +				 const char *name, int size, int irq,
> +				 int id, struct mfd_cell *cell)
>  {
>  	struct resource *res;
>  	int ret;
>  
> -	res = devm_kzalloc(&pdev->dev, sizeof(*res), GFP_KERNEL);
> +	res = devm_kcalloc(&pdev->dev, 2, sizeof(*res), GFP_KERNEL);
>  	if (!res)
>  		return -ENOMEM;
>  
> @@ -132,6 +145,18 @@ static int lpc_sch_populate_cell(struct pci_dev *pdev, int where,
>  	cell->ignore_resource_conflicts = true;
>  	cell->id = id;
>  
> +	/* Check if we need to add an IRQ resource */
> +	if (irq < 0)
> +		return 0;
> +
> +	res++;
> +
> +	res->start = irq;
> +	res->end = irq;
> +	res->flags = IORESOURCE_IRQ;
> +
> +	cell->num_resources++;
> +
>  	return 0;
>  }
>  
> @@ -143,7 +168,7 @@ static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
>  	int ret;
>  
>  	ret = lpc_sch_populate_cell(dev, SMBASE, "isch_smbus",
> -				    info->io_size_smbus,
> +				    info->io_size_smbus, -1,
>  				    id->device, &lpc_sch_cells[cells]);
>  	if (ret < 0)
>  		return ret;
> @@ -151,7 +176,7 @@ static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
>  		cells++;
>  
>  	ret = lpc_sch_populate_cell(dev, GPIOBASE, "sch_gpio",
> -				    info->io_size_gpio,
> +				    info->io_size_gpio, info->irq_gpio,
>  				    id->device, &lpc_sch_cells[cells]);
>  	if (ret < 0)
>  		return ret;
> @@ -159,7 +184,7 @@ static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
>  		cells++;
>  
>  	ret = lpc_sch_populate_cell(dev, WDTBASE, "ie6xx_wdt",
> -				    info->io_size_wdt,
> +				    info->io_size_wdt, -1,
>  				    id->device, &lpc_sch_cells[cells]);
>  	if (ret < 0)
>  		return ret;

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

[PATCH v2 4/4] mfd: lpc_sch: remove FSF address

[Andy Shevchenko]

This patch removes FSF address because it can be changed. While here, update
the copyright lines by adding Intel Corp. to them.

There is no functional change.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/mfd/lpc_sch.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/mfd/lpc_sch.c b/drivers/mfd/lpc_sch.c
index ae614b2..c980da4 100644
--- a/drivers/mfd/lpc_sch.c
+++ b/drivers/mfd/lpc_sch.c
@@ -7,6 +7,7 @@
  *  Configuration Registers.
  *
  *  Copyright (c) 2010 CompuLab Ltd
+ *  Copyright (c) 2014 Intel Corp.
  *  Author: Denis Turischev <denis@compulab.co.il>
  *
  *  This program is free software; you can redistribute it and/or modify
@@ -17,10 +18,6 @@
  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; see the file COPYING.  If not, write to
- *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <linux/kernel.h>
-- 
2.1.0

Re: [PATCH v2 4/4] mfd: lpc_sch: remove FSF address

[Lee Jones]

On Tue, 02 Sep 2014, Andy Shevchenko wrote:

> This patch removes FSF address because it can be changed. While here, update
> the copyright lines by adding Intel Corp. to them.
> 
> There is no functional change.
> 
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> ---
>  drivers/mfd/lpc_sch.c | 5 +----
>  1 file changed, 1 insertion(+), 4 deletions(-)

Applied, thanks.

> diff --git a/drivers/mfd/lpc_sch.c b/drivers/mfd/lpc_sch.c
> index ae614b2..c980da4 100644
> --- a/drivers/mfd/lpc_sch.c
> +++ b/drivers/mfd/lpc_sch.c
> @@ -7,6 +7,7 @@
>   *  Configuration Registers.
>   *
>   *  Copyright (c) 2010 CompuLab Ltd
> + *  Copyright (c) 2014 Intel Corp.
>   *  Author: Denis Turischev <denis@compulab.co.il>
>   *
>   *  This program is free software; you can redistribute it and/or modify
> @@ -17,10 +18,6 @@
>   *  but WITHOUT ANY WARRANTY; without even the implied warranty of
>   *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>   *  GNU General Public License for more details.
> - *
> - *  You should have received a copy of the GNU General Public License
> - *  along with this program; see the file COPYING.  If not, write to
> - *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
>   */
>  
>  #include <linux/kernel.h>

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog