* [PATCH v2 1/3] dt-bindings: net: Convert fsl,gianfar-{mdio,tbi} to YAML
2025-02-28 17:32 [PATCH v2 0/3] net: Convert Gianfar (Triple Speed Ethernet Controller) bindings to YAML J. Neuschäfer via B4 Relay
@ 2025-02-28 17:32 ` J. Neuschäfer via B4 Relay
2025-02-28 22:02 ` Rob Herring (Arm)
2025-02-28 17:32 ` [PATCH v2 2/3] dt-bindings: net: fsl,gianfar-mdio: Update information about TBI J. Neuschäfer via B4 Relay
` (2 subsequent siblings)
3 siblings, 1 reply; 7+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-28 17:32 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Claudiu Manoil
Cc: netdev, devicetree, linux-kernel, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Move the information related to the Freescale Gianfar (TSEC) MDIO bus
and the Ten-Bit Interface (TBI) from fsl-tsec-phy.txt to a new binding
file in YAML format, fsl,gianfar-mdio.yaml.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- remove definitions of #address/size-cells (already in mdio.yaml)
- disambiguate compatible = "gianfar" schemas by using a "select:" schema
---
.../devicetree/bindings/net/fsl,gianfar-mdio.yaml | 113 +++++++++++++++++++++
.../devicetree/bindings/net/fsl-tsec-phy.txt | 41 +-------
2 files changed, 115 insertions(+), 39 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml b/Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..22369771c13614875845b6d6e6d6031b933cb152
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml
@@ -0,0 +1,113 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/fsl,gianfar-mdio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale Gianfar (TSEC) MDIO Device
+
+description:
+ This binding describes the MDIO is a bus to which the PHY devices are
+ connected. For each device that exists on this bus, a child node should be
+ created.
+
+ As of this writing, every TSEC is associated with an internal Ten-Bit
+ Interface (TBI) PHY. This PHY is accessed through the local MDIO bus. These
+ buses are defined similarly to the mdio buses, except they are compatible
+ with "fsl,gianfar-tbi". The TBI PHYs underneath them are similar to normal
+ PHYs, but the reg property is considered instructive, rather than
+ descriptive. The reg property should be chosen so it doesn't interfere with
+ other PHYs on the bus.
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+# This is needed to distinguish gianfar.yaml and gianfar-mdio.yaml, because
+# both use compatible = "gianfar" (with different device_type values)
+select:
+ oneOf:
+ - properties:
+ compatible:
+ contains:
+ const: gianfar
+ device_type:
+ const: mdio
+ required:
+ - device_type
+
+ - properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,gianfar-tbi
+ - fsl,gianfar-mdio
+ - fsl,etsec2-tbi
+ - fsl,etsec2-mdio
+ - fsl,ucc-mdio
+ - ucc_geth_phy
+
+ required:
+ - compatible
+
+properties:
+ compatible:
+ enum:
+ - fsl,gianfar-tbi
+ - fsl,gianfar-mdio
+ - fsl,etsec2-tbi
+ - fsl,etsec2-mdio
+ - fsl,ucc-mdio
+ - gianfar
+ - ucc_geth_phy
+
+ reg:
+ minItems: 1
+ items:
+ - description:
+ Offset and length of the register set for the device
+
+ - description:
+ Optionally, the offset and length of the TBIPA register (TBI PHY
+ address register). If TBIPA register is not specified, the driver
+ will attempt to infer it from the register set specified (your
+ mileage may vary).
+
+ device_type:
+ const: mdio
+
+required:
+ - reg
+ - "#address-cells"
+ - "#size-cells"
+
+allOf:
+ - $ref: mdio.yaml#
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: ucc_geth_phy
+ then:
+ required:
+ - device_type
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mdio@24520 {
+ reg = <0x24520 0x20>;
+ compatible = "fsl,gianfar-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
index 9c9668c1b6a24edff7b7cf625b9f14c3cbc2e0c8..0e55e0af7d6f59cfb571dd3fcff704b7f4c140d2 100644
--- a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
+++ b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
@@ -1,47 +1,10 @@
* MDIO IO device
-The MDIO is a bus to which the PHY devices are connected. For each
-device that exists on this bus, a child node should be created. See
-the definition of the PHY node in booting-without-of.txt for an example
-of how to define a PHY.
-
-Required properties:
- - reg : Offset and length of the register set for the device, and optionally
- the offset and length of the TBIPA register (TBI PHY address
- register). If TBIPA register is not specified, the driver will
- attempt to infer it from the register set specified (your mileage may
- vary).
- - compatible : Should define the compatible device type for the
- mdio. Currently supported strings/devices are:
- - "fsl,gianfar-tbi"
- - "fsl,gianfar-mdio"
- - "fsl,etsec2-tbi"
- - "fsl,etsec2-mdio"
- - "fsl,ucc-mdio"
- - "fsl,fman-mdio"
- When device_type is "mdio", the following strings are also considered:
- - "gianfar"
- - "ucc_geth_phy"
-
-Example:
-
- mdio@24520 {
- reg = <24520 20>;
- compatible = "fsl,gianfar-mdio";
-
- ethernet-phy@0 {
- ......
- };
- };
+Refer to Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml
* TBI Internal MDIO bus
-As of this writing, every tsec is associated with an internal TBI PHY.
-This PHY is accessed through the local MDIO bus. These buses are defined
-similarly to the mdio buses, except they are compatible with "fsl,gianfar-tbi".
-The TBI PHYs underneath them are similar to normal PHYs, but the reg property
-is considered instructive, rather than descriptive. The reg property should
-be chosen so it doesn't interfere with other PHYs on the bus.
+Refer to Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml
* Gianfar-compatible ethernet nodes
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v2 1/3] dt-bindings: net: Convert fsl,gianfar-{mdio,tbi} to YAML
2025-02-28 17:32 ` [PATCH v2 1/3] dt-bindings: net: Convert fsl,gianfar-{mdio,tbi} " J. Neuschäfer via B4 Relay
@ 2025-02-28 22:02 ` Rob Herring (Arm)
0 siblings, 0 replies; 7+ messages in thread
From: Rob Herring (Arm) @ 2025-02-28 22:02 UTC (permalink / raw)
To: J. Neuschäfer
Cc: David S. Miller, Jakub Kicinski, Paolo Abeni, devicetree,
Conor Dooley, Andrew Lunn, Claudiu Manoil, netdev, linux-kernel,
Eric Dumazet, Krzysztof Kozlowski
On Fri, 28 Feb 2025 18:32:50 +0100, J. Neuschäfer wrote:
> Move the information related to the Freescale Gianfar (TSEC) MDIO bus
> and the Ten-Bit Interface (TBI) from fsl-tsec-phy.txt to a new binding
> file in YAML format, fsl,gianfar-mdio.yaml.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - remove definitions of #address/size-cells (already in mdio.yaml)
> - disambiguate compatible = "gianfar" schemas by using a "select:" schema
> ---
> .../devicetree/bindings/net/fsl,gianfar-mdio.yaml | 113 +++++++++++++++++++++
> .../devicetree/bindings/net/fsl-tsec-phy.txt | 41 +-------
> 2 files changed, 115 insertions(+), 39 deletions(-)
>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 2/3] dt-bindings: net: fsl,gianfar-mdio: Update information about TBI
2025-02-28 17:32 [PATCH v2 0/3] net: Convert Gianfar (Triple Speed Ethernet Controller) bindings to YAML J. Neuschäfer via B4 Relay
2025-02-28 17:32 ` [PATCH v2 1/3] dt-bindings: net: Convert fsl,gianfar-{mdio,tbi} " J. Neuschäfer via B4 Relay
@ 2025-02-28 17:32 ` J. Neuschäfer via B4 Relay
2025-02-28 17:32 ` [PATCH v2 3/3] dt-bindings: net: Convert fsl,gianfar to YAML J. Neuschäfer via B4 Relay
2025-03-05 1:20 ` [PATCH v2 0/3] net: Convert Gianfar (Triple Speed Ethernet Controller) bindings " patchwork-bot+netdevbpf
3 siblings, 0 replies; 7+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-28 17:32 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Claudiu Manoil
Cc: netdev, devicetree, linux-kernel, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
When this binding was originally written, all known TSEC Ethernet
controllers had a Ten-Bit Interface (TBI). However, some datasheets such
as for the MPC8315E suggest that this is not universally true:
The eTSECs do not support TBI, GMII, and FIFO operating modes, so all
references to these interfaces and features should be ignored for this
device.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- Add Rob's Acked-by tag
---
Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml b/Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml
index 22369771c13614875845b6d6e6d6031b933cb152..03c819bc701be4e6bcae37891baccd4b01ec53c4 100644
--- a/Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml
+++ b/Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml
@@ -11,13 +11,12 @@ description:
connected. For each device that exists on this bus, a child node should be
created.
- As of this writing, every TSEC is associated with an internal Ten-Bit
- Interface (TBI) PHY. This PHY is accessed through the local MDIO bus. These
- buses are defined similarly to the mdio buses, except they are compatible
- with "fsl,gianfar-tbi". The TBI PHYs underneath them are similar to normal
- PHYs, but the reg property is considered instructive, rather than
- descriptive. The reg property should be chosen so it doesn't interfere with
- other PHYs on the bus.
+ Some TSECs are associated with an internal Ten-Bit Interface (TBI) PHY. This
+ PHY is accessed through the local MDIO bus. These buses are defined similarly
+ to the mdio buses, except they are compatible with "fsl,gianfar-tbi". The TBI
+ PHYs underneath them are similar to normal PHYs, but the reg property is
+ considered instructive, rather than descriptive. The reg property should be
+ chosen so it doesn't interfere with other PHYs on the bus.
maintainers:
- J. Neuschäfer <j.ne@posteo.net>
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v2 3/3] dt-bindings: net: Convert fsl,gianfar to YAML
2025-02-28 17:32 [PATCH v2 0/3] net: Convert Gianfar (Triple Speed Ethernet Controller) bindings to YAML J. Neuschäfer via B4 Relay
2025-02-28 17:32 ` [PATCH v2 1/3] dt-bindings: net: Convert fsl,gianfar-{mdio,tbi} " J. Neuschäfer via B4 Relay
2025-02-28 17:32 ` [PATCH v2 2/3] dt-bindings: net: fsl,gianfar-mdio: Update information about TBI J. Neuschäfer via B4 Relay
@ 2025-02-28 17:32 ` J. Neuschäfer via B4 Relay
2025-02-28 22:08 ` Rob Herring (Arm)
2025-03-05 1:20 ` [PATCH v2 0/3] net: Convert Gianfar (Triple Speed Ethernet Controller) bindings " patchwork-bot+netdevbpf
3 siblings, 1 reply; 7+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-28 17:32 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Claudiu Manoil
Cc: netdev, devicetree, linux-kernel, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Add a binding for the "Gianfar" ethernet controller, also known as
TSEC/eTSEC.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- change MAC address in example to 00:00:00:00:00:00 instead of a real
Motorola MAC address (suggested by Andrew Lunn)
- add constraints to #address/size-cells, fsl,num_tr/rx_queues
- remove unnecessary type from dma-coherent
- add minItems to interrupts
- remove unnecessary #address/size-cells from queue-group@.*
- describe interrupts of queue-group@.*
- remove unnecessary bus in example
- consistently use "type: boolean" for fsl,magic-packet,
instead of "$ref: /schemas/types.yaml#/definitions/flag"
- fix name of rx-stash-idx property
- fix type of rx-stash-len/idx properties
- actually reference fsl,gianfar-mdio schema for mdio@.* subnodes
- disambiguate compatible = "gianfar" schemas by using a "select:" schema
---
.../devicetree/bindings/net/fsl,gianfar.yaml | 248 +++++++++++++++++++++
.../devicetree/bindings/net/fsl-tsec-phy.txt | 39 +---
2 files changed, 249 insertions(+), 38 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/fsl,gianfar.yaml b/Documentation/devicetree/bindings/net/fsl,gianfar.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..f92f284aa05b0ee34e331661308b7258cbda43c0
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/fsl,gianfar.yaml
@@ -0,0 +1,248 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/fsl,gianfar.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale Three-Speed Ethernet Controller (TSEC), "Gianfar"
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+# This is needed to distinguish gianfar.yaml and gianfar-mdio.yaml, because
+# both use compatible = "gianfar" (with different device_type values)
+select:
+ oneOf:
+ - properties:
+ compatible:
+ contains:
+ const: gianfar
+ device_type:
+ const: network
+ required:
+ - device_type
+
+ - properties:
+ compatible:
+ const: fsl,etsec2
+
+ required:
+ - compatible
+
+properties:
+ compatible:
+ enum:
+ - gianfar
+ - fsl,etsec2
+
+ device_type:
+ const: network
+
+ model:
+ enum:
+ - FEC
+ - TSEC
+ - eTSEC
+
+ reg:
+ maxItems: 1
+
+ ranges: true
+
+ "#address-cells":
+ enum: [ 1, 2 ]
+
+ "#size-cells":
+ enum: [ 1, 2 ]
+
+ cell-index:
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ interrupts:
+ minItems: 1
+ items:
+ - description: Transmit interrupt or single combined interrupt
+ - description: Receive interrupt
+ - description: Error interrupt
+
+ dma-coherent: true
+
+ fsl,magic-packet:
+ type: boolean
+ description:
+ If present, indicates that the hardware supports waking up via magic packet.
+
+ fsl,wake-on-filer:
+ type: boolean
+ description:
+ If present, indicates that the hardware supports waking up by Filer
+ General Purpose Interrupt (FGPI) asserted on the Rx int line. This is
+ an advanced power management capability allowing certain packet types
+ (user) defined by filer rules to wake up the system.
+
+ bd-stash:
+ type: boolean
+ description:
+ If present, indicates that the hardware supports stashing buffer
+ descriptors in the L2.
+
+ rx-stash-len:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Denotes the number of bytes of a received buffer to stash in the L2.
+
+ rx-stash-idx:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Denotes the index of the first byte from the received buffer to stash in
+ the L2.
+
+ fsl,num_rx_queues:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Number of receive queues
+ const: 8
+
+ fsl,num_tx_queues:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Number of transmit queues
+ const: 8
+
+ tbi-handle:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: Reference (phandle) to the TBI node
+
+required:
+ - compatible
+ - model
+
+patternProperties:
+ "^mdio@[0-9a-f]+$":
+ $ref: /schemas/net/fsl,gianfar-mdio.yaml#
+
+allOf:
+ - $ref: ethernet-controller.yaml#
+
+ # eTSEC2 controller nodes have "queue group" subnodes and don't need a "reg"
+ # property.
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,etsec2
+ then:
+ patternProperties:
+ "^queue-group@[0-9a-f]+$":
+ type: object
+
+ properties:
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: Transmit interrupt
+ - description: Receive interrupt
+ - description: Error interrupt
+
+ required:
+ - reg
+ - interrupts
+
+ additionalProperties: false
+ else:
+ required:
+ - reg
+
+ # TSEC and eTSEC devices require three interrupts
+ - if:
+ properties:
+ model:
+ contains:
+ enum: [ TSEC, eTSEC ]
+ then:
+ properties:
+ interrupts:
+ items:
+ - description: Transmit interrupt
+ - description: Receive interrupt
+ - description: Error interrupt
+
+
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ ethernet@24000 {
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <29 2>, <30 2>, <34 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy0>;
+ };
+
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ ethernet@24000 {
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ ranges = <0x0 0x24000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cell-index = <0>;
+ device_type = "network";
+ model = "eTSEC";
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <32 IRQ_TYPE_LEVEL_LOW>,
+ <33 IRQ_TYPE_LEVEL_LOW>,
+ <34 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-parent = <&ipic>;
+
+ mdio@520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x520 0x20>;
+ };
+ };
+
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ bus {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ ethernet {
+ compatible = "fsl,etsec2";
+ ranges;
+ device_type = "network";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&gic>;
+ model = "eTSEC";
+ fsl,magic-packet;
+ dma-coherent;
+
+ queue-group@2d10000 {
+ reg = <0x0 0x2d10000 0x0 0x1000>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ queue-group@2d14000 {
+ reg = <0x0 0x2d14000 0x0 0x1000>;
+ interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
index 0e55e0af7d6f59cfb571dd3fcff704b7f4c140d2..b18bb4c997ea3a221e599f694d9a28692cbcaa7c 100644
--- a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
+++ b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
@@ -8,44 +8,7 @@ Refer to Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml
* Gianfar-compatible ethernet nodes
-Properties:
-
- - device_type : Should be "network"
- - model : Model of the device. Can be "TSEC", "eTSEC", or "FEC"
- - compatible : Should be "gianfar"
- - reg : Offset and length of the register set for the device
- - interrupts : For FEC devices, the first interrupt is the device's
- interrupt. For TSEC and eTSEC devices, the first interrupt is
- transmit, the second is receive, and the third is error.
- - phy-handle : See ethernet.txt file in the same directory.
- - fixed-link : See fixed-link.txt in the same directory.
- - phy-connection-type : See ethernet.txt file in the same directory.
- This property is only really needed if the connection is of type
- "rgmii-id", as all other connection types are detected by hardware.
- - fsl,magic-packet : If present, indicates that the hardware supports
- waking up via magic packet.
- - fsl,wake-on-filer : If present, indicates that the hardware supports
- waking up by Filer General Purpose Interrupt (FGPI) asserted on the
- Rx int line. This is an advanced power management capability allowing
- certain packet types (user) defined by filer rules to wake up the system.
- - bd-stash : If present, indicates that the hardware supports stashing
- buffer descriptors in the L2.
- - rx-stash-len : Denotes the number of bytes of a received buffer to stash
- in the L2.
- - rx-stash-idx : Denotes the index of the first byte from the received
- buffer to stash in the L2.
-
-Example:
- ethernet@24000 {
- device_type = "network";
- model = "TSEC";
- compatible = "gianfar";
- reg = <0x24000 0x1000>;
- local-mac-address = [ 00 E0 0C 00 73 00 ];
- interrupts = <29 2 30 2 34 2>;
- interrupt-parent = <&mpic>;
- phy-handle = <&phy0>
- };
+Refer to Documentation/devicetree/bindings/net/fsl,gianfar.yaml
* Gianfar PTP clock nodes
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v2 3/3] dt-bindings: net: Convert fsl,gianfar to YAML
2025-02-28 17:32 ` [PATCH v2 3/3] dt-bindings: net: Convert fsl,gianfar to YAML J. Neuschäfer via B4 Relay
@ 2025-02-28 22:08 ` Rob Herring (Arm)
0 siblings, 0 replies; 7+ messages in thread
From: Rob Herring (Arm) @ 2025-02-28 22:08 UTC (permalink / raw)
To: J. Neuschäfer
Cc: David S. Miller, Jakub Kicinski, devicetree, Paolo Abeni, netdev,
Andrew Lunn, Conor Dooley, Krzysztof Kozlowski, linux-kernel,
Claudiu Manoil, Eric Dumazet
On Fri, 28 Feb 2025 18:32:52 +0100, J. Neuschäfer wrote:
> Add a binding for the "Gianfar" ethernet controller, also known as
> TSEC/eTSEC.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - change MAC address in example to 00:00:00:00:00:00 instead of a real
> Motorola MAC address (suggested by Andrew Lunn)
> - add constraints to #address/size-cells, fsl,num_tr/rx_queues
> - remove unnecessary type from dma-coherent
> - add minItems to interrupts
> - remove unnecessary #address/size-cells from queue-group@.*
> - describe interrupts of queue-group@.*
> - remove unnecessary bus in example
> - consistently use "type: boolean" for fsl,magic-packet,
> instead of "$ref: /schemas/types.yaml#/definitions/flag"
> - fix name of rx-stash-idx property
> - fix type of rx-stash-len/idx properties
> - actually reference fsl,gianfar-mdio schema for mdio@.* subnodes
> - disambiguate compatible = "gianfar" schemas by using a "select:" schema
> ---
> .../devicetree/bindings/net/fsl,gianfar.yaml | 248 +++++++++++++++++++++
> .../devicetree/bindings/net/fsl-tsec-phy.txt | 39 +---
> 2 files changed, 249 insertions(+), 38 deletions(-)
>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 0/3] net: Convert Gianfar (Triple Speed Ethernet Controller) bindings to YAML
2025-02-28 17:32 [PATCH v2 0/3] net: Convert Gianfar (Triple Speed Ethernet Controller) bindings to YAML J. Neuschäfer via B4 Relay
` (2 preceding siblings ...)
2025-02-28 17:32 ` [PATCH v2 3/3] dt-bindings: net: Convert fsl,gianfar to YAML J. Neuschäfer via B4 Relay
@ 2025-03-05 1:20 ` patchwork-bot+netdevbpf
3 siblings, 0 replies; 7+ messages in thread
From: patchwork-bot+netdevbpf @ 2025-03-05 1:20 UTC (permalink / raw)
To: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay_=3Cdevnull+j=2Ene=2Eposteo=2Enet?=,
=?utf-8?q?=40kernel=2Eorg=3E?=
Cc: andrew+netdev, davem, edumazet, kuba, pabeni, robh, krzk+dt,
conor+dt, claudiu.manoil, netdev, devicetree, linux-kernel, j.ne
Hello:
This series was applied to netdev/net-next.git (main)
by Jakub Kicinski <kuba@kernel.org>:
On Fri, 28 Feb 2025 18:32:49 +0100 you wrote:
> The aim of this series is to modernize the device tree bindings for the
> Freescale "Gianfar" ethernet controller (a.k.a. TSEC, Triple Speed
> Ethernet Controller) by converting them to YAML.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
> Changes in v2:
> - various cleanups suggested by reviewers
> - use a 'select:' schema to disambiguate compatible = "gianfar" between
> network controller and MDIO nodes
> - Link to v1: https://lore.kernel.org/r/20250220-gianfar-yaml-v1-0-0ba97fd1ef92@posteo.net
>
> [...]
Here is the summary with links:
- [v2,1/3] dt-bindings: net: Convert fsl,gianfar-{mdio,tbi} to YAML
https://git.kernel.org/netdev/net-next/c/e4c4522390c9
- [v2,2/3] dt-bindings: net: fsl,gianfar-mdio: Update information about TBI
https://git.kernel.org/netdev/net-next/c/0386e29e60bd
- [v2,3/3] dt-bindings: net: Convert fsl,gianfar to YAML
https://git.kernel.org/netdev/net-next/c/a70fdd936818
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
^ permalink raw reply [flat|nested] 7+ messages in thread